Forward Converter Controller Design Project (Power Electronics + Control) on

electrical engineering project and need the explanation and answer to help me learn.

Advanced Power Electronics + Control
Forward Converter Controller Design Project
Requirements:
1- Only Electrical Engineer Specialized in Power Electronics and Control.
2- Use Only PSIM software.
3- See the attached PDF file to recognize the deliverables and achieve them.
4- Write a full report including abstract, introduction, design procedure (including all calculations, figures and screenshots) with all explanations, results (including all graphs and simulation screenshots) with all explanations, and anything else required from the deliverables, and conclusions.
5- You MUST use the attached PSIM file to start.
6- Do the calculations and the design as shown in the attached Textbook only (“Power Electronics” 1st Edition, by D. Hart,2010, McGraw Hill.)
7- Send me the full report (as pdf and word), also submit the final simulation file as PSIM file. (All Compressed in ZIP file)
Requirements: Full Report + Simulation File as mentioned in the ZIP file.

Instantaneous power: Energy: Average power: Average power for a dc voltage source: rms voltage: rms for vv1v2v3. . .:rms current for a triangular wave: rms current for an offset triangular wave: rms voltage for a sine wave or a full-wave rectiÞed sine wave:VrmsVm12IrmsBaIm13b2I2dc IrmsIm13Vrms2V 21, rms V 22, rms V 23, rms Á VrmsB1T3T0v2(t)dtPdcVdcIavgPWT1T3t0Tt0p(t)dt1T3t0Tt0v(t)i(t)dtW3t2t1p(t)dtp(t)v(t)i(t)Commonly used Powerand ConverterEquationshar80679_FC.qxd 12/11/09 6:23 PM Page ii
rms voltage for a half-wave rectiÞed sine wave: Power factor: Total harmonic distortion: Distortion factor: Buck converter: Boost converter: Buck-boost and«Cuk converters: SEPIC: Flyback converter: Forward converter: VoVsDaN2N1bVoVsaD1DbaN2N1bVoVsaD1DbVoVsaD1DbVoVs1DVoVsDCrest factorIpeakIrmsForm factorIrmsIavgDFA11(THD)2THDAaqn2I2nI1pfPSPVrmsIrmsVrmsVm2har80679_FC.qxd 12/11/09 6:23 PM Page iii
PowerElectronicsDanielW.HartValparaiso UniversityValparaiso, Indianahar80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page i
POWER ELECTRONICSPublished by McGraw-Hill, a business unit of The McGraw-Hill Companies, Inc., 1221 Avenue of theAmericas, New York, NY10020. Copyright ©2011 by The McGraw-Hill Companies, Inc. All rights reserved. No part of this publication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system, without the prior written consent of The McGraw-Hill Companies, Inc., including, but not limited to, in any network or other electronic storage or transmission,or broadcast for distance learning.Some ancillaries, including electronic and print components, may not be available to customers outside the United States.This book is printed on acid-free paper. 1 2 3 4 5 6 7 8 9 0 DOC/DOC 1 0 9 8 7 6 5 4 3 2 1 0ISBN 978-0-07-338067-4MHID 0-07-338067-9Vice President & Editor-in-Chief: Marty LangeVice President, EDP: Kimberly Meriwether-DavidGlobal Publisher: Raghothaman SrinivasanDirector of Development: Kristine TibbettsDevelopmental Editor: Darlene M. SchuellerSenior Marketing Manager: Curt ReynoldsProject Manager: Erin MelloySenior Production Supervisor: Kara KudronowiczSenior Media Project Manager: Jodi K. BanowetzDesign Coordinator: Brenda A. RolwesCover Designer: Studio Montage, St. Louis, Missouri(USE) Cover Image: Figure 7.5a from interiorCompositor: Glyph InternationalTypeface: 10.5/12 Times RomanPrinter: R. R. DonnelleyAll credits appearing on page or at the end of the book are considered to be an extension of the copyright page.This book was previously published by:Pearson Education, Inc.Library of Congress Cataloging-in-Publication DataHart, Daniel W.Power electronics / Daniel W. Hart.p. cm.Includes bibliographical references and index.ISBN 978-0-07-338067-4(alk. paper)1. Power electronics. I. Title.TK7881.15.H373 2010621.31’7Ñdc222009047266www.mhhe.comhar80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page ii
To my family, friends, and the many students I have had the privilege and pleasure of guidinghar80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page iii
ivChapter 1Introduction1Chapter 2PowerComputations21Chapter 3Half-Wave RectiÞers65Chapter 4Full-Wave RectiÞers111Chapter 5AC Voltage Controllers171Chapter 6DC-DC Converters196Chapter 7DC PowerSupplies265Chapter 8Inverters331Chapter 9Resonant Converters387Chapter 10Drive Circuits, SnubberCircuits, and Heat Sinks431Appendix AFourierSeries forSomeCommon Waveforms461Appendix BState-Space Averaging467Index473BRIEFCONTENTShar80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page iv
vChapter 1Introduction11.1Power Electronics11.2Converter ClassiÞcation11.3Power Electronics Concepts31.4Electronic Switches5The Diode6Thyristors7Transistors81.5Switch Selection111.6Spice, PSpice, and Capture131.7Switches in Pspice14The Voltage-Controlled Switch14Transistors16Diodes17Thyristors (SCRs)18Convergence Problems in PSpice181.8Bibliography19Problems20Chapter 2PowerComputations212.1Introduction212.2Power and Energy21Instantaneous Power21Energy22Average Power222.3Inductors and Capacitors252.4Energy Recovery272.5Effective Values: RMS342.6Apparent Power and Power Factor42Apparent Power S42Power Factor432.7Power Computations for Sinusoidal AC Circuits432.8Power Computations for NonsinusoidalPeriodic Waveforms44Fourier Series45Average Power46Nonsinusoidal Source and Linear Load46Sinusoidal Source and Nonlinear Load482.9Power Computations Using PSpice512.10Summary582.11Bibliography59Problems59Chapter 3Half-Wave RectiÞers653.1Introduction653.2Resistive Load65Creating a DC Component Using an Electronic Switch653.3Resistive-Inductive Load673.4PSpice Simulation72Using Simulation Software for Numerical Computations72CONTENTShar80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page v
viContents3.5RL-Source Load75Supplying Power to a DC Source from an AC Source753.6Inductor-Source Load79Using Inductance to Limit Current793.7The Freewheeling Diode81Creating a DC Current81Reducing Load Current Harmonics863.8Half-Wave RectiÞer With a CapacitorFilter88Creating a DC Voltage from an AC Source883.9The Controlled Half-Wave RectiÞer94Resistive Load94RLLoad96RL-Source Load983.10PSpice Solutions For Controlled RectiÞers100Modeling the SCR in PSpice1003.11Commutation103The Effect of Source Inductance1033.12Summary1053.13Bibliography106Problems106Chapter 4Full-Wave RectiÞers1114.1Introduction1114.2Single-Phase Full-Wave RectiÞers111The Bridge RectiÞer111The Center-Tapped Transformer RectiÞer114Resistive Load115RLLoad115Source Harmonics118PSpice Simulation119RL-Source Load120Capacitance Output Filter122Voltage Doublers125LC Filtered Output1264.3Controlled Full-Wave RectiÞers131Resistive Load131RLLoad, Discontinuous Current133RLLoad, Continuous Current135PSpice Simulation of Controlled Full-WaveRectiÞers139Controlled RectiÞer with RL-Source Load140Controlled Single-Phase Converter Operating as an Inverter1424.4Three-Phase RectiÞers1444.5Controlled Three-Phase RectiÞers149Twelve-Pulse RectiÞers151The Three-Phase Converter Operating as an Inverter1544.6DC Power Transmission1564.7Commutation: The Effect of SourceInductance160Single-Phase Bridge RectiÞer160Three-Phase RectiÞer1624.8Summary1634.9Bibliography164Problems164Chapter 5AC Voltage Controllers1715.1Introduction1715.2The Single-Phase AC Voltage Controller171Basic Operation171Single-Phase Controller with a Resistive Load173Single-Phase Controller with an RLLoad177PSpice Simulation of Single-Phase AC Voltage Controllers180har80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page vi
Contentsvii5.3Three-Phase Voltage Controllers183Y-Connected Resistive Load183Y-Connected RLLoad187Delta-Connected Resistive Load1895.4Induction Motor Speed Control1915.5Static VAR Control1915.6Summary1925.7Bibliography193Problems193Chapter 6DC-DC Converters1966.1Linear Voltage Regulators1966.2ABasic Switching Converter1976.3The Buck (Step-Down) Converter198Voltage and Current Relationships198Output Voltage Ripple204Capacitor ResistanceÑThe Effect on Ripple Voltage206Synchronous RectiÞcation for the Buck Converter2076.4Design Considerations2076.5The Boost Converter211Voltage and Current Relationships211Output Voltage Ripple215Inductor Resistance2186.6The Buck-Boost Converter221Voltage and Current Relationships221Output Voltage Ripple2256.7The«Cuk Converter2266.8The Single-Ended Primary InductanceConverter (SEPIC)2316.9Interleaved Converters2376.10Nonideal Switches and ConverterPerformance239Switch Voltage Drops239Switching Losses2406.11Discontinuous-Current Operation241Buck Converter with Discontinuous Current241Boost Converter with Discontinuous Current2446.12Switched-Capacitor Converters247The Step-Up Switched-Capacitor Converter247The Inverting Switched-Capacitor Converter249The Step-Down Switched-Capacitor Converter2506.13PSpice Simulation of DC-DC Converters251ASwitched PSpice Model252An Averaged Circuit Model2546.14Summary2596.15Bibliography259Problems260Chapter 7DC PowerSupplies2657.1Introduction2657.2Transformer Models2657.3The Flyback Converter267Continuous-Current Mode267Discontinuous-Current Mode in the FlybackConverter275Summary of Flyback Converter Operation2777.4The Forward Converter277Summary of Forward Converter Operation2837.5The Double-Ended (Two-Switch) Forward Converter2857.6The Push-Pull Converter287Summary of Push-Pull Operation2907.7Full-Bridge and Half-Bridge DC-DCConverters291har80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page vii
viiiContents7.8Current-Fed Converters2947.9Multiple Outputs2977.10Converter Selection2987.11Power Factor Correction2997.12PSpice Simulation of DC Power Supplies3017.13Power Supply Control302Control Loop Stability303Small-Signal Analysis304Switch Transfer Function305Filter Transfer Function306Pulse-Width Modulation Transfer Function307Type 2 Error AmpliÞer with Compensation308Design of a Type 2 Compensated Error AmpliÞer311PSpice Simulation of Feedback Control315Type 3 Error AmpliÞer with Compensation317Design of a Type 3 Compensated Error AmpliÞer318Manual Placement of Poles and Zeros in the Type 3 AmpliÞer3237.14PWM Control Circuits3237.15The AC Line Filter3237.16The Complete DC Power Supply3257.17Bibliography326Problems327Chapter 8Inverters3318.1Introduction3318.2The Full-Bridge Converter3318.3The Square-Wave Inverter3338.4Fourier Series Analysis3378.5Total Harmonic Distortion3398.6PSpice Simulation of Square WaveInverters3408.7Amplitude and Harmonic Control3428.8The Half-Bridge Inverter3468.9Multilevel Inverters348Multilevel Converters with Independent DC Sources349Equalizing Average Source Power with Pattern Swapping353Diode-Clamped Multilevel Inverters3548.10Pulse-Width-Modulated Output357Bipolar Switching357Unipolar Switching3588.11PWM DeÞnitions and Considerations3598.12PWM Harmonics361Bipolar Switching361Unipolar Switching3658.13Class D Audio AmpliÞers3668.14Simulation of Pulse-Width-ModulatedInverters367Bipolar PWM367Unipolar PWM3708.15Three-Phase Inverters373The Six-Step Inverter373PWM Three-Phase Inverters376Multilevel Three-Phase Inverters3788.16PSpice Simulation of Three-Phase Inverters378Six-Step Three-Phase Inverters378PWM Three-Phase Inverters3788.17Induction Motor Speed Control3798.18Summary3828.19Bibliography383Problems383har80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page viii
ContentsixChapter 9Resonant Converters3879.1Introduction3879.2AResonant Switch Converter: Zero-Current Switching387Basic Operation387Output Voltage3929.3AResonant Switch Converter: Zero-Voltage Switching394Basic Operation394Output Voltage3999.4The Series Resonant Inverter401Switching Losses403Amplitude Control4049.5The Series Resonant DC-DC Converter407Basic Operation407Operation for ωsωo407Operation for ω0/2 ωsω0413Operation for ωsω0/2413Variations on the Series Resonant DC-DCConverter4149.6The Parallel Resonant DC-DC Converter4159.7The Series-Parallel DC-DC Converter4189.8Resonant Converter Comparison4219.9The Resonant DC Link Converter4229.10Summary4269.11Bibliography426Problems427Chapter 10Drive Circuits, SnubberCircuits, and Heat Sinks43110.1Introduction43110.2MOSFETand IGBTDrive Circuits431Low-Side Drivers431High-Side Drivers43310.3Bipolar Transistor Drive Circuits43710.4Thyristor Drive Circuits44010.5Transistor Snubber Circuits44110.6Energy Recovery Snubber Circuits45010.7Thyristor Snubber Circuits45010.8Heat Sinks and Thermal Management451Steady-State Temperatures451Time-Varying Temperatures45410.9Summary45710.10Bibliography457Problems458Appendix AFourierSeries forSome Common Waveforms461Appendix BState-Space Averaging467Index473har80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page ix
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xiThis book is intended to be an introductory text in power electronics, primar-ily for the undergraduate electrical engineering student. The text assumesthat the student is familiar with general circuit analysis techniques usuallytaught at the sophomore level. The student should be acquainted with electronicdevices such as diodes and transistors, but the emphasis of this text is on circuittopology and function rather than on devices. Understanding the voltage-currentrelationships for linear devices is the primary background required, and the conceptof Fourier series is also important. Most topics presented in this text are appropriatefor junior- or senior-level undergraduate electrical engineering students.The text is designed to be used for a one-semester power electronicscourse, with appropriate topics selected or omitted by the instructor. The textis written for some flexibility in the order of the topics. It is recommended thatChap. 2 on power computations be covered at the beginning of the course inas much detail as the instructor deems necessary for the level of students.Chapters 6 and 7 on dc-dc converters and dc power supplies may be taken beforeChaps. 3, 4, and 5 on rectiÞers and voltage controllers. The author covers chap-ters in the order 1, 2 (introduction; power computations), 6, 7 (dc-dc converters;dc power supplies), 8 (inverters), 3, 4, 5 (rectiÞers and voltage controllers), fol-lowed by coverage of selected topics in 9 (resonant converters) and 10 (drive andsnubber circuits and heat sinks). Some advanced material, such as the controlsection in Chapter 7, may be omitted in an introductory course.The student should use all the software tools available for the solutionto the equations that describe power electronics circuits. These range fromcalculators with built-in functions such as integration and root finding tomore powerful computer software packages such as MATLAB¨, Mathcad¨,Mapleª, Mathematica¨, and others. Numerical techniques are often sug-gested in this text. It is up to the student to select and adapt all the readilyavailable computer tools to the power electronics situation.Much of this text includes computer simulation using PSpice¨as a supple-ment to analytical circuit solution techniques. Some prior experience withPSpice is helpful but not necessary. Alternatively, instructors may choose to usea different simulation program such as PSIM¨or NI Multisimªsoftware insteadof PSpice. Computer simulation is never intended to replace understanding offundamental principles. It is the authorÕs belief that using computer simulationfor the instructional beneÞt of investigating the basic behavior of power elec-tronics circuits adds a dimension to the studentÕs learning that is not possiblefrom strictly manipulating equations. Observing voltage and current waveformsfrom a computer simulation accomplishes some of the same objectives as thosePREFACEhar80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page xi
xiiPrefaceof a laboratory experience. In a computer simulation, all the circuitÕs voltagesand currents can be investigated, usually much more efÞciently than in a hard-ware lab. Variations in circuit performance for a change in components or oper-ating parameters can be accomplished more easily with a computer simulationthan in a laboratory. PSpice circuits presented in this text do not necessarily rep-resent the most elegant way to simulate circuits. Students are encouraged to usetheir engineering skills to improve the simulation circuits wherever possible.The website that accompanies this text can be found at www.mhhe.com/hart, and features Capture circuit Þles for PSpice simulation for studentsand instructors and a password-protected solutions manual and PowerPoint¨lecture notes for instructors.My sincere gratitude to reviewers and students who have made manyvaluable contributions to this project. Reviewers includeAli EmadiIllinois Institute of TechnologyShaahin FilizadehUniversity of ManitobaJames GoverKettering UniversityPeter IdowuPenn State, HarrisburgMehrdad KazeraniUniversity of WaterlooXiaomin KouUniversity of Wisconsin-PlattevilleAlexis KwasinskiThe University of Texas at AustinMedhat M. MorcosKansas State UniversitySteve PekarekPurdue UniversityWajiha ShireenUniversity of HoustonHamid ToliyatTexas A&M UniversityZia YamayeeUniversity of PortlandLin ZhaoGannon UniversityAspecial thanks to my colleagues Kraig Olejniczak, Mark Budnik, andMichael Doria at Valparaiso University for their contributions. I also thankNikke Ault for the preparation of much of the manuscript.har80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page xii
PrefacexiiiComplete Online Solutions Manual Organization System(COSMOS). Pro-fessors can beneÞt from McGraw-HillÕs COSMOS electronic solutions manual.COSMOS enables instructors to generate a limitless supply of problem mate-rial for assignment, as well as transfer and integrate their own problems into the software. For additional information, contact your McGraw-Hill sales representative. Electronic Textbook Option. This text is offered through CourseSmart for bothinstructors and students. CourseSmart is an online resource where students canpurchase the complete text online at almost one-half the cost of a traditional text.Purchasing the eTextbook allows students to take advantage of CourseSmartÕs Webtools for learning, which include full text search, notes and highlighting, and e-mailtools for sharing notes among classmates. To learn more about CourseSmart options,contact your McGraw-Hill sales representative or visit www.CourseSmart.com.Daniel W. HartValparaiso UniversityValparaiso, Indianahar80679_FM_i-xiv.qxd 12/17/09 12:38 PM Page xiii
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CHAPTER11Introduction1.1POWER ELECTRONICSPower electronics circuits convert electric power from one form to another usingelectronic devices. Power electronics circuits function by using semiconductordevices as switches, thereby controlling or modifying a voltage or current. Appli-cations of power electronics range from high-power conversion equipment suchas dc power transmission to everyday appliances, such as cordless screwdrivers,power supplies for computers, cell phone chargers, and hybrid automobiles.Power electronics includes applications in which circuits process milliwatts ormegawatts. Typical applications of power electronics include conversion of ac todc, conversion of dc to ac, conversion of an unregulated dc voltage to a regulateddc voltage, and conversion of an ac power source from one amplitude and fre-quency to another amplitude and frequency.The design of power conversion equipment includes many disciplines fromelectrical engineering. Power electronics includes applications of circuit theory,control theory, electronics, electromagnetics, microprocessors (for control), andheat transfer. Advances in semiconductor switching capability combined with thedesire to improve the efÞciency and performance of electrical devices have madepower electronics an important and fast-growing area in electrical engineering.1.2CONVERTER CLASSIFICATIONThe objective of a power electronics circuit is to match the voltage and current re-quirements of the load to those of the source. Power electronics circuits convert onetype or level of a voltage or current waveform to another and are hence calledconverters. Converters serve as an interface between the source and load (Fig. 1-1).har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 1
2CHAPTER 1IntroductionConverters are classiÞed by the relationship between input and output:ac input/dc outputThe ac-dc converter produces a dc output from an ac input. Average poweris transferred from an ac source to a dc load. The ac-dc converter isspeciÞcally classiÞed as a rectiÞer. For example, an ac-dc converterenables integrated circuits to operate from a 60-Hz ac line voltage byconverting the ac signal to a dc signal of the appropriate voltage.dc input/ac outputThe dc-ac converter is speciÞcally classiÞed as an inverter. In the inverter,average power ßows from the dc side to the ac side. Examples of inverterapplications include producing a 120-Vrms 60-Hz voltage from a 12-Vbattery and interfacing an alternative energy source such as an array ofsolar cells to an electric utility.dc input/dc outputThe dc-dc converter is useful when a load requires a speciÞed (oftenregulated) dc voltage or current but the source is at a different orunregulated dc value. For example, 5 Vmay be obtained from a 12-Vsource via a dc-dc converter.ac input/ac outputThe ac-ac converter may be used to change the level and/or frequency ofan ac signal. Examples include a common light-dimmer circuit and speedcontrol of an induction motor.Some converter circuits can operate in different modes, depending on circuitand control parameters. For example, some rectiÞer circuits can be operated asinverters by modifying the control on the semiconductor devices. In such cases,it is the direction of average power ßow that determines the converter classiÞca-tion. In Fig. 1-2, if the battery is charged from the ac power source, the converteris classiÞed as a rectiÞer. If the operating parameters of the converter are changedand the battery acts as a source supplying power to the ac system, the converteris then classiÞed as an inverter.Power conversion can be a multistep process involving more than one typeof converter. For example, an ac-dc-ac conversion can be used to modify an acsource by Þrst converting it to direct current and then converting the dc signal toan ac signal that has an amplitude and frequency different from those of the orig-inal ac source, as illustrated in Fig. 1-3.SourceOutputInputLoadConverterFigure 1-1Asource and load interfaced by a power electronics converter.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 2
1.3Power Electronics Concepts3Figure 1-2Aconverter can operate as a rectiÞer or an inverter, depending on the directionof average power P.InverterRectifierConverterPP++−−1.3POWER ELECTRONICS CONCEPTSSourceOutputInputLoadConverter 1Converter 2Figure 1-3Two converters are used in a multistep process.To illustrate some concepts in power electronics, consider the design problem ofcreating a 3-Vdc voltage level from a 9-Vbattery. The purpose is to supply 3 Vto a load resistance. One simple solution is to use a voltage divider, as shown inFig. 1-4. For a load resistor RL, inserting a series resistance of 2RLresults in 3 Vacross RL. Aproblem with this solution is that the power absorbed by the 2RLresistor is twice as much as delivered to the load and is lost as heat, making thecircuit only 33.3 percent efÞcient. Another problem is that if the value of the loadresistance changes, the output voltage will change unless the 2RLresistancechanges proportionally. Asolution to that problem could be to use a transistor inplace of the 2RLresistance. The transistor would be controlled such that the volt-age across it is maintained at 6 V, thus regulating the output at 3 V. However, thesame low-efÞciency problem is encountered with this solution.To arrive at a more desirable design solution, consider the circuit in Fig. 1-5a.In that circuit, a switch is opened and closed periodically. The switch is a shortcircuit when it is closed and an open circuit when it is open, making the voltage3 V9 V+−RL2RL+−Figure 1-4Asimple voltage divider for creating 3 Vfrom a 9-Vsource.har80679_ch01_001-020.qxd 12/17/09 12:49 PM Page 3
4CHAPTER 1Introductionacross RLequal to 9 Vwhen the switch is closed and 0 Vwhen the switch is open.The resulting voltage across RLwill be like that of Fig. 1-5b. This voltage isobviously not a constant dc voltage, but if the switch is closed for one-third of theperiod, the average value of vx(denoted as Vx) is one-third of the source voltage.Average value is computed from the equation(1-1)Considering efÞciency of the circuit, instantaneous power (see Chap. 2) absorbed by the switch is the product of voltage and current. When the switch isopen, power absorbed by it is zero because the current in it is zero. When theswitch is closed, power absorbed by it is zero because the voltage across it iszero. Since power absorbed by the switch is zero for both open and closed con-ditions, all power supplied by the 9-Vsource is delivered to RL, making the cir-cuit 100 percent efÞcient.The circuit so far does not accomplish the design object of creating a dc volt-age of 3 V. However, the voltage waveform vxcan be expressed as a Fourier seriescontaining a dc term (the average value) plus sinusoidal terms at frequencies thatare multiples of the pulse frequency. To create a 3-Vdc voltage, vxis applied to alow-pass Þlter. An ideal low-pass Þlter allows the dc component of voltage to passthrough to the output while removing the ac terms, thus creating the desired dcoutput. If the Þlter is lossless, the converter will be 100 percent efÞcient.avg(vx) Vx1T3T0vx(t)dt1T3T/309dt 1T3TT/30dt 3V9 V9 V3 V+−vx(t)vx(t)+−AveragetTT3(a)(b)Figure 1-5(a) Aswitched circuit; (b) a pulsed voltage waveform.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 4
1.4Electronic Switches5In practice, the Þlter will have some losses and will absorb some power.Additionally, the electronic device used for the switch will not be perfect and willhave losses. However, the efÞciency of the converter can still be quite high (morethan 90 percent). The required values of the Þlter components can be made smallerwith higher switching frequencies, making large switching frequencies desirable.Chaps. 6and 7describe the dc-dc conversion process in detail. The ÒswitchÓ in thisexample will be some electronic device such as a metal-oxide Þeld-effect transis-tors (MOSFET), or it may be comprised of more than one electronic device.The power conversion process usually involves system control. Converteroutput quantities such as voltage and current are measured, and operating para-meters are adjusted to maintain the desired output. For example, if the 9-Vbat-tery in the example in Fig. 1-6decreased to 6 V, the switch would have to beclosed 50 percent of the time to maintain an average value of 3 Vfor vx. Afeed-back control system would detect if the output voltage were not 3 Vand adjustthe closing and opening of the switch accordingly, as illustrated in Fig. 1-7.1.4ELECTRONIC SWITCHESAn electronic switch is characterized by having the two states onand off,ideallybeing either a short circuit or an open circuit. Applications using switchingdevices are desirable because of the relatively small power loss in the device. Ifthe switch is ideal, either the switch voltage or the switch current is zero, making+−3 V+−+−RLvx(t)9 VLow-Pass FilterFigure 1-6Alow-pass Þlter allows just the average value of vxto pass through to the load.+−+−+−vx(t)VsVoLow-Pass FilterSwitch ControlFigure 1-7Feedback is used to control the switch and maintain the desired output voltage.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 5
6CHAPTER 1Introductionthe power absorbed by it zero. Real devices absorb some power when in the onstate and when making transitions between the on and off states, but circuit efÞ-ciencies can still be quite high. Some electronic devices such as transistors canalso operate in the active range where both voltage and current are nonzero, butit is desirable to use these devices as switches when processing power.The emphasis of this textbook is on basic circuit operation rather than ondevice performance. The particular switching device used in a power electronicscircuit depends on the existing state of device technology. The behaviors ofpower electronics circuits are often not affected signiÞcantly by the actual deviceused for switching, particularly if voltage drops across a conducting switch aresmall compared to other circuit voltages. Therefore, semiconductor devices areusually modeled as ideal switches so that circuit behavior can be emphasized.Switches are modeled as short circuits when on and open circuits when off. Tran-sitions between states are usually assumed to be instantaneous, but the effects ofnonideal switching are discussed where appropriate. Abrief discussion of semi-conductor switches is given in this section, and additional information relating todrive and snubber circuits is provided in Chap. 10. Electronic switch technologyis continually changing, and thorough treatments of state-of-the-art devices canbe found in the literature.The DiodeAdiode is the simplest electronic switch. It is uncontrollable in that the on andoff conditions are determined by voltages and currents in the circuit. The diodeis forward-biased (on) when the current id(Fig. 1-8a) is positive and reverse-biased (off) when vdis negative. In the ideal case, the diode is a short circuittrridvdCathodeAnodeOnOff+−ti(a)(d)idvdiOnOffv(b)(c)(e)Figure 1-8(a) RectiÞer diode; (b) i-vcharacteristic; (c) idealized i-vcharacteristic; (d) reverse recovery time trr;(e) Schottky diode.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 6
1.4Electronic Switches7when it is forward-biased and is an open circuit when reverse-biased. The actualand idealized current-voltage characteristics are shown in Fig. 1-8band c. Theidealized characteristic is used in most analyses in this text.An important dynamic characteristic of a nonideal diode is reverse recoverycurrent. When a diode turns off, the current in it decreases and momentarilybecomes negative before becoming zero, as shown in Fig. 1-8d. The time trristhe reverse recovery time, which is usually less than 1 s. This phenomenonmay become important in high-frequency applications. Fast-recovery diodesare designed to have a smaller trrthan diodes designed for line-frequency appli-cations. Silicon carbide (SiC) diodes have very little reverse recovery, resultingin more efÞcient circuits, especially in high-power applications.Schottky diodes (Fig. 1-8e) have a metal-to-silicon barrier rather than a P-Njunction. Schottky diodes have a forward voltage drop of typically 0.3 V. Theseare often used in low-voltage applications where diode drops are signiÞcant rel-ative to other circuit voltages. The reverse voltage for a Schottky diode is limitedto about 100 V. The metal-silicon barrier in a Schottky diode is not subject torecovery transients and turn-on and off faster than P-Njunction diodes.ThyristorsThyristors are electronic switches used in some power electronic circuits wherecontrol of switch turn-on is required. The term thyristoroften refers to a familyof three-terminal devices that includes the silicon-controlled rectiÞer (SCR), thetriac, the gate turnoff thyristor (GTO), the MOS-controlled thyristor (MCT), andothers. Thyristorand SCRare terms that are sometimes used synonymously. TheSCR is the device used in this textbook to illustrate controlled turn-on devices inthe thyristor family. Thyristors are capable of large currents and large blockingvoltages for use in high-power applications, but switching frequencies cannot beas high as when using other devices such as MOSFETs.The three terminals of the SCR are the anode, cathode, and gate (Fig.1-9a).For the SCR to begin to conduct, it must have a gate current applied while it hasa positive anode-to-cathode voltage. After conduction is established, the gate sig-nal is no longer required to maintain anode current. The SCR will continue toconduct as long as the anode current remains positive and above a minimumvalue called the holding level. Figs. 1-9aand bshow the SCR circuit symbol andthe idealized current-voltage characteristic.The gate turnoff thyristor (GTO) of Fig. 1-9c, like the SCR, is turned on bya short-duration gate current if the anode-to-cathode voltage is positive. How-ever, unlike the SCR, the GTO can be turned off with a negative gate current.The GTO is therefore suitable for some applications where control of bothturn-on and turnoff of a switch is required. The negative gate turnoff currentcan be of brief duration (a few microseconds), but its magnitude must be verylarge compared to the turn-on current. Typically, gate turnoff current is one-third the on-state anode current. The idealized i-vcharacteristic is like that ofFig. 1-9bfor the SCR.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 7
8CHAPTER 1IntroductionThe triac (Fig. 1-9d) is a thyristor that is capable of conducting current ineither direction. The triac is functionally equivalent to two antiparallel SCRs (in parallel but in opposite directions). Common incandescent light-dimmer cir-cuits use a triac to modify both the positive and negative half cycles of the inputsine wave.The MOS-controlled thyristor (MCT) in Fig. 1-9eis a device functionallyequivalent to the GTO but without the high turnoff gate current requirement. TheMCThas an SCR and two MOSFETs integrated into one device. One MOSFETturns the SCR on, and one MOSFETturns the SCR off. The MCTis turned onand off by establishing the proper voltage from gate to cathode, as opposed to es-tablishing a gate current in the GTO.Thyristors were historically the power electronics switch of choice becauseof high voltage and current ratings available. Thyristors are still used, especiallyin high-power applications, but ratings of power transistors have increasedgreatly, making the transistor more desirable in many applications.TransistorsTransistors are operated as switches in power electronics circuits. Transistor drivecircuits are designed to have the transistor either in the fully on or fully off state.This differs from other transistor applications such as in a linear ampliÞer circuitwhere the transistor operates in the region having simultaneously high voltageand current.Figure 1-9Thyristor devices: (a) silicon-controlled rectiÞer (SCR); (b) SCR idealized i-vcharacteristic; (c) gate turnoff (GTO) thyristor; (d) triac; (e) MOS-controlled thyristor (MCT).vAKiAvAKCathodeGateAnodeAGK+−(a)orGateAnode(e)CathodeAGK(b)iAOnOff(d)GateMT1MT2AKGGateCathodeAnode(c)har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 8
1.4Electronic Switches9Unlike the diode, turn-on and turnoff of a transistor are controllable. Types oftransistors used in power electronics circuits include MOSFETs, bipolar junctiontransistors (BJTs), and hybrid devices such as insulated-gate bipolar junction tran-sistors (IGBTs). Figs. 1-10to 1-12show the circuit symbols and the current-voltagecharacteristics.The MOSFET(Fig. 1-10a) is a voltage-controlled device with characteris-tics as shown in Fig. 1-10b. MOSFETconstruction produces a parasitic (body)diode, as shown, which can sometimes be used to an advantage in power elec-tronics circuits. Power MOSFETs are of the enhancement type rather than thedepletion type. AsufÞciently large gate-to-source voltage will turn the device on,iDOnOffvDSiDiDvGS3vDSvGS2vGS1vGS = 0vGSvDSDrainDSourceSGateG++−−Figure 1-10(a) MOSFET(N-channel) with body diode; (b) MOSFETcharacteristics; (c) idealized MOSFETcharacteristics.(a)(b)(c)(d)EmitterBaseCollectorCBE iC iBvCE+−iCiB3vCEvCE(SAT)iB2iB1iB = 0iCOnOffvCEFigure 1-11(a) BJT(NPN); (b) BJTcharacteristics; (c) idealized BJTcharacteristics; (d) Darlington conÞguration.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 9
10CHAPTER 1Introductionresulting in a small drain-to-source voltage. In the on state, the change in vDSislinearly proportional to the change in iD.Therefore, the on MOSFETcan be mod-eled as an on-state resistance called RDS(on). MOSFETs have on-state resistancesas low as a few milliohms. For a Þrst approximation, the MOSFETcan be mod-eled as an ideal switch with a characteristic shown in Fig. 1-10c. Ratings are to1500 Vand more than 600 A(although not simultaneously). MOSFETswitchingspeeds are greater than those of BJTs and are used in converters operating intothe megahertz range.Typical BJTcharacteristics are shown in Fig. 1-11b. The on state for thetransistor is achieved by providing sufficient base current to drive the BJTinto saturation. The collector-emitter saturation voltage is typically 1 to 2 Vfor a power BJT. Zero base current results in an off transistor. The idealized i-vcharacteristic for the BJTis shown in Fig. 1-11c. The BJTis a current-controlled device, and power BJTs typically have low hFEvalues, sometimeslower than 20. If a power BJTwith hFE= 20 is to carry a collector current of60 A, for example, the base current would need to be more than 3 Ato put thetransistor into saturation. The drive circuit to provide a high base current is asignificant power circuit in itself. Darlington configurations have two BJTsconnected as shown in Fig. 1-11d. The effective current gain of the combina-tion is approximately the product of individual gains and can thus reduce theGCEGateCollectorEmitter(b)(a)CEGFigure 1-12IGBT: (a) Equivalent circuit; (b) circuit symbols.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 10
1.5Switch Selection11current required from the drive circuit. The Darlington configuration can beconstructed from two discrete transistors or can be obtained as a single inte-grated device. Power BJTs are rarely used in new applications, being sur-passed by MOSFETs and IGBTs.The IGBTof Fig. 1-12is an integrated connection of a MOSFETand a BJT. The drive circuit for the IGBTis like that of the MOSFET, while the on-state characteristics are like those of the BJT. IGBTs have replaced BJTs inmany applications.1.5SWITCH SELECTIONThe selection of a power device for a particular application depends not only onthe required voltage and current levels but also on its switching characteristics.Transistors and GTOs provide control of both turn-on and turnoff, SCRs of turn-on but not turnoff, and diodes of neither.Switching speeds and the associated power losses are very important inpower electronics circuits. The BJTis a minority carrier device, whereas theMOSFETis a majority carrier device that does not have minority carrier storagedelays, giving the MOSFETan advantage in switching speeds. BJTswitchingtimes may be a magnitude larger than those for the MOSFET. Therefore, theMOSFETgenerally has lower switching losses and is preferred over the BJT.When selecting a suitable switching device, the Þrst consideration is therequired operating point and turn-on and turnoff characteristics. Example 1-1outlines the selection procedure.EXAMPLE 1-1Switch SelectionThe circuit of Fig. 1-13ahas two switches. Switch S1is on and connects the voltagesource (Vs= 24 V) to the current source (Io= 2 A). It is desired to open switch S1to dis-connect Vsfrom the current source. This requires that a second switch S2close to providea path for current Io, as in Fig. 1-13b. At a later time, S1must reclose and S2must open torestore the circuit to its original condition. The cycle is to repeat at a frequency of 200 kHz.Determine the type of device required for each switch and the maximum voltage and cur-rent requirements of each.■SolutionThe type of device is chosen from the turn-on and turnoff requirements, the voltage andcurrent requirements of the switch for the on and off states, and the required switchingspeed.The steady-state operating points for S1are at (v1, i1) = (0,Io) for S1closed and (Vs,0)for the switch open (Fig. 1-13c). The operating points are on the positive iand vaxes, andS1must turn off when i1= Io0 and must turn on when v1= Vs0. The device used forS1must therefore provide control of both turn-on and turnoff. The MOSFETcharacteristichar80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 11
12CHAPTER 1Introductionof Fig. 1-10dor the BJTcharacteristic of Fig. 1-11cmatches the requirement. AMOSFETwould be a good choice because of the required switching frequency, simple gate-drive requirements, and relatively low voltage and current requirement (24 Vand 2 A).The steady-state operating points for S2are at (v2, i2) = (Vs,0) in Fig. 1-13aand(0,Io) in Fig. 1-13b, as shown in Fig. 1-13d.The operating points are on the positive cur-rent axis and negative voltage axis. Therefore, a positive current in S2is the requirementto turn S2on, and a negative voltage exists when S2must turn off. Since the operatingpoints match the diode (Fig. 1-8c) and no other control is needed for the device, a diodeis an appropriate choice for S2. Figure 1-13eshows the implementation of the switchingcircuit. Maximum current is 2 A, and maximum voltage in the blocking state is 24 V.i1v1ClosedOpen(0, Io)(Vs, 0)S1(c)i2v2ClosedOpen(0, Io)(−Vs, 0)S2(d)+−S1S2(f)IoS1S2Vs(e)+−+−i1v1VsIoi2v2S1S2++−−(a)(b)+−i1v1Vs IoIoi2v2S1S2++−−Figure 1-13Circuit for Example 1-1. (a) S1closed, S2open; (b) S1open, S2closed; (c) operating points for S1; (d) operating points for S2; (e) switch implementation using a MOSFETand diode; (f) switch implementation using two MOSFETs (synchronousrectiÞcation).har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 12
1.6SPICE, PSpice, and Capture13Although a diode is a sufÞcient and appropriate device for the switch S2, a MOSFETwould also work in this position, as shown in Fig. 1-13f. When S2is on and S1is off, cur-rent ßows upward out of the drain of S2. The advantage of using a MOSFETis that it hasa much lower voltage drop across it when conducting compared to a diode, resulting inlower power loss and a higher circuit efÞciency. The disadvantage is that a more complexcontrol circuit is required to turn on S2when S1is turned off. However, several control cir-cuits are available to do this. This control scheme is known as synchronous rectiÞcationor synchronous switching.In a power electronics application, the current source in this circuit could representan inductor that has a nearly constant current in it.1.6SPICE, PSPICE, AND CAPTUREComputer simulation is a valuable analysis and design tool that is emphasizedthroughout this text. SPICE is a circuit simulation program developed in the Department of Electrical Engineering and Computer Science at the University ofCalifornia at Berkeley. PSpice is a commercially available adaptation of SPICEthat was developed for the personal computer. Capture is a graphical interfaceprogram that enables a simulation to be done from a graphical representation ofa circuit diagram. Cadence provides a product called OrCAD Capture, and ademonstration version at no cost.1Nearly all simulations described in this text-book can be run using the demonstration version.Simulation can take on various levels of device and component modeling,depending on the objective of the simulation. Most of the simulation examplesand exercises use idealized or default component models, making the resultsÞrst-order approximations, much the same as the analytical work done in the Þrstdiscussion of a subject in any textbook. After understanding the fundamental op-eration of a power electronics circuit, the engineer can include detailed devicemodels to predict more accurately the behavior of an actual circuit.Probe, the graphics postprocessor program that accompanies PSpice, isespecially useful. In Probe, the waveform of any current or voltage in a cir-cuit can be shown graphically. This gives the student a look at circuit behav-ior that is not possible with pencil-and-paper analysis. Moreover, Probe iscapable of mathematical computations involving currents and/or voltages,including numerical determination of rms and average values. Examples ofPSpiceanalysis and design for power electronics circuits are an integral partof this textbook.The PSpice circuit files listed in this text were developed using version16.0. Continuous revision of software necessitates updates in simulation techniques.1https://www.cadence.com/products/orcad/pages/downloads.aspx#demohar80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 13
14CHAPTER 1IntroductionR = 106 Ω Off (Open)R = 10−3 Ω On (Closed) Figure 1-14Implementing a switch with a resistance in PSpice.EXAMPLE 1-21.7 SWITCHES IN PSPICEThe Voltage-Controlled SwitchThe voltage-controlled switch Sbreak in PSpice can be used as an idealized modelfor most electronic devices. The voltage-controlled switch is a resistance that hasa value established by a controlling voltage. Fig. 1-14illustrates the concept ofusing a controlled resistance as a switch for PSpice simulation of power electron-ics circuits. AMOSFETor other switching device is ideally an open or closedswitch. Alarge resistance approximates an open switch, and a small resistance ap-proximates a closed switch. Switch model parameters are as follows:ParameterDescriptionDefault ValueRONÒOnÓ resistance1 (reduce this to 0.001 or 0.01 )ROFFÒOffÓ resistance106VONControl voltage for on state1.0 VVOFFControl voltage for off state0 VThe resistance is changed from large to small by the controlling voltage. Thedefault off resistance is 1 M, which is a good approximation for an open circuitin power electronics applications. The default on resistance of 1 is usually toolarge. If the switch is to be ideal, the on resistance in the switch model should bechanged to something much lower, such as 0.001 or 0.01 .AVoltage-Controlled Switch in PSpiceThe Capture diagram of a switching circuit is shown in Fig. 1-15a. The switch is implemented with the voltage-controlled switch Sbreak, located in the Breakout li-brary of devices. The control voltage is VPULSE and uses the characteristics shown.The rise and fall times, TR and TF, are made small compared to the pulse width andperiod, PWand PER. V1 and V2 must span the on and off voltage levels for theswitch, 0 and 1 Vby default. The switching period is 25 ms, corresponding to a fre-quency of 40 kHz.The PSpice model for Sbreak is accessed by clicking edit, then PSpice model. Themodel editor window is shown in Fig 1-15b. The on resistance Ron is changed to 0.001 har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 14
1.7Switches in PSpice15Figure 1-15(a) Circuit for Example 1-2; (b) editing the PSpice Sbreak switch model tomake Ron = 0.001; (c) the transient analysis setup; (d) the Probe output.(b)(c)+++ÐÐ−SbreakRloadVcontrolVsS1224V00V1 = 0V2 = 5TD = 0TR = 1nTF = 1nPW = 10usPER = 25usVPULSE(a)+−har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 15
16CHAPTER 1Introductionto approximate an ideal switch. The Transient Analysis menu is accessed from SimulationSettings. This simulation has a run time of 80 s, as shown in Fig. 1-15c.Probe output showing the switch control voltage and the load resistor voltage wave-forms is seen in Fig. 1-15d.TransistorsTransistors used as switches in power electronics circuits can be idealized forsimulation by using the voltage-controlled switch. As in Example 1-2, an idealtransistor can be modeled as very small on resistance. An on resistance matchingthe MOSFETcharacteristics can be used to simulate the conducting resistanceRDS(ON)of a MOSFETto determine the behavior of a circuit with nonideal com-ponents. If an accurate representation of a transistor is required, a model may beavailable in the PSpice library of devices or from the manufacturerÕs website. TheIRF150 and IRF9140 models for power MOSFETs are in the demonstration ver-sion library. The default MOSFETMbreakN or MbreakN3 model must haveparameters for the threshold voltage VTO and the constant KPadded to thePSpice device model for a meaningful simulation. ManufacturerÕs websites, suchas International RectiÞer at www.irf.com, have SPICE models available for their(d)TimeV(Vcontrol:+)Load Resistor VoltageSwitch Control Voltage10.0 V7.5 V5.0 V2.5 V0 VV(Rload:2)40 V20 VSEL>>0 V0 s20 s40 s60 s80 sFigure 1-15(continued)har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 16
1.7Switches in PSpice17products. The default BJTQbreakN can be used instead of a detailed transistormodel for a rudimentary simulation.Transistors in PSpice must have drive circuits, which can be idealized if thebehavior of a speciÞc drive circuit is not required. Simulations with MOSFETscan have drive circuits like that in Fig. 1-16. The voltage source VPULSE estab-lishes the gate-to-source voltage of the MOSFETto turn it on and off. The gateresistor may not be necessary, but it sometimes eliminates numerical conver-gence problems.DiodesAn ideal diode is assumed when one is developing the equations that describe apower electronics circuit, which is reasonable if the circuit voltages are muchlarger than the normal forward voltage drop across a conducting diode. Thediode current is related to diode voltage by (1-2)where nis the emission coefÞcient which has a default value of 1 in PSpice. Anideal diode can be approximated in PSpice by setting nto a small number suchas 0.001 or 0.01. The nearly ideal diode is modeled with the part Dbreak withPSpice modelmodel Dbreak Dn 0.001With the ideal diode model, simulation results will match the analyticalresults from the describing equations. APSpice diode model that more accu-rately predicts diode behavior can be obtained from a device library. Simula-tions with a detailed diode model will produce more realistic results than theidealized case. However, if the circuit voltages are large, the differencebetween using an ideal diode and an accurate diode model will not affect theresults in any significant way. The default diode model for Dbreak can be usedas a compromise between the ideal and actual cases, often with little differ-ence in the result.idISevd>nVT1+−VsM1RGVcontrol10Rload24V20IRF150V1 = 0V2 = 12TD = 0TR = 1nTF = 1nPW = 10usPER = 25usVPULSE+−Figure 1-16An idealized MOSFETdrive circuit in PSpice.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 17
18CHAPTER 1IntroductionThyristors (SCRs)An SCR model is available in the PSpice demonstration version part library andcan be used in simulating SCR circuits. However, the model contains a relativelylarge number of components which imposes a size limit for the PSpice demonstra-tion version. Asimple SCR model that is used in several circuits in this text is aswitch in series with a diode, as shown in Fig. 1-17. Closing the voltage-controlledswitch is equivalent to applying a gate current to the SCR, and the diode preventsreverse current in the model. This simple SCR model has the signiÞcant disadvan-tage of requiring the voltage-controlled switch to remain closed during the entireon time of the SCR, thus requiring some prior knowledge of the behavior of a cir-cuit that uses the device. Further explanation is included with the PSpice examplesin later chapters.Convergence Problems in PSpiceSome of the PSpice simulations in this book are subject to numerical conver-gence problems because of the switching that takes place in circuits withinductors and capacitors. All the PSpice files presented in this text have beendesigned to avoid convergence problems. However, sometimes changing acircuit parameter will cause a failure to converge in the transient analysis. Inthe event that there is a problem with PSpice convergence, the followingremedies may be useful:¥Increase the iteration limit ITL4 from 10 to 100 or larger. This is anoption accessed from the Simulation Profile Options, as shown in Fig. 1-18.¥Change the relative tolerance RELTOLto something other than the defaultvalue of 0.001.¥Change the device models to something that is less than ideal. For example,change the on resistance of a voltage-controlled switch to a larger value, oruse a controlling voltage source that does not change as rapidly. An idealdiode could be made less ideal by increasing the value of nin the model.Generally, idealized device models will introduce more convergenceproblems than real device models.Figure 1-17SimpliÞed thyristor (SCR) model for PSpice.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 18
1.8Bibliography19¥Add an RC ÒsnubberÓ circuit. Aseries resistance and capacitance with asmall time constant can be placed across switches to prevent voltagesfrom changing too rapidly. For example, placing a series combination ofa 1-kresistor and a 1-nF capacitor in parallel with a diode (Fig. 1-19)may improve convergence without affecting the simulation results.1.8BIBLIOGRAPHYM. E. Balci and M. H. Hocaoglu, ÒComparison of Power DeÞnitions for ReactivePower Compensation in Nonsinusoidal Circuits,Ó International Conference onHarmonics and Quality of Power, Lake Placid, N.Y. 2004.Figure 1-18The Options menu for settings that can solve convergence problems. RELTOLand ITL4 have been changed here.Figure 1-19RC circuit to aid in PSpice convergence.har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 19
20CHAPTER 1IntroductionL. S. Czarnecki, ÒConsiderations on the Reactive Power in Nonsinusoidal Situations,ÓInternational Conference on Harmonics in Power Systems, Worcester PolytechnicInstitute, Worcester, Mass., 1984, pp 231Ð237.A. E. Emanuel, ÒPowers in Nonsinusoidal Situations, AReview of Definitions and Physical Meaning,Ó IEEE Transactions on Power Delivery, vol. 5, no. 3, July 1990.G. T. Heydt, Electric Power Quality, Stars in a Circle Publications, West Lafayette,Ind., 1991.W. Sheperd and P. Zand, Energy Flow and Power Factor in Nonsinusoidal Circuits,Cambridge University Press, 1979.Problems1-1.The current source in Example 1-1 is reversed so that positive current is upward.The current source is to be connected to the voltage source by alternately closingS1and S2. Draw a circuit that has a MOSFETand a diode to accomplish thisswitching.1-2.Simulate the circuit in Example 1-1 using PSpice. Use the voltage-controlledswitch Sbreak for S1and the diode Dbreak for S2. (a) Edit the PSpice models toidealize the circuit by using RON = 0.001 for the switch and n= 0.001 for thediode. Display the voltage across the current source in Probe. (b) Use RON = 0.1 in Sbreak and n= 1 (the default value) for the diode. How do the results of partsaand bdiffer?1-3.The IRF150 power MOSFETmodel is in the EVALlibrary that accompanies thedemonstration version of PSpice. Simulate the circuit in Example 1-1, using theIRF150 for the MOSFETand the default diode model Dbreak for S2. Use anidealized gate drive circuit similar to that of Fig. 1-16. Display the voltageacross the current source in Probe. How do the results differ from those usingideal switches?1-4.Use PSpice to simulate the circuit of Example 1-1. Use the PSpice default BJTQbreakN for switch S1. Use an idealized base drive circuit similar to that of thegate drive circuit for the MOSFETin Fig. 1-9. Choose an appropriate baseresistance to ensure that the transistor turns on for a transistor hFEof 100. Use thePSpice default diode Dbreak for switch S2. Display the voltage across the currentsource. How do the results differ from those using ideal switches?har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 20
CHAPTER221PowerComputations2.1INTRODUCTIONPower computations are essential in analyzing and designing power electronicscircuits. Basic power concepts are reviewed in this chapter, with particular em-phasis on power calculations for circuits with nonsinusoidal voltages and currents.Extra treatment is given to some special cases that are encountered frequently inpower electronics. Power computations using the circuit simulation programPSpice are demonstrated.2.2POWER AND ENERGYInstantaneous PowerThe instantaneous power for any device is computed from the voltage across itand the current in it. Instantaneous powerisp(t) v(t)i(t)(2-1)This relationship is valid for any device or circuit. Instantaneous power isgenerally a time-varying quantity. If the passive sign convention illustrated inFig. 2-1ais observed, the device is absorbing power if p(t) is positive at aspecified value of time t. The device is supplying power if p(t) is negative.Sources frequently have an assumed current direction consistent with supply-ing power. With the convention of Fig. 2-1b, a positive p(t)indicates thesource is supplying power.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 21
22CHAPTER 2Power ComputationsEnergyEnergy, or work, is the integral of instantaneous power. Observing the passivesign convention, energy absorbed by a component in the time interval from t1to t2is(2-2)If v(t)is in volts and i(t)is in amperes, power has units of watts and energy hasunits of joules.Average PowerPeriodic voltage and current functions produce a periodic instantaneous powerfunction. Average power is the time average of p(t)over one or more periods.Average powerPis computed from(2-3)where Tis the period of the power waveform. Combining Eqs. (2-3) and (2-2),power is also computed from energy per period.(2-4)Average power is sometimes called real poweror active power, especially in accircuits. The term powerusually means average power. The total average powerabsorbed in a circuit equals the total average power supplied.PWTP1T3t0Tt0p(t)dt1T3t0Tt0v(t)i(t)dtW3t2t1p(t)dti(t)i(t)v(t)+−v(t)+−(a)(b)Figure 2-1(a) Passivesign convention: p(t) 0indicates power is beingabsorbed; (b)p(t)0indicates power is beingsupplied by the source.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 22
2.2Power and Energy23Power and EnergyVoltage and current, consistent with the passive sign convention, for a device are shownin Fig. 2-2aand b. (a)Determine the instantaneous power p(t)absorbed by the device.(b)Determine the energy absorbed by the device in one period. (c)Determine the aver-age power absorbed by the device.■Solution(a)The instantaneous power is computed from Eq. (2-1). The voltage and current areexpressed asInstantaneous power, shown in Fig. 2-2c, is the product of voltage and current andis expressed asp(t)c400 W300 W0 0t6 ms6 mst10 ms10 mst20 msi(t)b20 V15 A 0t6 ms6 mst20 msv(t)b20V0 0t10 ms10 mst20 msEXAMPLE 2-1Figure 2-2Voltage, current, and instantaneous power for Example 2-1.v(t)20 Vi(t)20 A0−15 Ap(t)400 W0−300 W0t10 ms20 ms(a)t6 ms20 ms(b)(c)t6 ms20 ms10 mshar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 23
24CHAPTER 2Power Computations(b)Energy absorbed by the device in one period is determined from Eq. (2-2).(c)Average power is determined from Eq. (2-3).Average power could also be computed from Eq. (2-4) by using the energy per periodfrom part (b).Aspecial case that is frequently encountered in power electronics is the powerabsorbed or supplied by a dc source. Applications include battery-charging cir-cuits and dc power supplies. The average power absorbed by a dc voltage sourcev(t)Vdcthat has a periodic current i(t)is derived from the basic deÞnition ofaverage power in Eq. (2-3):Bringing the constant Vdcoutside of the integral givesThe term in brackets is the average of the current waveform. Therefore, averagepower absorbed by a dc voltage source is the product of the voltage and the average current.(2-5)Similarly, average power absorbed by a dc source i(t)Idcis(2-6)PdcIdcVavgPdcVdcIavgPdcVdcC1T3t0Tt0i(t)dtSPdc1T3t0Tt0v(t)i(t) dt1T3t0Tt0Vdci(t) dt PWT1.2 J0.020 s60 W 2.41.200.02060WP1T3T0p(t)dt10.020P30.0060400dt30.0100.006300dt30.0200.0100dtQW3T0p(t)dt30.0060400dt30.0100.006300dt30.0200.0100dt2.41.21.2Jhar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 24
2.3Inductors and Capacitors252.3INDUCTORS AND CAPACITORSInductors and capacitors have some particular characteristics that are importantin power electronics applications. For periodic currents and voltages,(2-7)For an inductor, the stored energy is(2-8)If the inductor current is periodic, the stored energy at the end of one period is thesame as at the beginning. No net energy transfer indicates that the average powerabsorbed by an inductor is zero for steady-state periodic operation.(2-9)Instantaneous power is not necessarily zero because power may be absorbedduring part of the period and returned to the circuit during another part of theperiod.Furthermore, from the voltage-current relationship for the inductor(2-10)Rearranging and recognizing that the starting and ending values are the same forperiodic currents, we have(2-11)Multiplying by L/Tyields an expression equivalent to the average voltage acrossthe inductor over one period.(2-12)Therefore, for periodic currents, the average voltage across an inductor is zero.This is very important and will be used in the analysis of many circuits, includ-ing dc-dc converters and dc power supplies.For a capacitor, stored energy is(2-13)w(t)12Cv2(t) avg[vL(t)]VL1T3t0Tt0vL(t) dt0i(t0T)i(t0)1L3t0Tt0vL(t) dt0 i(t0T)1L3t0Tt0vL(t) dti(t0) PL0 w(t)12Li2(t) i(tT)i(t)v(tT)v(t)har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 25
26CHAPTER 2Power ComputationsIf the capacitor voltage is periodic, the stored energy is the same at the end of aperiod as at the beginning. Therefore, the average power absorbed by the capac-itor is zero for steady-state periodic operation.(2-14)From the voltage-current relationship for the capacitor,(2-15)Rearranging the preceding equation and recognizing that the starting and endingvalues are the same for periodic voltages, we get(2-16)Multiplying by C/Tyields an expression for average current in the capacitor overone period.(2-17)Therefore, for periodic voltages, the average current in a capacitor is zero. avg[iC(t)]IC1T3t0Tt0iC(t)dt0 v(t0T)v(t0)1C3t0Tt0iC(t) dt0 v(t0T)1C3t0Tt0iC(t) dtv(t0) PC0 EXAMPLE 2-2Power and Voltage for an InductorThe current in a 5-mH inductor of Fig. 2-3ais the periodic triangular wave shown in Fig. 2-3b. Determine the voltage, instantaneous power, and average power for theinductor.■SolutionThe voltage across the inductor is computed from v(t) L(di/dt) and is shown in Fig. 2-3c. The average inductor voltage is zero, as can be determined from Fig. 2-3cby inspection. The instantaneous power in the inductor is determined from p(t)v(t)i(t)and is shown in Fig. 2-3d. When p(t) is positive, the inductor is absorbing power, andwhen p(t) is negative, the inductor is supplying power. The average inductor power is zero.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 26
2.4Energy Recovery272.4ENERGYRECOVERYInductors and capacitors must be energized and deenergized in several applica-tions of power electronics. For example, a fuel injector solenoid in an automobileis energized for a set time interval by a transistor switch. Energy is stored in thesolenoidÕs inductance when current is established. The circuit must be designedto remove the stored energy in the inductor while preventing damage to the tran-sistor when it is turned off. Circuit efÞciency can be improved if stored energycan be transferred to the load or to the source rather than dissipated in circuit resistance. The concept of recovering stored energy is illustrated by the circuitsdescribed in this section.Fig. 2-4ashows an inductor that is energized by turning on a transistorswitch. The resistance associated with the inductance is assumed to be negligi-ble, and the transistor switch and diode are assumed to be ideal. The diode-resistor path provides a means of opening the switch and removing the storedi(t)ttt4 Av(t)20 Vp(t)80 W−80 W(b)(c)(d)−20 V1 ms2 ms3 ms4 ms0v(t)5 mHi(t)(a)+−Figure 2.3(a) Circuit for Example 2-2; (b)inductor current; (c)inductorvoltage; (d)inductor instantaneous power.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 27
28CHAPTER 2Power Computationsenergy in the inductor when the transistor turns off. Without the diode-resistorpath, the transistor could be destroyed when it is turned off because a rapid decrease in inductor current would result in excessively high inductor and tran-sistor voltages.Assume that the transistor switch turns on at t0 and turns off at tt1. The circuit is analyzed first for the transistor switch on and then for the switch off.T00t1t1TttiS(t)iL(t)(d)0is+VCCt1TLRiL(a)iS = iLVCCiLvL = VCC+-iS = 0VCCiL(b)(c)Figure 2-4(a)Acircuit to energize an inductance and then transfer the stored energyto a resistor; (b)Equivalent circuit when the transistor is on; (c)Equivalent circuitwhen the transistor is off and the diode is on; (d)Inductor and source currents.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 28
2.4Energy Recovery29Transistoron: 0 tt1The voltage across the inductor is VCC, and the diode is reverse-biased when thetransistor is on (Fig. 2-4b).(2-18)An expression for inductor current is obtained from the voltage-current relationship:(2-19)Source current is the same as inductor current.(2-20)Inductor and source currents thus increase linearly when the transistor is on.The circuit is next analyzed for the transistor switch off.Transistoroff: t1tTIn the interval t1tT, the transistor switch is off and the diode is on (Fig. 2-4c).The current in the source is zero, and the current in the inductor and resistor is adecaying exponential with time constant L/R. The initial condition for inductorcurrent is determined from Eq. (2-19):(2-21)Inductor current is then expressed as(2-22)where L/R. Source current is zero when the transistor is off.(2-23)Average power supplied by the dc source during the switching period isdetermined from the product of voltage and average current [Eq. (2-5)].(2-24) VCCC1T3t10VCCtL dt1T3Tt10 dtS(VCCt1)22LTPSVSISVCCC1T3T0is(t) dtSiS0 iL(t)iL(t1)e(tt1)/aVCCt1Lbe(tt1)/ t1tTiL(t1)VCCt1L is(t)iL(t)iL(t)1L3t0vL(l)dliL(0)1L3t0VCCdl0VCCtL vLVCChar80679_ch02_021-064.qxd 12/17/09 1:55 PM Page 29
30CHAPTER 2Power ComputationsAverage power absorbed by the resistor could be determined by integratingan expression for instantaneous resistor power, but an examination of the circuitreveals an easier way. The average power absorbed by the inductor is zero, andpower absorbed by the ideal transistor and diode is zero. Therefore, all powersupplied by the source must be absorbed by the resistor:(2-25)Another way to approach the problem is to determine the peak energy stored inthe inductor,(2-26)The energy stored in the inductor is transferred to the resistor while the tran-sistor switch is open. Power absorbed by the resistor can be determined fromEq. (2-4).(2-27)which must also be the power supplied by the source. The function of the resis-tor in this circuit of Fig. 2-4ais to absorb the stored energy in the inductance andprotect the transistor. This energy is converted to heat and represents a powerloss in the circuit.Another way to remove the stored energy in the inductor is shown in Fig. 2-5a.Two transistor switches are turned on and off simultaneously. The diodes providea means of returning energy stored in the inductor back to the source. Assumethat the transistors turn on at t0 and turn off at tt1. The analysis of the cir-cuit of Fig. 2-5abegins with the transistors on.Transistors on: 0 tt1When the transistors are on, the diodes are reverse-biased, and the voltage acrossthe inductor is VCC. The inductor voltage is the same as the source when the tran-sistors are on (Fig. 2-5b):(2-28)Inductor current is the function(2-29)iL(t)1L3t0vL(l)dliL(0)1L3t0VCCdl 0VCCtL vLVCC PRWT(VCCt1)22LTW 12Li2(t1) 12LaVCCt1Lb2(VCCt1)22L PRPS(VCCt1)22LT har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 30
2.4Energy Recovery31Source current is the same as inductor current.iS(t) iL(t)(2-30)From the preceding equations, inductor and source currents increase linearlywhile the transistor switches are on, as was the case for the circuit of Fig. 2-4a.The circuit is next analyzed for the transistors off.Figure 2-5(a) Acircuit to energize an inductance and recover the storedenergy by transferring it back to the source; (b) Equivalent circuit when thetransistors are on; (c) Equivalent circuit when the transistors are off and thediodes are on; (d) Inductor and source currents.(d)t1t12t12t1ttTTiL(t)iS(t)00iSiLiLLiLiS = iL vL = VCC vL = −VCCiS = −iLVCCVCCVCC+++(a)(b)(c)0t1T−har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 31
32CHAPTER 2Power ComputationsTransistors off: t1tTWhen the transistors are turned off, the diodes become forward-biased to providea path for the inductor current (Fig. 2-5c). The voltage across the inductor thenbecomes the opposite of the source voltage:vL VCC(2-31)An expression for inductor current is obtained from the voltage-current relationship.or,(2-32)Inductor current decreases and becomes zero at t2t1,at which time the diodesturn off. Inductor current remains at zero until the transistors turn on again.Source current is the opposite of inductor current when the transistors are offand the diodes are on:iS(t) iL(t)(2-33)The source is absorbing power when the source current is negative. Averagesource current is zero, resulting in an average source power of zero.The source supplies power while the transistors are on, and the source absorbspower while the transistors are off and the diodes are on. Therefore, the energystored in the inductor is recovered by transferring it back to the source. Practicalsolenoids or other magnetic devices have equivalent resistances that representlosses or energy absorbed to do work, so not all energy will be returned to thesource. The circuit of Fig. 2-5ahas no energy losses inherent to the design and istherefore more efÞcient than that of Fig. 2-4a.iL(t)aVCCLb(2t1t) t1t2t1 aVCCLb[(t1t)t1]iL(t)1L3tt1vL(l) dliL(t1)1L3tt1(VCC) dlVCCt1LEXAMPLE 2-3Energy RecoveryThe circuit of Fig. 2-4ahas VCC90 V, L200 mH, R20 , t110 ms, and T100 ms. Determine (a)the peak current and peak energy storage in the inductor, (b)the average power absorbed by the resistor, and (c)the peak and average power sup-plied by the source. (d)Compare the results with what would happen if the inductor wereenergized using the circuit of Fig. 2-5a.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 32
2.4Energy Recovery33■Solution(a)From Eq. (2-19), when the transistor switch is on, inductor current isPeak inductor current and stored energy are(b)The time constant for the current when the switch is open is L/R200 mH/2010 ms. The switch is open for 90 ms, which is 10 time constants, so essentially allstored energy in the inductor is transferred to the resistor:Average power absorbed by the resistor is determined from Eq. (2-4):(c)The source current is the same as the inductor current when the switch is closed andis zero when the switch is open. Instantaneous power supplied by the source iswhich has a maximum value of 405 Wat t10 ms. Average power supplied by thesource can be determined from Eq. (2-3):Average source power also can be determined from Eq. (2-5). Average of thetriangular source current waveform over one period isand average source power is thenStill another computation of average source power comes from recognizing that thepower absorbed by the resistor is the same as that supplied by the source.(See Example 2-13 at the end of this chapter for the PSpice simulation of this circuit.)PSPR20.25 W PSVCCIS(90 V)(0.225 A)20.25 W IS12B(0.01 s)(4.5 A)0.1 sR0.225 APS1T3T0pS(t) dt10.1£30.01040,500t dt30.10.010 dt≥20.25 WpS(t)vS(t)iS(t)b(90 V)(450t A)40,500t W 0t10 ms 0 10 mst100 msPRWRT2.025 J0.1 s20.25 W WRWL2.025 J WL12Li2(t1)12(0.2)(4.5)22.025 J iL(t1)450(0.01)4.5 A iL(t)aVCCLbta900.2bt450 t A 0t10 mshar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 33
34CHAPTER 2Power Computations(d)When the inductor is energized from the circuit of Fig. 2-5a, the inductor current isdescribed by Eqs. (2-29) and (2-32).The peak current and peak energy storage are the same as for the circuit of Fig. 2-4a.The source current has the form shown in Fig. 2-5dand is expressed asInstantaneous power supplied by the source isAverage source current is zero, and average source power is zero. Peak sourcepower is peak current times voltage, which is 405 Was in part (c).2.5EFFECTIVE VALUES: RMSThe effective value of a voltage or current is also known as the root-mean-square(rms) value. The effective value of a periodic voltage waveform is based on theaverage power delivered to a resistor. For a dc voltage across a resistor,(2-34)For a periodic voltage across a resistor, effective voltageis deÞned as the voltagethat is as effective as the dc voltage in supplying average power. Effective volt-age can be computed using the equation(2-35)Computing average resistor power from Eq. (2-3) gives(2-36) 1RC1T3T0v2(t) dtSP1T3T0p(t) dt1T3T0v(t)i(t) dt1T3T0 v2(t)RdtPV2effR PV2dcR pS(t)90iS(t)c40,500t W 0t10 ms40,500t810 W 10 mst20 ms0 20 mst100 msiS(t)c 450t A 0t10 ms450t9 A 10 mst20 ms0 20 mst100 ms iL(t)c450t A9450t A0 0t10 ms10 mst20 ms20 mst100 mshar80679_ch02_021-064.qxd 12/17/09 1:56 PM Page 34
2.5Effective Values: RMS35Equating the expressions for average power in Eqs. (2-35) and (2-36) givesorresulting in the expression for effective or rms voltage(2-37)The effective value is the square rootof the meanof the squareof the voltageÑhence the term root mean square.Similarly, rms current is developed from P I2rmsas(2-38)The usefulness of the rms value of voltages and currents lies in the computingpower absorbed by resistances. Additionally, ac power system voltages and cur-rents are invariably given in rms values. Ratings of devices such as transformersare often speciÞed in terms of rms voltage and current. IrmsC1T3T0i2(t) dt VeffVrmsC1T3T0v2(t) dt V2eff 1T3T0v2(t) dtPV2effR1RC1T3T0v2(t) dtSFigure 2-6Pulse waveform for Example 2-4.VmDTTtEXAMPLE 2-4RMS Value of a Pulse WaveformDetermine the rms value of the periodic pulse waveform that has a duty ratio of Dasshown in Fig. 2-6.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 35
36CHAPTER 2Power Computations■SolutionThe voltage is expressed asUsing Eq. (2-37) to determine the rms value of the waveform givesyieldingVrmsVm2DVrmsC1T3T0v2(t)dtC1Ta3DT0V2m dt3TDT02 dtbA1T (V2mDT )v(t)eVm 0tDT0 DTtT EXAMPLE 2-5RMSValues of SinusoidsDetermine the rms values of (a) a sinusoidal voltage of v(t) Vmsin(t), (b) a full-waverectiÞed sine wave of v(t) |Vmsin(t)|, and (c) a half-wave rectiÞed sine wave of v(t) Vmsin(t) for 0 tT/2 and zero otherwise.■Solution(a)The rms value of the sinusoidal voltage is computed from Eq. (2-37):An equivalent expression uses tas the variable of integration. Without showing the details of the integration, the result isNote that the rms value is independent of the frequency.(b)Equation (2-37) can be applied to the full-wave rectiÞed sinusoid, but the results ofpart (a) can also be used to advantage. The rms formula uses the integral of thesquare of the function. The square of the sine wave is identical to the square of thefull-wave rectiÞed sine wave, so the rms values of the two waveforms are identical:VrmsVm12VrmsF12320V2m sin2(t) d(t) Vm12 VrmsF1T3T0V2m sin2(t) dt where T2 har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 36
2.5Effective Values: RMS37(c)Equation (2-37) can be applied to the half-wave rectiÞed sinusoid.The result of part (a) will again be used to evaluate this expression. The squareof the function has one-half the area of that of the functions in (a) and (b). That is,Taking the 1/2outside of the square root givesThe last term on the right is the rms value of a sine wave which is known to be Vm/, so the rms value of a half-wave rectiÞed sine wave isFigure 2-7 shows the waveforms.VrmsA12 Vm12Vm2 12VrmsaA12bF12320V2m sin2(t) d(t) VrmsF1230V2m sin2(t) d(t) Fa12b12320V2m sin2(t) d(t) VrmsF12£30V2m sin2(t) d(t)3202 d(t)≥F1230V2m sin2(t) d(t) Figure 2-7Waveforms and their squares forExample 2-5 (a) Sine wave; (b) full-waverectiÞed sine wave; (c) half-wave rectiÞed sine wave.i(t)i2(t)0(a)har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 37
38CHAPTER 2Power ComputationsNeutral Conductor Current in a Three-Phase SystemAn ofÞce complex is supplied from a three-phase four-wire voltage source (Fig. 2-8a).The load is highly nonlinear as a result of the rectiÞers in the power supplies of the equip-ment, and the current in each of the three phases is shown in Fig. 2-8b. The neutral cur-rent is the sum of the phase currents. If the rms current in each phase conductor is knownto be 20 A, determine the rms current in the neutral conductor.■SolutionEquation (2-38) may be applied to this case. Noting by inspection that the area of thesquare of the current function in the neutral in, is 3 times that of each of the phases ia(Fig. 2-8c)In,rmsF1T3T0i2n(t) d(t)F3¢1T3T0i2a(t) d(t)≤23 Ia,rms Figure 2-7(continued)i(t)i2(t)0i(t)i2(t)0(b)(c)EXAMPLE 2-6har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 38
2.5Effective Values: RMS39The rms current in the neutral is thereforeNote that the rms neutral current is larger than the phase currents for this situation.This is much different from that for balanced linear loads where the line currents areIn,rms23 (20)34.6 AFigure 2-8(a) Three-phase source supplying a balancednonlinear three-phase load for Example 2-8; (b) phase andneutral currents; (c) squares of iaand in.+-+-+-ia i2a i2n van vbn vcn ib ic in (a)(b)(c)van, ia vbn, ib vcn, ic inhar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 39
40CHAPTER 2Power Computationssinusoids which are displaced by 120and sum to zero. Three-phase distribution systemssupplying highly nonlinear loads should have a neutral conductor capable of carrying times as much current as the line conductor.If a periodic voltage is the sum of two periodic voltage waveforms, v(t) v1(t) v2(t), the rms value of v(t) is determined from Eq. (2-37) asorThe term containing the product v1v2in the above equation is zero if the functions v1and v2are orthogonal. Acondition that satisÞes that requirementoccurs when v1and v2are sinusoids of different frequencies. For orthogonalfunctions,Noting thatthenIf a voltage is the sum of more than two periodic voltages, all orthogonal, the rmsvalue is(2-39)Similarly,(2-40)Note that Eq. (2-40) can be applied to Example 2-6 to obtain the rms value of theneutral current. Irms2I 21, rms I 22, rms I 23, rms Á BaNn1I 2n, rms Vrms2V 21, rms V 22, rms V 23, rms Á BaNn1V 2n, rms Vrms2V 21, rmsV 22, rms 1T3T0v21(t) dt V 21, rms and 1T3T0v22(t) dtV22, rmsV2rms1T3T0v21(t) dt1T3T0v22(t) dt V2rms1T3T0v21 dt1T3T02v1v2 dt1T3T0v22 dt V2rms1T3T0Av1v2B2 dt1T3T0Av212v1v2v22B dt13har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 40
2.5Effective Values: RMS41RMS Value of the Sum of WaveformsDetermine the effective (rms) value of v(t) 4 8sin(1t10) 5sin(2t50) for(a) 221and (b) 21.■Solution(a)The rms value of a single sinusoid is Vm/, and the rms value of a constant is theconstant. When the sinusoids are of different frequencies, the terms are orthogonaland Eq. (2-39) applies.(b)For sinusoids of the same frequency, Eq. (2-39) does not apply because the integralof the cross product over one period is not zero. First combine the sinusoids usingphasor addition:81055012.325.2The voltage function is then expressed asv(t) 4 12.3 sin (1t25.2) VThe rms value of this voltage is determined from Eq. (2-39) asVrmsC42a12.312b2 9.57 VVrms2V 21, rms V 22, rms V 23, rms C42a812b2a512b27.78 V12EXAMPLE 2-7EXAMPLE 2-8RMS Value of Triangular Waveforms(a)Atriangular current waveform like that shown in Fig. 2-9a is commonlyencountered in dc power supply circuits. Determine the rms value of this current.(b)Determine the rms value of the offset triangular waveform in Fig. 2-9b.■Solution(a)The current is expressed asThe rms value is determined from Eq. (2-38). I2rms1TC3t10¢2Imt1tIm ≤2dt3Tt1¢2ImTt1tIm(Tt1)Tt1 ≤2dtSi(t)μ2Imt1tIm0tt12ImTt1tIm(Tt1)Tt1t1tThar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 41
42CHAPTER 2Power ComputationsThe details of the integration are quite long, but the result is simple: The rms valueof a triangular current waveform is(b)The rms value of the offset triangular waveform can be determined by usingthe result of part (a). Since the triangular waveform of part (a) contains no dccomponent, the dc signal and the triangular waveform are orthogonal, and Eq. (2-40) applies.2.6APPARENTPOWER AND POWER FACTORApparent PowerSApparent power is the product of rms voltage and rms current magnitudes andis often used in specifying the rating of power equipment such as transformers.Apparent power is expressed as(2-41) SVrmsIrms Irms2I21, rmsI22, rmsCaIm13b2I2dcCa213b2323.22 AIrmsIm13Im -Im 2T t1 tT Im tIdc 1 ms 3 ms 5310(a)(b)Figure 2-9(a) Triangular waveform for Example2-8; (b) offset triangular waveform.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 42
2.7Power Computations for Sinusoidal AC Circuits43In ac circuits (linear circuits with sinusoidal sources), apparent power is the mag-nitude of complex power.PowerFactorThe power factorof a load is deÞned as the ratio of average power to apparentpower:(2-42)In sinusoidal ac circuits, the above calculation results in pf coswhere is thephase angle between the voltage and current sinusoids. However, that is a specialcase and should be used only when both voltage and current are sinusoids. Ingeneral, power factor must be computed from Eq. (2-42).2.7POWER COMPUTATIONS FOR SINUSOIDALAC CIRCUITSIn general, voltages and/or currents in power electronics circuits are not sinu-soidal. However, a nonsinusoidal periodic waveform can be represented by aFourier series of sinusoids. It is therefore important to understand thoroughlypower computations for the sinusoidal case. The following discussion is a reviewof power computations for ac circuits.For linear circuits that have sinusoidal sources, all steady-state voltages andcurrents are sinusoids. Instantaneous power and average power for ac circuits arecomputed using Eqs. (2-1) and (2-3) as follows:For any element in an ac circuit, let(2-43)Then instantaneous power is(2-44)Using the trigonometric identity gives(2-45)(2-46)Average power is(2-47)P1T3T0p(t) dt¢VmIm2≤3T0[cos(2t)cos()]dtp(t)aVmIm2b[cos(2t)cos()] (cos A)(cos B)12 [cos(AB)cos(AB)]p(t)v(t)i(t)[Vmcos(t)][Imcos(t)]v(t)Vm cos (t)i(t)Im cos (t) pfPSPVrmsIrmshar80679_ch02_021-064.qxd 12/17/09 1:56 PM Page 43
44CHAPTER 2Power ComputationsThe result of the above integration can be obtained by inspection. Since the Þrstterm in the integration is a cosine function, the integral over one period is zerobecause of equal areas above and below the time axis. The second term in the integration is the constant cos( ), which has an average value of cos( ).Therefore, the average power in any element in an ac circuit is(2-48)This equation is frequently expressed as(2-49)where VrmsVm/ , IrmsIm/ , and Ð is the phase angle between voltageand current. The power factor is determined to be cos(Ð ) by using Eq. (2-42).In the steady state, no net power is absorbed by an inductor or a capacitor.The term reactive power is commonly used in conjunction with voltages and cur-rents for inductors and capacitors. Reactive power is characterized by energystorage during one-half of the cycle and energy retrieval during the other half.Reactive power is computed with a relationship similar to Eq. (2-49):(2-50)By convention, inductors absorb positive reactive power and capacitors absorbnegative reactive power.Complex powercombines real and reactive powers for ac circuits:(2-51)In the above equation, Vrmsand Irmsare complex quantities often expressed asphasors (magnitude and angle), and (Irms)*is the complex conjugate of phasorcurrent, which gives results consistent with the convention that inductance, orlagging current, absorbs reactive power. Apparent power in ac circuits is themagnitude of complex power:(2-52)It is important to note that the complex power in Eq. (2-52) and power factorof cos (Ð ) for sinusoidal ac circuits are special cases and are not applicable tononsinusoidal voltages and currents.2.8POWER COMPUTATIONS FOR NONSINUSOIDALPERIODIC WAVEFORMSPower electronics circuits typically have voltages and/or currents that are peri-odic but not sinusoidal. For the general case, the basic deÞnitions for the powerterms described at the beginning of this chapter must be applied. Acommon errorthat is made when doing power computations is to attempt to apply some specialrelationships for sinusoids to waveforms that are not sinusoids.Sƒ S ƒ2P2Q2 SPjQ(Vrms)(Irms)* QVrmsIrmssin()PVrmsIrms cos ()P¢VmIm2≤cos()1212har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 44
2.8Power Computations for Nonsinusoidal Periodic Waveforms45The Fourier series can be used to describe nonsinusoidal periodic waveformsin terms of a series of sinusoids. The power relationships for these circuits can beexpressed in terms of the components of the Fourier series.FourierSeriesAnonsinusoidal periodic waveform that meets certain conditions can be describedby a Fourier series of sinusoids. The Fourier series for a periodic function f(t) canbe expressed in trigonometric form as(2-53)where(2-54)Sines and cosines of the same frequency can be combined into one sinusoid, resulting in an alternative expression for a Fourier series:where(2-55)orwhere(2-56)The term a0is a constant that is the average value of f(t) and represents a dc volt-age or current in electrical applications. The coefÞcient C1is the amplitude of theterm at the fundamental frequency 0. CoefÞcients C2, C3, . . . are the amplitudesof the harmonics that have frequencies 20, 30, . . . .Cn2a2nb2n and ntan1aanbnbf(t)a0aqn1Cn sin (n0tn)Cn2a2nb2n and ntan1abnanbf(t)a0aqn1Cn cos (n0tn) bn2T3T>2T>2f(t) sin (n0t) dt an2T3T>2T>2f(t) cos (n0t) dt a01T3T>2T>2f(t)dtf(t)a0aqn1[an cos (n0t)bn sin (n0t)]har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 45
46CHAPTER 2Power ComputationsThe rms value of f(t) can be computed from the Fourier series:(2-57)Average PowerIf periodic voltage and current waveforms represented by the Fourier series(2-58)exist for a device or circuit, then average power is computed from Eq. (2-3).The average of the products of the dc terms is V0I0. The average of voltage andcurrent products at the same frequency is described by Eq. (2-49), and the averageof voltage and current products of different frequencies is zero. Consequently,average power for nonsinusoidal periodic voltage and current waveforms isor(2-59)Note that total average power is the sum of the powers at the frequencies in theFourier series.Nonsinusoidal Source and LinearLoadIf a nonsinusoidal periodic voltage is applied to a load that is a combination oflinear elements, the power absorbed by the load can be determined by using superposition. Anonsinusoidal periodic voltage is equivalent to the series combination of the Fourier series voltages, as illustrated in Fig. 2-10. The currentin the load can be determined using superposition, and Eq. (2-59) can be ap-plied to compute average power. Recall that superposition for power is not validwhen the sources are of the same frequency. The technique is demonstrated inExample 2-9.PV0I0aqn1aVn, max In, max 2b cos (nn)Paqn0PnV0I0aqn1Vn, rmsIn,rms cos (nn)P1T3T0v(t)i(t) dti(t)I0aqn1In cos (n0tn)v(t)V0aqn1Vn cos (n0tn)FrmsAaqn0F2n, rms Ca20aqn1aCn12b2 har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 46
2.8Power Computations for Nonsinusoidal Periodic Waveforms47Nonsinusoidal Source and Linear LoadAnonsinusoidal periodic voltage has a Fourier series of v(t) 10 20 cos(260t25)30 cos(460t20) V. This voltage is connected to a load that is a 5-resistor and a15-mH inductor connected in series as in Fig. 2-11. Determine the power absorbed by theload.■SolutionCurrent at each source frequency is computed separately. The dc current term isThe amplitudes of the ac current terms are computed from phasor analysis:Load current can then be expressed asPower at each frequency in the Fourier series is determined from Eq. (2-59):460: P2(30)(2.43)2 cos (20¡46¡)14.8 W260: P1(20)(2.65)2 cos(25¡73.5¡)17.4 Wdc term: P0(10 V)(2 A)20 Wi(t)22.65 cos (260t73.5¡)2.43 cos (460t46.2¡) AI2V2Rj2L30∠20¡5j(460)(0.015)2.43∠(46.2¡) AI1V1Rj1L20∠(25¡)5j(260)(0.015)2.65∠(73.5¡) AI0V0R1052 ALoadVm cos(nω0t + θn)V1 cos(ω0t + θ1)Vdc+−+−+−Figure 2.10Equivalent circuit forFourier analysis.Figure 2.11Circuit forExample 2-9.i(t) v(t) 5 Ω15 mH+−EXAMPLE 2-9har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 47
48CHAPTER 2Power ComputationsTotal power is thenPower absorbed by the load can also be computed from I2rmsRin this circuit because theaverage power in the inductor is zero.Sinusoidal Source and NonlinearLoadIf a sinusoidal voltage source is applied to a nonlinear load, the current waveformwill not be sinusoidal but can be represented as a Fourier series. If voltage is thesinusoid(2-60)and current is represented by the Fourier series(2-61)then average power absorbed by the load (or supplied by the source) is computedfrom Eq. (2-59) as(2-62)Note that the only nonzero power term is at the frequency of the applied voltage.The power factor of the load is computed from Eq. (2-42).(2-63)where rms current is computed from(2-64)IrmsCaqn0I2n, rmsCI20aqn1¢In12≤2pfV1 ,rmsI1 ,rms cos (11)V1 ,rmsIrms¢I1, rmsIrms≤ cos (11)pfPSPVrmsIrms aV1I12b cos (11)V1, rmsI1, rms cos (11) (0)(I0)aV1I12b cos (11)aqn2(0)(In, max) 2 cos (nn)PV0I0aqn1aVn, max In, max 2bcos (nn)i(t)I0aqn1In sin (n0tn)v(t)V1 sin(0t1) PI2rmsRB22a2.6512b2a2.4312b2R552.2 WP2017.414.852.2 Whar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 48
2.8Power Computations for Nonsinusoidal Periodic Waveforms49Note also that for a sinusoidal voltage and a sinusoidal current, pf cos(11), which is the power factor term commonly used in linear cir-cuits and is called the displacement power factor. The ratio of the rms value ofthe fundamental frequency to the total rms value, I1,rms/Irmsin Eq. (2-63), is thedistortion factor(DF).(2-65)The distortion factor represents the reduction in power factor due to the nonsinu-soidal property of the current. Power factor is also expressed as(2-66)Total harmonic distortion(THD) is another term used to quantify the non-sinusoidal property of a waveform. THD is the ratio of the rms value of all thenonfundamental frequency terms to the rms value of the fundamental frequencyterm.(2-67)THD is equivalently expressed as(2-68)Total harmonic distortion is often applied in situations where the dc term is zero,in which case THD may be expressed as (2-69)Another way to express the distortion factor is(2-70)Reactive power for a sinusoidal voltage and a nonsinusoidal current can be expressed as in Eq. (2-50). The only nonzero term for reactive power is at thevoltage frequency:(2-71)With Pand QdeÞned for the nonsinusoidal case, apparent power Smust includea term to account for the current at frequencies which are different from theQV1I12 sin(11)DFA11(THD)2THDAaqn2I2nI1THDBI2rmsI21, rmsI21, rmsTHDQanZ1I2n, rmsI21, rms AanZ1I2n, rmsI1, rms pf[ cos (11)] DFDFI1,rmsIrmshar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 49
50CHAPTER 2Power Computationsvoltage frequency. The term distortion volt-ampsDis traditionally used in thecomputation of S,(2-72)where(2-73)Other terms that are sometimes used for nonsinusoidal current (or voltages) areform factorand crest factor.(2-74)(2-75)Crest factorIpeakIrmsForm factorIrmsIavgDV1, rmsAaqnZ1I2n, rmsV12AaqnZ1InS2P2Q2D2EXAMPLE 2-10Sinusoidal Source and a Nonlinear LoadAsinusoidal voltage source of v(t) 100 cos(377t) Vis applied to a nonlinear load, resulting in a nonsinusoidal current which is expressed in Fourier series form asDetermine (a) the power absorbed by the load, (b) the power factor of the load, (c) thedistortion factor of the load current, (d) the total harmonic distortion of the load current.■Solution(a)The power absorbed by the load is determined by computing the power absorbed ateach frequency in the Fourier series [Eq. (2-59)].(b)The rms voltage isVrms1001270.7 V Pa10012ba1512b cos 30¡650 WP(0)(8)a10012ba1512b cos 30¡(0)a612b cos 45¡(0)a212b cos 60¡i(t)815 cos (377t30¡)6 cos [2(377)t45¡]2 cos [3(377)t60¡]har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 50
2.9Power Computations Using PSpice51and the rms current is computed from Eq. (2-64):The power factor isAlternatively, power factor can be computed from Eq. (2-63):(c)The distortion factor is computed from Eq. (2-65) as(d)The total harmonic distortion of the load current is obtained from Eq. (2-68).2.9POWER COMPUTATIONS USING PSPICEPSpice can be used to simulate power electronics circuits to determine voltages,currents, and power quantities. Aconvenient method is to use the numericalanalysis capabilities of the accompanying graphics postprocessor program Probeto obtain power quantities directly. Probe is capable of¥Displaying voltage and current waveforms (v)(t) and i(t)¥Displaying instantaneous power p(t)¥Computing energy absorbed by a device¥Computing average power P¥Computing average voltage and current¥Computing rms voltages and currents¥Determining the Fourier series of a periodic waveformThe examples that follow illustrate the use of PSpice to do power computations.THD BI2rmsI21, rmsI21, rms a142a1512b2a1512b2 0.86 86%.DFI1,rmsIrms151214.00.76pfI1,rms cos(11)Irms a1512bcos(030¡)14.00.66pfPSPVrmsIrms650(70.7)(14.0)0.66IrmsC 82a1512b2a612b2a212b214.0 Ahar80679_ch02_021-064.qxd 12/17/09 5:18 PM Page 51
52CHAPTER 2Power ComputationsInstantaneous Power, Energy, and Average Power Using PSpicePSpice can be used to display instantaneous power and to compute energy. Asimple exampleis a sinusoidal voltage across a resistor. The voltage source has amplitude Vm10 Vand frequency 60 Hz, and the resistor is 5 . Use VSIN for the source, and select Time Domain(Transient) in the Simulation Setup. Enter a Run Time (Time to Stop) of 16.67 ms for one period of the source.The circuit is shown in Fig. 2-12a. The top node is labeled as 1. When placing the resistor, rotate it 3 times so that the Þrst node is upward. After running the simulation, theNetlist should look like this:*source EXAMPLE 2-11V_V11 0SIN 0 10 60 0 0 0R_R11 0 5When the simulation is completed, the Probe screen appears. The waveforms of volt-age and current for the resistor are obtained by entering V(1) and I(R1). InstantaneousEXAMPLE 2-11(a)VOFF = 0VAMPL = 10FREQ = 6005V1R11p(t)(b)Time20100v(t)i(t)0 s-105 ms10 ms15 ms20 msI(R1)W(R1)V(1) +–Figure 2.12(a) PSpice circuit for Example 2-11; (b) voltage, current, andinstantaneous power for the resistor; (c) energy absorbed by the resistor; (d) average power absorbed by the resistor.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 52
2.9Power Computations Using PSpice53power p(t) v(t)i(t) absorbed by the resistor is obtained from Probe by entering the expression V(1)*I(R1) or by selecting W(R1). The resulting display showing V(1), I(R1),and p(t) is in Fig. 2-12b.Energy can be computed using the deÞnition of Eq. (2-2). When in Probe, enter theexpression S(V(1)*I(R1)) or S(W(R1)), which computes the integral of instantaneouspower. The result is a trace that shows that the energy absorbed increases with time. Theenergy absorbed by the resistor after one period of the source is determined by placing thecursor at the end of the trace, revealing WR166.66 mJ (Fig. 2-12c).Figure 2.12(continued)0 s5 ms10 ms15 ms20 ms0 s5 ms10 ms15 ms20 ms200 m100 m0TimeENERGY AFTER ONE PERIOD166.664 mJ(16.670 m, 166.664 m)(c)S (W(R1))15 W10 W5 W0 WTimeAVERAGE POWER9.998 W(16.670 m, 9.998)(d)AVG (W(R1))har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 53
54CHAPTER 2Power ComputationsThe Probe feature of PSpice can also be used to determine the average value ofpower directly. For the circuit in the above example, average power is obtained by enter-ing the expression AVG(V(1)*I(R1)) or AVG(W(R1)). The result is a ÒrunningÓ value ofaverage power as computed in Eq. (2-3). Therefore, the average value of the power wave-form must be obtained at the endof one or more periods of the waveform. Figure. 2-12dshows the output from Probe. The cursor option is used to obtain a precise value of aver-age power. This output shows 9.998 W, very slightly different from the theoretical valueof 10 W. Keep in mind that the integration is done numerically from discrete data points.PSpice can also be used to determine power in an ac circuit containing an inductoror capacitor, but the simulation must represent steady-state responseto be valid forsteady-state operation of the circuit.(b)V1 = 0V2 = 20TD = 0TR = 1 nTF = 1 nPW = 8 mPER = 20 mR121L1V1110 mH0v(t)t20 V08 ms(a)20 ms60 ms10 A5 A0 A80 ms70 ms90 ms100 ms110 ms(80.000 m, 4.6389)RMS CURRENT(100.000 m, 4.6389)TimeI(R1) RMS(I(R1)) +-Figure 2-13(a) Apulse waveformvoltage source isapplied to a series R-Lcircuit; (b) Probeoutput showing thesteady-state currentand the rms value.RMS and Fourier Analysis Using PSpiceFig. 2-13ashows a periodic pulse voltage that is connected to a series R-Lcircuit with R10 and L10 mH. PSpice is used to determine the steady-state rms current andthe Fourier components of the current.EXAMPLE 2-12har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 54
2.9Power Computations Using PSpice55In PSpice power calculations, it is extremely important that the outputbeing analyzed represent steady-state voltages and currents. Steady-state cur-rent is reached after several periods of the pulse waveform. Therefore, theSimulation Settings have the Run Time (Time to Stop) at 100 ms and the Start Saving Data set at 60 ms. The 60-ms delay allows for the current to reach steady state. Amaximum step size is set at 10 s to produce a smoothwaveform.Current is displayed in Probe by entering I(R1), and steady state is veriÞedby noting that the starting and ending values are the same for each period. Therms current is obtained by entering the expression RMS(I(R1)). The value of rmscurrent, 4.6389 A, is obtained at the end of any period of the current waveform.Fig. 2-13bshows the Probe output.The Fourier series of a waveform can be determined using PSpice. Fourieranalysis is entered under Output File Options in the Transient Analysis menu.The Fast Fourier Transform (FFT) on the waveforms of the source voltage and(a)3.75 A(0.000, 4.0010)(50.000, 3.2523)(100.000, 567.635 m)2.50 A1.25 A0 A0 Hz50 Hz100 Hz150 Hz200 Hz250 HzFOURIER ANALYSIS (FFT)Frequency(b)I(R1) Figure 2-14(a) Fourier analysis setup; (b) Fourier Series Spectrumfrom Probe using FFT.har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 55
56CHAPTER 2Power Computationsthe load current will appear in the output Þle. The fundamental frequency(Center Frequency) of the Fourier series is 50 Hz (1/20 mS). In this example,Þve periods of the waveform are simulated to ensure steady-state current forthis L/Rtime constant.Aportion of the output Þle showing the Fourier components of source volt-age and resistor current is as follows:FOURIER COMPONENTS OF TRANSIENT RESPONSE I(R_R1)DC COMPONENT4.000000E00HARMONIC FREQUENCY FOURIER NORMALIZEDPHASENORMALIZED NO(HZ)COMPONENTCOMPONENT(DEG)PHASE (DEG)15.000E013.252E001.000E003.952E010.000E0021.000E025.675E011.745E011.263E024.731E0131.500E022.589E017.963E022.402E019.454E0142.000E022.379E017.317E029.896E015.912E0152.500E021.391E074.277E085.269E002.029E0263.000E021.065E013.275E026.594E011.712E0273.500E024.842E021.489E021.388E021.378E0284.000E023.711E021.141E023.145E012.847E0294.500E024.747E021.460E021.040E022.517E02TOTAL HARMONIC DISTORTION 2.092715E01 PERCENTWhen you use PSpice output for the Fourier series, remember that the valuesare listed as amplitudes (zero-to-peak), and conversion to rms by dividing by is required for power computations. The phase angles are referenced to the sinerather than the cosine. The numerically computed Fourier components in PSpicemay not be exactly the same as analytically computed values. Total harmonicdistortion (THD) is listed at the end of the Fourier output. [Note: The THD com-puted in PSpice uses Eq. (2-69) and assumes that the dc component of the wave-form is zero, which is not true in this case.]The rms value of the load current can be computed from the Fourier series inthe output Þle from Eq. (2-43).Agraphical representation of the Fourier series can be produced in Probe. To dis-play the Fourier series of a waveform, click the FFTbutton on the toolbar. Uponentering the variable to be displayed, the spectrum of the Fourier series willappear. It will be desirable to adjust the range of frequencies to obtain a usefulgraph. Fig. 2-14bshows the result for this example. Fourier component magni-tudes are represented by the peaks of the graph, which can be determined pre-cisely by using the cursor option.IrmsC(4.0)2a3.25212b2a0.567512b2p L 4.63 A12har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 56
2.9Power Computations Using PSpice57PSpice Solution of Example 2-3Use PSpice to simulate the inductor circuit of Fig. 2-4awith the parameters of Example 2-3.■SolutionFig. 2-15 shows the circuit used in the PSpice simulation. The transistor is used as aswitch, so a voltage-controlled switch (Sbreak) can be used in the PSpice circuit. Theswitch is idealized by setting the on resistance to Ron0.001 . The control for the switch is a pulse voltage source which has a pulse width of 10 ms and period of 100 ms.The diode Dbreak is used.Some of the possible results that can be obtained from the Probe output are listedbelow. All traces except the maximum inductor current and the stored inductor energy areread at the end of the Probe trace, which is after one complete period. Note the agreementbetween the results of Example 2-3 and the PSpice results.Desired QuantityProbe EntryResultInductor currentI(L1)max 4.5 AEnergy stored in inductor0.5*0.2*I(L1)*I(L1)max 2.025 JAverage switch powerAVG(W(S1))0.010 WAverage source power (absorbed)AVG(W(VCC))20.3 WAverage diode powerAVG(W(D1))0.464 WAverage inductor powerAVG(W(L1))0Average inductor voltageAVG(V(1,2))0Average resistor powerAVG(W(R1))19.9 WEnergy absorbed by resistorS(W(R1))1.99 JEnergy absorbed by diodeS(W(D1))0.046 JEnergy absorbed by inductorS(W(L1))0RMS resistor currentRMS(I(R1))0.998 AFigure 2-15Circuit for Example 2-13, a PSpice simulation of the circuitin Example 2-4.EXAMPLE 2-13+-V1 = -10V2 = 10TD = 0TR = 10 nTF = 10 nPW = 10 mPER = 100 mVCONTROL4S1Ron = 0.001L1122R112030VVCCD1Dbreak200 mH0Sbreak+-har80679_ch02_021-064.qxd 12/17/09 1:57 PM Page 57
58CHAPTER 2Power Computations2.10Summary¥Instantaneous power is the product of voltage and current at a particular time:Using the passive sign convention, the device is absorbing power if (p)(t) ispositive, and the device is supplying power if (p)(t) is negative.¥Powerusually refers to average power, which is the time average of periodicinstantaneous power:¥The rms value is the root-mean-square or effective value of a voltage or currentwaveform.¥Apparent power is the product of rms voltage and current. ¥Power factor is the ratio of average power to apparent power.¥For inductors and capacitors that have periodic voltages and currents, the averagepower is zero. Instantaneous power is generally not zero because the device storesenergy and then returns energy to the circuit.¥For periodic currents, the average voltage across an inductor is zero.¥For periodic voltages, the average current in a capacitor is zero.¥For nonsinusoidal periodic waveforms, average power may be computed from thebasic deÞnition, or the Fourier series method may be used. The Fourier seriesmethod treats each frequency in the series separately and uses superposition tocompute total power.¥Asimulation using the program PSpice may be used to obtain not only voltage andcurrent waveforms but also instantaneous power, energy, rms values, and averagepower by using the numerical capabilities of the graphic postprocessor programPaqn0PnV0I0aqn1Vn, rms In, rms cos (nn)pfPSPVrmsIrmsSVrmsIrmsVrmsC1T3T0v2(t) dtIrmsC1T3T0i2(t) dtP1T3t0Tt0v(t)i(t) dt1T3t0Tt0p(t)dtp(t)v(t)i(t)har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 58
Problems59Probe. For numerical computations in Probe to be accurate, the simulation mustrepresent steady-state voltages and currents.¥Fourier series terms are available in PSpice by using the Fourier Analysis in theSimulation Settings or by using the FFToption in Probe.2.11BibliographyM. E. Balci and M. H. Hocaoglu, ÒComparison of Power DeÞnitions for ReactivePower Compensation in Nonsinusoidal Circuits,Ó International Conference onHarmonics and Quality of Power, Lake Placid, New York, 2004.L. S. Czarnecki, ÒConsiderations on the Reactive Power in Nonsinusoidal Situations,ÓInternational Conference on Harmonics in Power Systems, Worcester PolytechnicInstitute, Worcester, Mass., 1984, pp. 231Ð237.A. E. Emanuel, ÒPowers in Nonsinusoidal Situations, AReview of DeÞnitions and Physical Meaning,Ó IEEE Transactions on Power Delivery, vol. 5, no. 3,July 1990.G. T. Heydt, Electric Power Quality, Stars in a Circle Publications, West Lafayette,Ind., 1991.W. Sheperd and P. Zand, Energy Flow and Power Factor in Nonsinusoidal Circuits,Cambridge University Press, 1979.ProblemsInstantaneous and Average Power2-1.Average power generally is not the product of average voltage and averagecurrent. Give an example of periodic waveforms for v(t) and i(t) that have zeroaverage values and average power absorbed by the device is not zero. Sketchv(t), i(t), and p(t).2-2.The voltage across a 10-resistor is v(t) 170 sin (377t) V. Determine (a) anexpression for instantaneous power absorbed by the resistor, (b) the peak power,and (c) the average power.2-3.The voltage across an element is v(t) 5 sin (2t) V. Use graphing software tograph instantaneous power absorbed by the element, and determine the averagepower if the current, using the passive sign convention, is (a) i(t) 4 sin (2t) Aand (b) i(t) 3 sin (4t) A.2-4.The voltage and current for a device (using the passive sign convention) areperiodic functions with T100 ms described byDetermine (a) the instantaneous power, (b) the average power, and (c) the energyabsorbed by the device in each period.i(t)b04A 0t50 ms50 mst100 msv(t)b10V0 0t70 ms70 mst100 mshar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 59
60CHAPTER 2Power Computations2-5.The voltage and current for a device (using the passive sign convention) areperiodic functions with T20 ms described byDetermine (a) the instantaneous power, (b) the average power, and (c) the energyabsorbed by the device in each period.2-6.Determine the average power absorbed by a 12-Vdc source when the currentinto the positive terminal of the source is that given in (a) Prob. 2-4 and (b) Prob. 2-5.2-7.Acurrent of 5 sin (260t) Aenters an element. Sketch the instantaneous powerand determine the average power absorbed by the load element when the elementis (a) a 5-resistor, (b) a 10-mH inductor, and (c) a 12-Vsource (current into thepositive terminal).2-8.Acurrent source of i(t) 2 6 sin(260t) Ais connected to a load that is aseries combination of a resistor, an inductor, and a dc voltage source (current intothe positive terminal). If R4 , L15 mH, and Vdc6 V, determine theaverage power absorbed by each element.2-9.An electric resistance space heater rated at 1500 Wfor a voltage source ofv(t) 120sin(260t) Vhas a thermostatically controlled switch. Theheater periodically switches on for 5 min and off for 7 min. Determine (a) the maximum in stantaneous power, (b) the average power over the 12-min cycle, and (c) the electric energy converted to heat in each 12-mincycle.Energy Recovery2-10.An inductor is energized as in the circuit of Fig. 2-4a. The circuit has L100 mH,R20 , VCC90 V, t14 ms, and T40 ms. Assuming the transistor anddiode are ideal, determine (a) the peak energy stored in the inductor, (b) theenergy absorbed by the resistor in each switching period, and (c) the averagepower supplied by the source. (d) If the resistor is changed to 40 , what is theaverage power supplied by the source?2-11.An inductor is energized as in the circuit of Fig. 2-4a. The circuit has L10 mHand VCC14 V. (a) Determine the required on time of the switch such that the peakenergy stored in the inductor is 1.2 J. (b) Select a value for Rsuch that the switchingcycle can be repeated every 20 ms. Assume the switch and the diode are ideal.2-12.An inductor is energized as in the circuit of Fig. 2-5a. The circuit has L50 mH,VCC90 V, t14 ms, and T50 ms. (a) Determine the peak energy stored inthe inductor. (b) Graph the inductor current, source current, inductorinstantaneous power, and source instantaneous power versus time. Assume thetransistors are ideal.12v(t)e10 V 0t14 ms0 14 mst20 msi(t)c7 A 0t6 ms5 A 6 mst10 ms4 A 10mst20 mshar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 60
Problems612-13.An alternative circuit for energizing an inductor and removing the storedenergy without damaging a transistor is shown in Fig. P2-13. Here VCC12 V,L75 mH, and the zener breakdown voltage is VZ20 V. The transistorswitch opens and closes periodically with ton20 ms and toff50 ms. (a) Explain how the zener diode allows the switch to open. (b) Determine andsketch the inductor current iL(t) and the zener diode current iZ(t) for oneswitching period. (c) Sketch (p)(t) for the inductor and the zener diode. (d) Determine the average power absorbed by the inductor and by the zener diode.VCCiZiLL2-14.Repeat Prob. 2-13 with VCC20 V, L50 mH, VZ30 V, ton15 ms, and toff60 ms.Effective Values: RMS2-15.The rms value of a sinusoid is the peak value divided by . Give twoexamples to show that this is generally not the case for other periodicwaveforms.2-16.Athree-phase distribution system is connected to a nonlinear load that has lineand neutral currents like those of Fig. 2-8. The rms current in each phase is 12 A,and the resistance in each of the line and neutral conductors is 0.5 . Determinethe total power absorbed by the conductors. What should the resistance of theneutral conductor be such that it absorbs the same power as one of the phaseconductors?2-17.Determine the rms values of the voltage and current waveforms in Prob. 2-4.2-18.Determine the rms values of the voltage and current waveforms in Prob. 2-5.Nonsinusoidal Waveforms2-19.The voltage and current for a circuit element are v(t) 2 5 cos(260t) 3cos(460t45) Vand i(t) 1.5 2cos(260t 20) 1.1cos(460t 20) A.(a) Determine the rms values of voltage and current. (b) Determine the powerabsorbed by the element.12har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 61
62CHAPTER 2Power Computations2-20.Acurrent source i(t) 3 4 cos(260t) 6 cos (460t) Ais connected to aparallel RCload with R100 and C50 F. Determine the average powerabsorbed by the load.2-21.In Fig. P2-21, R4 , L10 mH, Vdc12 V, and vs(t) 50 30 cos (460t) 10 cos(860t) V. Determine the power absorbed by each component.vsVdcLR+−+−Figure P2-212-22.Anonsinusoidal periodic voltage has a Fourier series of v(t) 6 5 cos(260t)3cos(660t). This voltage is connected to a load that is a 16-resistor inseries with a 25-mH inductor as in Fig. 2-11. Determine the power absorbed bythe load.2-23.Voltage and current for a device (using the passive sign convention) areDetermine the average power based on the terms through n4.2-24.Voltage and current for a device (using the passive sign convention) areDetermine the average power based on the terms through n4.2-25.In Fig. P2-21, R20 , L25 mH, and Vdc36 V. The source is a periodicvoltage that has the Fourier seriesvs(t)50aqn1a400nb sin A200ntB v(t)50aqn1a50nb cos (nt) Vi(t)10aqn1a10n2b cos Ant tan 1n>2Bv(t)20aqn1a20nb cos (nt) Vi(t)5aqn1a5n2b cos (nt) Ahar80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 62
Problems63Using the Fourier series method, determine the average power absorbed by R,L, and Vdcwhen the circuit is operating in the steady state. Use as many termsin the Fourier series as necessary to obtain a reasonable estimate of power.2-26.Asinusoidal current of 10 Arms at a 60-Hz fundamental frequency iscontaminated with a ninth harmonic current. The current is expressed asDetermine the value of the ninth harmonic rms current I9if the THD is (a) 5 percent,(b) 10 percent, (c) 20 percent, and (d) 40 percent. Use graphing software or PSpiceto show i(t) for each case.2-27.Asinusoidal voltage source of v(t) 170cos(260t) Vis applied to a nonlinearload, resulting in a nonsinusoidal current that is expressed in Fourier series formas i(t) 10cos(260t30) 6cos(460t45) 3cos(860t20) A.Determine (a) the power absorbed by the load, (b) the power factor of the load,(c) the distortion factor, and (d) the total harmonic distortion of the load current.2-28.Repeat Prob. 2-27 with i(t) 12 cos (260t40) 5 sin (460t) 4cos(860t) A.2-29.Asinusoidal voltage source of v(t) 240 sin(260t) Vis applied to anonlinear load, resulting in a current i(t) 8sin(260t) 4sin(460t) A.Determine (a) the power absorbed by the load, (b) the power factor of the load,(c) the THD of the load current, (d) the distortion factor of the load current, and(e) the crest factor of the load current.2-30.Repeat Prob. 2-29 with i(t) 12 sin (260t) 9 sin (460t) A.2-31.Avoltage source of v(t) 5 25 cos(1000t) 10 cos(2000t) Vis connected toa series combination of a 2-resistor, a 1-mH inductor, and a 1000-F capacitor.Determine the rms current in the circuit, and determine the power absorbed byeach component.PSpice2-32.Use PSpice to simulate the circuit of Example 2-1. DeÞne voltage and currentwith PULSE sources. Determine instantaneous power, energy absorbed in oneperiod, and average power.2-33.Use PSpice to determine the instantaneous and average power in the circuitelements of Prob. 2-7.2-34.Use PSpice to determine the rms values of the voltage and current waveforms in(a) Prob. 2-5 and (b) Prob. 2-6.2-35.Use PSpice to simulate the circuit of Prob. 2-10. (a) Idealize the circuit by usinga voltage-controlled switch that has Ron0.001 and a diode with n0.001.(b) Use Ron0.5 and use the default diode.2-36.Use PSpice to simulate the circuit of Fig. 2-5a. The circuit has VCC75 V, t040 ms, and T100 ms. The inductance is 100 mH and has an internalresistance of 20 . Use a voltage-controlled switch with Ron1 for thetransistors, and use the PSpice default diode model. Determine the averagepower absorbed by each circuit element. Discuss the differences between thebehavior of this circuit and that of the ideal circuit.i(t)1022 sin (260t)I922 sin (1860t) A12har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 63
64CHAPTER 2Power Computations2-37.Use PSpice to simulate the circuit of Prob. 2-13. Use Ron0.001 for theswitch model and use n 0.001, BV 20Vfor the breakdown voltage and IBV 10 Afor the current at breakdown for the zener diode model. (a) DisplayiL(t) and iZ(t). Determine the average power in the inductor and in the zenerdiode. (b) Repeat part (a) but include a 1.5-series resistance with the inductorand use Ron0.5 for the switch.2-38.Repeat Prob. 2-37, using the circuit of Prob. 2-14.2-39.Use PSpice to determine the power absorbed by the load in Example 2-10.Model the system as a voltage source and four current sources in parallel.2-40.Modify the switch model so Ron1 in the PSpice circuit Þle in Example 2-13.Determine the effect on each of the quantities obtained from Probe in theexample.2-41.Demonstrate with PSpice that a triangular waveform like that of Fig. 2-9ahas anrms value of Vm/. Choose an arbitrary period T,and use at least three valuesof t1. Use a VPULSE source with the rise and fall times representing thetriangular wave.13har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 64
CHAPTER365Half-Wave RectiÞersThe Basics of Analysis3.1INTRODUCTIONArectiÞer converts ac to dc. The purpose of a rectiÞer may be to produce an out-put that is purely dc, or the purpose may be to produce a voltage or current wave-form that has a speciÞed dc component.In practice, the half-wave rectiÞer is used most often in low-power applica-tions because the average current in the supply will not be zero, and nonzero aver-age current may cause problems in transformer performance. While practicalapplications of this circuit are limited, it is very worthwhile to analyze the half-wave rectiÞer in detail. Athorough understanding of the half-wave rectiÞer circuitwill enable the student to advance to the analysis of more complicated circuitswith a minimum of effort.The objectives of this chapter are to introduce general analysis techniquesfor power electronics circuits, to apply the power computation concepts of theprevious chapter, and to illustrate PSpice solutions.3.2RESISTIVE LOADCreating a DC Component Using an Electronic SwitchAbasic half-wave rectiÞer with a resistive load is shown in Fig. 3-1a. The sourceis ac, and the objective is to create a load voltage that has a nonzero dc component.The diode is a basic electronic switch that allows current in one direction only. Forthe positive half-cycle of the source in this circuit, the diode is on (forward-biased).har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 65
66CHAPTER3Half-Wave RectiÞersConsidering the diode to be ideal, the voltage across a forward-biased diode is zeroand the current is positive.For the negative half-cycle of the source, the diode is reverse-biased, mak-ing the current zero. The voltage across the reverse-biased diode is the sourcevoltage, which has a negative value.The voltage waveforms across the source, load, and diode are shown inFig. 3-1b. Note that the units on the horizontal axis are in terms of angle (t).This representation is useful because the values are independent of frequency.The dc component Voof the output voltage is the average value of a half-waverectiÞed sinusoid(3-1)The dc component of the current for the purely resistive load is(3-2)Average power absorbed by the resistor in Fig. 3-1acan be computed fromPI2rmsRV2rmsR. When the voltage and current are half-wave rectiÞed sine waves,(3-3)In the preceding discussion, the diode was assumed to be ideal. For a realdiode, the diode voltage drop will cause the load voltage and current to beIrmsVm2RVrmsE12L0[Vm sin (t)]2 d(t)Vm2IoVoRVmR VoVavg12L0Vmsin(t)d(t)Vm++−+−−vovs = Vm sin (ωt) Ri(a)VmVm−Vmvsvovdωtωt…ππ2π2ππ2π−Vm(b)vdωtFigure 3-1(a) Half-wave rectiÞer with resistive load; (b) Voltage waveforms.har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 66
3.3Resistive-Inductive Load67EXAMPLE 3-1reduced, but not appreciably if Vmis large. For circuits that have voltages muchlarger than the typical diode drop, the improved diode model may have onlysecond-order effects on the load voltage and current computations.Half-Wave RectiÞer with Resistive LoadFor the half-wave rectiÞer of Fig. 3-1a, the source is a sinusoid of 120 Vrms at a fre-quency of 60 Hz. The load resistor is 5. Determine (a) the average load current, (b) theaverage power absorbed by the load and (c) the power factor of the circuit.■Solution(a)The voltage across the resistor is a half-wave rectiÞed sine wave with peak value Vm120 169.7 V. From Eq. (3-2), the average voltage is Vm, and average current is(b)From Eq. (3-3), the rms voltage across the resistor for a half-wave rectiÞed sinusoid isThe power absorbed by the resistor isThe rms current in the resistor is Vm(2R) 17.0 A, and the power could also becalculated from I2rmsR(17.0)2(5) 1440 W.(c)The power factor is3.3RESISTIVE-INDUCTIVE LOADIndustrial loads typically contain inductance as well as resistance. As the sourcevoltage goes through zero, becoming positive in the circuit of Fig. 3-2a, thediode becomes forward-biased. The Kirchhoff voltage law equation thatdescribes the current in the circuit for the forward-biased ideal diode is(3-4)The solution can be obtained by expressing the current as the sum of theforced response and the natural response:(3-5)i(t)if(t)in(t) Vmsin(t)Ri(t)Ldi(t)dtpfPSPVs,rmsIs,rms1440(120)(17)0.707PV2rmsR84.9241440 WVrmsVm222(120)284.9 VIoVoRVmR22(120)510.8 A12har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 67
68CHAPTER3Half-Wave RectiÞersThe forced response for this circuit is the current that exists after the naturalresponse has decayed to zero. In this case, the forced response is the steady-statesinusoidal current that would exist in the circuit if the diode were not present.This steady-state current can be found from phasor analysis, resulting in(3-6)where Z2R2(L)2 and tan1aLRbif(t)VmZsin(t)Figure 3-2(a) Half-wave rectiÞer with an RLload; (b) Waveforms.vs = Vm sin(ωt)vRvLvoi+−+−+++−−−vdRLωtVm0vs, io πβ2πωt0voπβ2πωt0vRπβ2πωt0vLπβ2πωt0vd-Vmπβ2π(a)(b)har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 68
3.3Resistive-Inductive Load69The natural response is the transient that occurs when the load is energized. It isthe solution to the homogeneous differential equation for the circuit without thesource or diode:(3-7)For this Þrst-order circuit, the natural response has the form(3-8)where is the time constant L/Rand Ais a constant that is determined from the ini-tial condition. Adding the forced and natural responses gets the complete solution.(3-9)The constant Ais evaluated by using the initial condition for current. The ini-tial condition of current in the inductor is zero because it was zero before thediode started conducting and it cannot change instantaneously.Using the initial condition and Eq. (3-9) to evaluate Ayields(3-10)Substituting for Ain Eq. (3-9) gives(3-11)It is often convenient to write the function in terms of the angle tratherthan time. This merely requires tto be the variable instead of t. To write theabove equation in terms of angle, tin the exponential must be written as t,which requires to be multiplied by also. The result is(3-12)Atypical graph of circuit current is shown in Fig. 3-2b. Equation (3-12) isvalid for positive currents only because of the diode in the circuit, so current iszero when the function in Eq. (3-12) is negative. When the source voltage againbecomes positive, the diode turns on, and the positive part of the waveform inFig. 3-2bis repeated. This occurs at every positive half-cycle of the source. Thevoltage waveforms for each element are shown in Fig. 3-2b.Note that the diode remains forward-biased longer than rad and that thesource is negative for the last part of the conduction interval. This may seemi(t)VmZCsin (t) sin () et>Di(t)VmZ sin (t)VmZ sin () et>VmZC sin (t) sin () et>Di(0)VmZsin(0)Ae00 AVmZsin()VmZsini(t)if(t)in(t)VmZsin(t)Aet>in(t)Aet>R i(t)L di(t)dt0har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 69
70CHAPTER3Half-Wave RectiÞersunusual, but an examination of the voltages reveals that KirchhoffÕs voltage lawis satisÞed and there is no contradiction. Also note that the inductor voltage isnegative when the current is decreasing (vL Ldidt).The point when the current reaches zero in Eq. (3-12) occurs when the diodeturns off. The Þrst positive value of tin Eq. (3-12) that results in zero current iscalled the extinction angle .Substituting tin Eq. (3-12), the equation that must be solved is(3-13)which reduces to(3-14)There is no closed-form solution for , and some numerical method is required. Tosummarize, the current in the half-wave rectiÞer circuit with RLload (Fig. 3-2) isexpressed as(3-15)The average power absorbed by the load is I2rmsR, since the average powerabsorbed by the inductor is zero. The rms value of the current is determined fromthe current function of Eq. (3-15).(3-16)Average current is(3-17)Io12L0i(t)d(t)IrmsF12L20i2(t)d(t)F12L0i2(t) d(t)where Z2R2(L)2 tan 1aLRb and LRi(t)d VmZC sin (t)sin ()et>D0 for 0t for t2 sin () sin ()e>0 i()VmZC sin () sin ()e>D 0EXAMPLE 3-2Half-Wave RectiÞer with RLLoadFor the half-wave rectiÞer of Fig. 3-2a, R100 , L0.1 H, 377 rad/s, and Vm100 V. Determine (a) an expression for the current in this circuit, (b) the average cur-rent, (c) the rms current, (d) the power absorbed by the RLload, and (e) the power factor.har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 70
3.3Resistive-Inductive Load71■SolutionFor the parameters given,Z[R2(L)2]0.5106.9tan1(LR) 20.70.361 radtLR0.377 rad(a)Equation (3-15) for current becomesBeta is found from Eq. (3-14).Using a numerical root-Þnding program, is found to be 3.50 rad, or 201(b)Average current is determined from Eq. (3-17).(Anumerical integration program is recommended.)(c)The rms current is found from Eq. (3-16) to be(d)The power absorbed by the resistor isThe average power absorbed by the inductor is zero. Also Pcan be computed fromthe deÞnition of average power:(e)The power factor is computed from the deÞnition pf PS,and Pis powersupplied by the source, which must be the same as that absorbed by the load.Note that the power factor is notcos .pfPSPVs, rmsIrms22.4A100>12B0.4740.67P12L20p(t)d(t)12L20v(t)i(t)d(t)12L3.500[100 sin (t)]C0.936 sin (t0.361)0.331et>0.377Dd(t)22.4 WPI2rmsR(0.474)2(100)22.4 WIrmsF12L3.500C0.936sin(t0.361)0.331et>0.377D2d(t)0.474 AIo12L3.500 C0.936sin(t0.361)0.331et>0.377Dd(t)0.308 Asin(0.361)sin(0.361)e>0.3770i(t)0.936 sin(t0.361)0.331et>0.377 A for 0thar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 71
72CHAPTER3Half-Wave RectiÞers3.4PSPICE SIMULATIONUsing Simulation Software forNumerical ComputationsAcomputer simulation of the half-wave rectiÞer can be performed using PSpice.PSpice offers the advantage of having the postprocessor program Probe whichcan display the voltage and current waveforms in the circuit and perform numer-ical computations. Quantities such as the rms and average currents, averagepower absorbed by the load, and power factor can be determined directly withPSpice. Harmonic content can be determined from the PSpice output.Atransient analysis produces the desired voltages and currents. One com-plete period is a sufÞcient time interval for the transient analysis.EXAMPLE 3-3 PSpice AnalysisUse PSpice to analyze the circuit of Example 3-2.■SolutionThe circuit of Fig. 3-2ais created using VSIN for the source and Dbreak for the diode.In the simulation settings, choose Time Domain (transient) for the analysis type, and setthe Run Time to 16.67 ms for one period of the source. Set the Maximum Step Size to10 s to get adequate sampling of the waveforms. Atransient analysis with a run time of16.67 ms (one period for 60 Hz) and a maximum step size of 10 s is used for the sim-ulation settings.If a diode model that approximates an ideal diode is desired for the purpose of com-paring the simulation with analytical results, editing the PSpice model and using n0.001 will make the voltage drop across the forward-biased diode close to zero.Alternatively, a model for a power diode may be used to obtain a better representation ofa real rectiÞer circuit. For many circuits, voltages and currents will not be affected sig-niÞcantly when different diode models are used. Therefore, it may be convenient to usethe Dbreak diode model for a preliminary analysis.When the transient analysis is performed and the Probe screen appears, display thecurrent waveform by entering the expression I(R1). Amethod to display angle instead oftime on the x axis is to use the x-variable option within the x-axis menu, enteringTIME*60*360. The factor of 60 converts the axis to periods (f60 Hz), and the factor360 converts the axis to degrees. Entering TIME*60*2*3.14 for the x variable convertsthe x axis to radians. Figure 3-3ashows the result. The extinction angle is found to be200using the cursor option. Note that using the default diode model in PSpice resultedin a value of very close to the 201in Example 3-2.Probe can be used to determine numerically the rms value of a waveform. While inProbe, enter the expression RMS(I(R1)) to obtain the rms value of the resistor current.Probe displays a ÒrunningÓ value of the integration in Eq. (3-16), so the appropriate valueis at the end of one or more complete periodsof the waveform. Figure 3-3bshows how toobtain the rms current. The rms current is read as approximately 468 mA. This compareshar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 72
3.4PSpice Simulation73very well with the 474 mAcalculated in Example 3-2. Remember that the default diodemodel is used in PSpice and an ideal diode was used in Example 3-2. The average currentis found by entering AVG(I(R1)), resulting in Io304 mA.1000 mA100 s200 s300 s500 mALOAD CURRENTBETA = 200 DECTime*60*3600 A0 s(200.455, 6.1090u)1000 mAI (R1)10 ms5 ms15 ms20 ms25 ms500 mATime0 A0 sI(R1)400 sI(R1) RMS ( I (R1))RMS (I (R1))READ RMS VALUE HEREIrms = 468 mA(16.670m, 467.962m)DETERMINING RMS CURRENT(a)(b)Figure 3-3(a) Determining the extinction angle in Probe. The timeaxis is changed to angle using the x-variable option and enteringTime*60*360; (b) Determining the rms value of current in Probe.PSpice is also useful in the design process. For example, the objective may beto design a half-wave rectiÞer circuit to produce a speciÞed value of average cur-rent by selecting the proper value of Lin an RLload. Since there is no closed-formsolution, a trial-and-error iterative method must be used. APSpice simulation thatincludes a parametric sweep is used to try several values of L. Example 3-4 illus-trates this method.har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 73
74CHAPTER3Half-Wave RectiÞersHalf-Wave RectiÞer Design Using PSpiceDesign a circuit to produce an average current of 2.0 Ain a 10-resistance. The sourceis 120 Vrms at 60 Hz.■SolutionAhalf-wave rectiÞer is one circuit that can be used for this application. If a simple half-wave rectiÞer with the 10-resistance were used, the average current would be(120)/8 6.5 A. Some means must be found to reduce the average current to thespeciÞed 2 A. Aseries resistance could be added to the load, but resistances absorbpower. An added series inductance will reduce the current without adding losses, so an12Figure 3-4(a) PSpice circuit for Example 3-4; (b) Aparametric sweep is estab-lished in the Simulation Settings box; (c) L0.15 H for an average current ofapproximately 2 A.EXAMPLE 3-4 (a)VOFF = 0VAMPL = {120* sqrt(2)}FREQ = 60V1L1(L)12D1HALF-WAVE RECTIFIER WITH PARAMETRIC SWEEP R1Dbreak100PARAMETERS:L = 0.1+−(b)har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 74
3.5RL-Source Load75inductor is chosen. Equations (3-15) and (3-17) describe the current function and itsaverage for RLloads. There is no closed-form solution for L. Atrial-and-error techniquein PSpice uses the parameter (PARAM) part and a parametric sweep to try a series ofvalues for L. The PSpice circuit and the Simulation Settings box are shown in Fig. 3-4.Average current in the resistor is found by entering AVG(I(R1)) in Probe, yielding afamily of curves for different inductance values (Fig. 3-4c). The third inductance in thesweep (0.15 H) results in an average current of 2.0118 Ain the resistor, which is veryclose to the design objective. If further precision is necessary, subsequent simulations canbe performed, narrowing the range of L.3.5RL-SOURCE LOADSupplying Powerto a DC Source from an AC SourceAnother variation of the half-wave rectiÞer is shown in Fig. 3-5a. The loadconsists of a resistance, an inductance, and a dc voltage. Starting the analysisat t0 and assuming the initial current is zero, recognize that the diode willremain off as long as the voltage of the ac source is less than the dc voltage.Letting be the value of tthat causes the source voltage to be equal to Vdc,or(3-18) sin 1aVdcVmbVm sin VdcTime(c)4 ms8 ms12 ms16 ms20 ms22 ms0 s0 A2.0 A4.0 A6.0 AAVG PARAMETRIC SWEEP(16.670m, 2.0118)Figure 3-4(continued)har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 75
76CHAPTER3Half-Wave RectiÞersThe diode starts to conduct at t. With the diode conducting, KirchhoffÕsvoltage law for the circuit yields the equation(3-19)Total current is determined by summing the forced and natural responses:The current if(t) is determined using superposition for the two sources. Theforced response from the ac source (Fig. 3-5b) is (Vm/Z) sin(t). Theforced response due to the dc source (Fig. 3-5c) is Vdc/R. The entire forcedresponse is(3-20)if(t)VmZsin(t)VdcRi(t)if(t)in(t)Vmsin(t)Ri(t)L di(t)dtVdcFigure 3-5(a) Half-wave rectiÞer with RLsource load; (b) Circuitfor forced responce from ac source; (c) Circuit for forcedresponce from dc source; (d) Waveforms.R Vdc +−ifacifdc R Vm sin(ωt) (b)(c)L +−i R Vdc Vm sin(ωt) L +−+−(a)vsiVdc (d)απ2πβωthar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 76
3.5RL-Source Load77The natural response is(3-21)Adding the forced and natural responses gives the complete response.(3-22)The extinction angle is deÞned as the angle at which the current reaches zero,as was done earlier in Eq. (3-15). Using the initial condition of i() 0 andsolving for A,(3-23)Figure 3-5dshows voltage and current waveforms for a half-wave rectiÞer withRL-source load.The average power absorbed by the resistor is I2rmsR, where(3-24)The average power absorbed by the dc source is(3-25)where Iois the average current, that is,(3-26)Assuming the diode and the inductor to be ideal, there is no average powerabsorbed by either. The power supplied by the ac source is equal to the sum ofthe power absorbed by the resistor and the dc source(3-27)or it can be computed from(3-28)Pac12L20v(t) i(t)d(t)12L(Vm sin t) i(t)d(t)PacI2rmsRIoVdcIo12Li(t)d(t)PdcIoVdcIrmsE12Li2(t)d(t) AcVmZsin()VdcRde>i(t)dVmZ sin (t) VdcR Aet> 0 for totherwisein(t)Aet>har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 77
78CHAPTER3Half-Wave RectiÞersHalf-Wave RectiÞer with RL-Source LoadFor the circuit of Fig. 3-5a, R2 , L20 mH, and Vdc100 V. The ac source is 120 Vrms at 60 Hz. Determine (a) an expression for the current in the circuit, (b) the powerabsorbed by the resistor, (c) the power absorbed by the dc source, and (d) the power sup-plied by the ac source and the power factor of the circuit.■SolutionFrom the parameters given,Vm120169.7 VZ[R2 (L)2]0.57.80 tan1(LR) 1.31 radsin1(100169.7) 36.10.630 rad377(0.022) 3.77 rad(a)Using Eq. (3-22),The extinction angle is found from the solution ofwhich results in 3.37 rad (193) using root-Þnding software.(b)Using the preceding expression for i(t) in Eq. (3-24) and using a numericalintegration program, the rms current isresulting in(c)The power absorbed by the dc source is IoVdc. Using Eq. (3-26),yielding(d)The power supplied by the ac source is the sum of the powers absorbed by the load.The power factor ispfPSPVs, rmsIrms256(120)(3.98)0.54PsPRPdc31.2225256 WPdcIoVdc(2.25)(100)225 WIo12L3.370.63i(t)d(t)2.25 APRI2rmsR3.982(2)31.7 WIrmsE12L3.370.63i2(t)d(t)3.98 Ai()21.8 sin (1.31)5075.3e>3.770i(t)21.8 sin(t1.31)5075.3et>3.77 A12EXAMPLE 3-5har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 78
3.6Inductor-Source Load79■PSpice SolutionThe power quantities in this example can be determined from a PSpice simulation of thiscircuit. The circuit of Fig. 3-5ais created using VSIN, Dbreak, R, and L. In the simula-tion settings, choose Time Domain (transient) for the analysis type, and set the Run Timeto 16.67 ms for one period of the source. Set the Maximum Step Size to 10 s to get ade-quate sampling of the waveforms. Atransient analysis with a run time of 16.67 ms (oneperiod for 60 Hz) and a maximum step size of 10 s is used for the simulation settings.Average power absorbed by the 2-resistor can be computed in Probe from thebasic deÞnition of the average of p(t) by entering AVG(W(R1)), resulting in 29.7 W, orfrom I2rmsRby entering RMS(I(R1))*RMS(I(R1))*2. The average power absorbed by thedc source is computed from the Probe expression AVG(W(Vdc)), yielding 217 W.The PSpice values differ slightly from the values obtained analytically because ofthe diode model. However, the default diode is more realistic than the ideal diode in pre-dicting actual circuit performance.3.6INDUCTOR-SOURCE LOADUsing Inductance to Limit CurrentAnother variation of the half-wave rectiÞer circuit has a load that consists of aninductor and a dc source, as shown in Fig. 3-6. Although a practical implementa-tion of this circuit would contain some resistance, the resistance may be negligi-ble compared to other circuit parameters.Starting at t0 and assuming zero initial current in the inductor, the dioderemains reverse-biased until the ac source voltage reaches the dc voltage. Thevalue of tat which the diode starts to conduct is , calculated using Eq. (3-18).With the diode conducting, KirchhoffÕs voltage law for the circuit is(3-29)or(3-30)Vm sin(t)L di(t)dtVdcVmsin(t)L di(t)dtVdcFigure 3-6Half-wave rectiÞer withinductor source load.Vdc LVm sin(ωt) +−+−har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 79
80CHAPTER3Half-Wave RectiÞersRearranging gives(3-31)Solving for i(t),(3-32)Performing the integration,(3-33)Adistinct feature of this circuit is that the power supplied by the source is thesame as that absorbed by the dc source, less any losses associated with a nonidealdiode and inductor. If the objective is to transfer power from the ac source to thedc source, losses are kept to a minimum by using this circuit.i(t)dVmL(cos cos t) VdcL(t) for t0 otherwise i(t)1LLtVm sin ld(l) 1LLtVdcd(l)di(t)dtVmsin(t)VdcLEXAMPLE 3-6Half-Wave RectiÞer with Inductor-Source LoadFor the circuit of Fig. 3-6, the ac source is 120 Vrms at 60 Hz, L50 mH, and Vdc72 V.Determine (a) an expression for the current, (b) the power absorbed by the dc source, and(c) the power factor.■SolutionFor the parameters given,(a)The equation for current is found from Eq. (3-33).where is found to be 4.04 rad from the numerical solution of 9.83 9.00 cos 3.820.(b)The power absorbed by the dc source is IoVdc, whereIo12Li(t)d(t) 12L4.040.438[9.839.00 cos (t)3.82 t] d(t)2.46 Ai(t)9.839.00cos(t)3.82 t A for tsin1a7212012b25.1¡0.438 radhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 80
3.7The Freewheeling Diode81resulting in(c)The rms current is found fromTherefore,3.7THE FREEWHEELING DIODECreating a DC CurrentAfreewheeling diode, D2in Fig. 3-7a, can be connected across an RLload asshown. The behavior of this circuit is somewhat different from that of the half-wave rectiÞer of Fig. 3-2. The key to the analysis of this circuit is to determinewhen each diode conducts. First, it is observed that both diodes cannot beforward-biased at the same time. KirchhoffÕs voltage law around the path con-taining the source and the two diodes shows that one diode must be reverse-biased. Diode D1will be on when the source is positive, and diode D2will be onwhen the source is negative.pfPSPVrmsIrms177(120)(3.81)0.388 IrmsE12Li2(t)d(t)3.81 APdcVdcIo(2.46)(72)177 WFigure 3-7(a) Half-wave rectifier with freewheelingdiode; (b) Equivalent circuit for vs0; (c) Equivalentcircuit for vs0.iD1D1D2L RL Rio vo iD2(a)vs = Vm sin(ωt) vs +−+−−(b)+++−io L R−(c)io vo = vs vo = 0 har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 81
82CHAPTER3Half-Wave RectiÞersFor a positive source voltage,¥D1is on.¥D2is off.¥The equivalent circuit is the same as that of Fig. 3-2, shown again in Fig. 3-7b.¥The voltage across the RLload is the same as the source.For a negative source voltage,¥D1is off.¥D2is on.¥The equivalent circuit is the same at that of Fig. 3-7c.¥The voltage across the RLload is zero.Since the voltage across the RLload is the same as the source voltage whenthe source is positive and is zero when the source is negative, the load voltage isa half-wave rectiÞed sine wave.When the circuit is Þrst energized, the load current is zero and cannotchange instantaneously. The current reaches periodic steady state after a fewperiods (depending on the L/Rtime constant), which means that the current atthe end of a period is the same as the current at the beginning of the period, asshown in Fig. 3-8. The steady-state current is usually of greater interest than thetransient that occurs when the circuit is Þrst energized. Steady-state load,source, and diode currents are shown in Fig. 3-9.The Fourier series for the half-wave rectiÞed sine wave for the voltageacross the load is(3-34)The current in the load can be expressed as a Fourier series by using superposi-tion, taking each frequency separately. The Fourier series method is illustrated inExample 3-7.v(t)VmVm2 sin (0t) aqn2,4,6Á2Vm(n21) cos (n0t)io(t)TransientSteady StatetFigure 3-8Load current reaching steady state afterthe circuit is energized.har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 82
3.7The Freewheeling Diode83Half-Wave RectiÞer with Freewheeling DiodeDetermine the average load voltage and current, and determine the power absorbed by theresistor in the circuit of Fig. 3-7a, where R2 and L25 mH, Vmis 100 V, and thefrequency is 60 Hz.■SolutionThe Fourier series for this half-wave rectiÞed voltage that appears across the load isobtained from Eq. (3-34). The average load voltage is the dc term in the Fourier series:Average load current isIoVoR31.8215.9 AVoVm10031.8 VFigure 3-9Steady-state load voltage and currentwaveforms with freewheeling diode.voioiD1iD20π2π0π2π0π2πωtωtωtEXAMPLE 3-7har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 83
84CHAPTER3Half-Wave RectiÞersLoad power can be determined from I2rmsR, and rms current is determined from the Fouriercomponents of current. The amplitudes of the ac current components are determined fromphasor analysis:whereThe ac voltage amplitudes are determined from Eq. (3-34), resulting inThe resulting Fourier terms are as follows:nVn(V)Zn()In(A)031.82.0015.9150.09.635.19221.218.961.1244.2437.750.1161.8256.580.03The rms current is obtained using Eq. (2-64).Notice that the contribution to rms current from the harmonics decreases as nincreases, andhigher-order terms are not signiÞcant. Power in the resistor is I2rmsR(16.34)22 534 W.■PSpice SolutionThe circuit of Fig. 3-7ais created using VSIN, Dbreak, R, and L. The PSpice model forDbreak is changed to make n0.001 to approximate an ideal diode. Atransient analysisis run with a run time of 150 ms with data saved after 100 ms to eliminate the start-uptransient from the data. Amaximum step size of 10 s gives a smooth waveform.Aportion of the output Þle is as follows:****FOURIER ANALYSISTEMPERATURE 27.000 DEG CFOURIER COMPONENTS OF TRANSIENT RESPONSE V(OUT)DC COMPONENT 3.183002E+01IrmsAaqk0Ik,rmsLC15.92a5.1912b2a1.1212b2a0.1112b216.34 AV1Vm2100250 VV22Vm(221)21.2 VV42Vm(421)4.24 VV62Vm(621)1.82 VInVnZnZnƒRjn0Lƒƒ2jn377(0.025)ƒhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 84
3.7The Freewheeling Diode85HARMONICFREQUENCYFOURIERNORMALIZEDPHASENORMALIZEDNO(HZ)COMPONENTCOMPONENT(DEG)PHASE (DEG)16.000E+015.000E+011.000E+00-5.804E-050.000E+0021.200E+022.122E+014.244E-01-9.000E+01-9.000E+0131.800E+025.651E-051.130E-06-8.831E+01-8.831E+0142.400E+024.244E+008.488E-02-9.000E+01-9.000E+0153.000E+025.699E-051.140E-06-9.064E+01-9.064E+0163.600E+021.819E+003.638E-02-9.000E+01-9.000E+0174.200E+025.691E-051.138E-06-9.111E+01-9.110E+0184.800E+021.011E+002.021E-02-9.000E+01-9.000E+0195.400E+025.687E-051.137E-06-9.080E+01-9.079E+01FOURIER COMPONENTS OF TRANSIENT RESPONSE I(R_R1)DC COMPONENT 1.591512E+01HARMONICFREQUENCYFOURIERNORMALIZEDPHASENORMALIZEDNO(HZ)COMPONENTCOMPONENT(DEG)PHASE (DEG)16.000E+015.189E+001.000E+00-7.802E+010.000E+0021.200E+021.120E+002.158E-01-1.739E+02-1.788E+0131.800E+021.963E-043.782E-05-3.719E+011.969E+0242.400E+021.123E-012.164E-02-1.770E+021.351E+0253.000E+027.524E-051.450E-056.226E+014.524E+0263.600E+023.217E-026.200E-03-1.781E+022.900E+0274.200E+028.331E-051.605E-051.693E+027.154E+0284.800E+021.345E-022.592E-03-1.783E+024.458E+0295.400E+025.435E-051.047E-05-1.074E+025.948E+02Note the close agreement between the analytically obtained Fourier terms and thePSpice output. Average current can be obtained in Probe by entering AVG(I(R1)), yielding15.9 A. Average power in the resistor can be obtained by entering AVG(W(R1)), yieldingP535 W. It is important that the simulation represent steady-state periodic current forthe results to be valid.har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 85
86CHAPTER3Half-Wave RectiÞersReducing Load Current HarmonicsThe average current in the RLload is a function of the applied voltage and theresistance but not the inductance. The inductance affects only the ac terms in theFourier series. If the inductance is inÞnitely large, the impedance of the load toac terms in the Fourier series is inÞnite, and the load current is purely dc. Theload current is then(3-35)Alarge inductor (L/RWT) with a freewheeling diode provides a means of estab-lishing a nearly constant load current. Zero-to-peak ßuctuation in load currentcan be estimated as being equal to the amplitude of the Þrst ac term in the Fourierseries. The peak-to-peak ripple is then(3-36)IoL2I1io(t)LIo VoRVmR LR :qEXAMPLE 3-8 Half-Wave RectiÞer with Freewheeling Diode: LR→For the half-wave rectiÞer with a freewheeling diode and RLload as shown in Fig. 3-7a,the source is 240 Vrms at 60 Hz and R8 . (a) Assume Lis inÞnitely large. Deter-mine the power absorbed by the load and the power factor as seen by the source. Sketchvo, iD1, and iD2. (b) Determine the average current in each diode. (c) For a Þnite induc-tance, determine Lsuch that the peak-to-peak current is no more than 10 percent of theaverage current.■Solution(a)The voltage across the RLload is a half-wave rectiÞed sine wave, which has anaverage value of Vm. The load current isPower in the resistor isSource rms current is computed fromThe power factor ispfPVs,rmsIs,rms1459(240)(9.55)0.637Is,rmsE12L0(13.5)2d(t)9.55 AP(Irms)2R(13.5)281459 Wi(t)IoVoRVm>RA2402 2B>813.5 A L Irmshar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 86
3.7The Freewheeling Diode87Voltage and current waveforms are shown in Fig. 3-10.(b)Each diode conducts for one-half of the time. Average current for each diode is Io2 13.52 6.75 A.(c)The value of inductance required to limit the variation in load current to 10 percentcan be approximated from the fundamental frequency of the Fourier series. Thevoltage input to the load for n1 in Eq. (3-34) has amplitude Vm2 (240)2170 Vthe peak-to-peak current must be limited towhich corresponds to an amplitude of 1.352 0.675 A. The load impedance at thefundamental frequency must then beThe load impedance isSince the 8-resistance is negligible compared to the total impedance, theinductance can be approximated asThe inductance will have to be slightly larger than 0.67 H because Fourier termshigher than n1 were neglected in this estimate.LLZ12513770.67 HZ1251ƒRjLƒƒ8j377LƒZ1V1I11700.675251 ÆIo(0.10)(Io)(0.10)(13.5)1.35 A12Figure 3-10Waveforms for the half-wave rectiÞer withfreewheeling diode of Example 3-8 with L/R→.vciciD1iD213.5 Α013.5 Α013.5 Α0π2π√2 (240) Vhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 87
88CHAPTER3Half-Wave RectiÞers3.8HALF-WAVE RECTIFIER WITH ACAPACITORFILTERCreating a DC Voltage from an AC SourceAcommon application of rectiÞer circuits is to convert an ac voltage input to adc voltage output. The half-wave rectiÞer of Fig. 3-11ahas a parallel RCload.The purpose of the capacitor is to reduce the variation in the output voltage, mak-ing it more like dc. The resistance may represent an external load, and the capac-itor may be a Þlter which is part of the rectiÞer circuit.Assuming the capacitor is initially uncharged and the circuit is energized att0, the diode becomes forward-biased as the source becomes positive. Withthe diode on, the output voltage is the same as the source voltage, and the capac-itor charges. The capacitor is charged to Vmwhen the input voltage reaches itspositive peak at t/2.As the source decreases after t/2, the capacitor discharges into the loadresistor. At some point, the voltage of the source becomes less than the outputvoltage, reverse-biasing the diode and isolating the load from the source. The out-put voltage is a decaying exponential with time constant RCwhile the diode is off.The point when the diode turns off is determined by comparing the rates ofchange of the source and the capacitor voltages. The diode turns off when theFigure 3-11(a) Half-wave rectiÞer with RCload; (b) Inputand output voltages.(a)(b)p22π2π + ααVθVmvoθvsvsΔVoRvs = Vm sin(ωt)iDiRiCCvo+−+−har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 88
3.8Half-Wave RectiÞer With a Capacitor Filter89downward rate of change of the source exceeds that permitted by the time con-stant of the RCload. The angle tis the point when the diode turns off inFig. 3-11b. The output voltage is described by(3-37)where(3-38)The slopes of these functions are(3-39)and(3-40)At t, the slopes of the voltage functions are equal:Solving for and expressing so it is in the proper quadrant, we have(3-41)In practical circuits where the time constant is large,(3-42)When the source voltage comes back up to the value of the output voltage inthe next period, the diode becomes forward-biased, and the output again is thesame as the source voltage. The angle at which the diode turns on in the secondperiod, t2, is the point when the sinusoidal source reaches the samevalue as the decaying exponential output:Vm sin (2)(Vm sin )e(2)>RCL2 and Vm sinLVm tan 1(RC) tan 1(RC)Vm cos aVm sin RCb e()>RCVm sin RCVm cos Vm sin 1RC1 tan 1RCdd(t)AVm sin e(t)>RCBVm sin a1RCbe(t)>RC dd(t)[Vm sin (t)]Vm cos (t)VVm sin vo(t)cVm sin t diode onVe(t)>RCdiode offhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 89
90CHAPTER3Half-Wave RectiÞersor(3-43)Equation (3-43) must be solved numerically for .The current in the resistor is calculated from iRvoR. The current in thecapacitor is calculated fromwhich can also be expressed, using tas the variable, asUsing vofrom Eq. (3-37),(3-44)The source current, which is the same as the diode current, is(3-45)The average capacitor current is zero, so the average diode current is the sameas the average load current. Since the diode is on for a short time in each cycle,the peak diode current is generally much larger than the average diode current.Peak capacitor current occurs when the diode turns on at t2. FromEq. (3-44),(3-46)Resistor current at t2+ is obtained from Eq. (3-37).(3-47)Peak diode current is(3-48)The effectiveness of the capacitor Þlter is determined by the variation in out-put voltage. This may be expressed as the difference between the maximum andminimum output voltage, which is the peak-to-peak ripple voltage. For the half-wave rectiÞer of Fig. 3-11a, the maximum output voltage is Vm. The minimumID, peakCVm cos Vm sin RVmaC cos sin RbiR(2t)Vmsin(2t)RVmsinRIC,peakCVmcos(2)CVmcosiSiDiRiC iC(t)daVm sin Rbe(t)>RC for t2 (diode off)CVm cos (t) for 2t2 (diode on)iC(t)C dvo(t)d(t)iC(t)C dvo(t)dtsin (sin)e(2)>RC0har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 90
3.8Half-Wave RectiÞer With a Capacitor Filter91output voltage occurs at t2+ , which can be computed from Vmsin . Thepeak-to-peak ripple for the circuit of Fig. 3-11ais expressed as(3-49)In circuits where the capacitor is selected to provide for a nearly constant dcoutput voltage, the RCtime constant is large compared to the period of the sinewave, and Eq. (3-42) applies. Moreover, the diode turns on close to the peak ofthe sine wave when L/2. The change in output voltage when the diode is offis described in Eq. (3-37). In Eq. (3-37), if VLVmand L/2, then Eq. (3-37)evaluated at /2 isThe ripple voltage can then be approximated as(3-50)Furthermore, the exponential in the above equation can be approximated by theseries expansion:Substituting for the exponential in Eq. (3-50), the peak-to-peak ripple is approx-imately(3-51)The output voltage ripple is reduced by increasing the Þlter capacitor C. AsCincreases, the conduction interval for the diode decreases. Therefore, increas-ing the capacitance to reduce the output voltage ripple results in a larger peakdiode current.VoLVma2RCbVmf RC e2>RCL 12RCVoLVmVme2>RCVmA1e2>RCBvo(2)Vme(2>2>2)RCVme2>RCVoVmVm sin Vm(1 sin )EXAMPLE 3-9 Half-Wave RectiÞer with RCLoadThe half-wave rectiÞer of Fig. 3-11ahas a 120-Vrms source at 60 Hz, R500 , and C100 F. Determine (a) an expression for output voltage, (b) the peak-to-peak volt-age variation on the output, (c) an expression for capacitor current, (d) the peak diode cur-rent, and (e) the value of Csuch that Vois 1 percent of Vm.■SolutionFrom the parameters given,Vm12022169.7 VRC(260)(500)(10)618.85 radhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 91
92CHAPTER3Half-Wave RectiÞersThe angle is determined from Eq. (3-41).The angle is determined from the numerical solution of Eq. (3-43).yielding(a)Output voltage is expressed from Eq. (3-37).(b)Peak-to-peak output voltage is described by Eq. (3-49).(c)The capacitor current is determined from Eq. (3-44).(d)Peak diode current is determined from Eq. (3-48).(e)For Vo0.01Vm, Eq. (3-51) can be used.Note that peak diode current can be determined from Eq. (3-48) using an estimate of from Eq. (3-49).From Eq. (3-48), peak diode current is 30.4 A.■PSpice SolutionAPSpice circuit is created for Fig. 3-11ausing VSIN, Dbreak, R, and C. The diodeDbreak used in this analysis causes the results to differ slightly from the analytic solutionbased on the ideal diode. The diode drop causes the maximum output voltage to beslightly less than that of the source.L sin 1a1VoVmb sin 1a11f RCb81.9¡CLVmf R(Vo)Vm(60)(500)(0.01Vm)1300 F = 3333 FID,peak12(120)c377(10)4 cos 0.843 sin 8.43500d 4.260.344.50 AiC(t)c0.339e(t1.62)>18.85 A t26.4 cos (t) A 2t2VoVm(1 sin )169.7(1 sin 0.843)43 Vvo(t)c169.7 sin (t) 2t2169.5e(t1.62)>18.85 t20.843 rad48¡ sin sin (1.62)e(21.62>18.85)0 tan 1(18.85)1.62 rad93¡Vm sin 169.5 Vhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 92
3.8Half-Wave RectiÞer With a Capacitor Filter93The Probe output is shown in Fig. 3-12. Angles and are determined directly byÞrst modifying the x-variable to indicate degrees (x-variable time*60*360) and thenusing the cursor option. The restrict data option is used to compute quantities based onsteady-state values (16.67 to 50 ms). Steady state is characterized by waveforms begin-ning and ending a period at the same values. Note that the peak diode current is largest inthe Þrst period because the capacitor is initially uncharged.■Results from the Probe CursorQuantityResult360408( 48)98.5Vomax168.9 VVomin126 VVo42.9 VID,peak4.42 Asteady state; 6.36 AÞrst periodIC,peak4.12 Asteady state; 6.39 AÞrst period■Results after Restricting the Data to Steady StateQuantityProbe ExpressionResultID,avgAVG(I(D1))0.295 AIC,rmsRMS(I(C1))0.905 AIR,avgAVG(W(R1))43.8 WPsAVG(W(Vs))44.1 WPDAVG(W(D1))345 mWIn this example, the ripple, or variation in output voltage, is very large, and thecapacitor is not an effective filter. In many applications, it is desirable to produce anoutput that is closer to dc. This requires the time constant RCto be large compared toFigure 3-12Probe output for Example 3-9.INPUT AND OUTPUT VOLTAGESDIODE CURRENTTime200 V-200 V-0.0 A0 s10 ms4.0 A8.0 A0 V20 ms30 ms40 ms50 ms 1(D)V(1) V(2)har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 93
94CHAPTER3Half-Wave RectiÞersthe period of the input voltage, resulting in little decay of the output voltage. For aneffective filter capacitor, the output voltage is essentially the same as the peak voltageof the input.3.9THE CONTROLLED HALF-WAVE RECTIFIERThe half-wave rectiÞers analyzed previously in this chapter are classiÞed asuncontrolled rectiÞers. Once the source and load parameters are established, thedc level of the output and the power transferred to the load are Þxed quantities.Away to control the output of a half-wave rectiÞer is to use an SCR1insteadof a diode. Figure 3-13ashows a basic controlled half-wave rectiÞer with a resis-tive load. Two conditions must be met before the SCR can conduct:1.The SCR must be forward-biased (vSCR0).2.Acurrent must be applied to the gate of the SCR.Unlike the diode, the SCR will not begin to conduct as soon as the source becomespositive. Conduction is delayed until a gate current is applied, which is the basis forusing the SCR as a means of control. Once the SCR is conducting, the gate currentcan be removed and the SCR remains on until the current goes to zero.Resistive LoadFigure 3-13bshows the voltage waveforms for a controlled half-wave rectiÞerwith a resistive load. Agate signal is applied to the SCR at t, where is thedelay angle. The average (dc) voltage across the load resistor in Fig. 3-13ais(3-52)The power absorbed by the resistor is V2rms/R, where the rms voltage acrossthe resistor is computed fromVrmsE12L20v2o(t)d(t) E12L[Vm sin (t)]2d(t) Vm2A1 sin (2)2Vo12LVm sin (t) d(t)Vm2(1 cos ) 1Switching with other controlled turn-on devices such as transistors or IGBTs can be used to control theoutput of a converter.(3-53)har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 94
3.9The Controlled Half-Wave RectiÞer95Controlled Half-Wave RectiÞer with Resistive LoadDesign a circuit to produce an average voltage of 40 Vacross a 100-load resistor froma 120-Vrms 60-Hz ac source. Determine the power absorbed by the resistance and thepower factor.■SolutionIf an uncontrolled half-wave rectiÞer is used, the average voltage will be Vm/120/54 V. Some means of reducing the average resistor voltage to the designspeciÞcation of 40 Vmust be found. Aseries resistance or inductance could be added toan uncontrolled rectiÞer, or a controlled rectiÞer could be used. The controlled rectiÞer ofFig. 3-13ahas the advantage of not altering the load or introducing losses, so it is selectedfor this application.Equation (3-52) is rearranged to determine the required delay angle: cos 1cVoa2Vmb1d cos 1e40c212(120)d1f61.2¡1.07 rad12Figure 3-13(a) Abasic controlled rectiÞer; (b) Voltagewaveforms.(a)(b)++−−iGvs = Vm sin(ωt)vSCRvo+−RGateControlvSCRvovsaωtωtωtaEXAMPLE 3-10 har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 95
96CHAPTER3Half-Wave RectiÞersEquation (3-53) givesLoad power isThe power factor of the circuit isRLLoadAcontrolled half-wave rectiÞer with an RLload is shown in Fig. 3-14a. Theanalysis of this circuit is similar to that of the uncontrolled rectiÞer. The currentis the sum of the forced and natural responses, and Eq. (3-9) applies:The constant Ais determined from the initial condition i() 0:(3-54)Substituting for Aand simplifying,(3-55)The extinction angleis deÞned as the angle at which the current returns to zero,as in the case of the uncontrolled rectiÞer. When t,(3-56) i()0VmZC sin () sin ()e()>Di(t)dVmZC sin (t) sin ()e(t)>D fort 0 otherwisei()0VmZ sin ()Ae>AcVmZ sin ()de>i(t)if(t)in(t)VmZ sin (t)Aet>pfPSPVS,rmsIrms57.1(120)(75.6>100)0.63PRV2rmsR(75.6)210057.1 WVrms22(120)2A11.07 sin [2(1.07)]275.6 Vhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 96
3.9The Controlled Half-Wave RectiÞer97which must be solved numerically for . The angle is called theconduc-tion angle. Figure 3-14bshows the voltage waveforms.The average (dc) output voltage is(3-57)The average current is computed from(3-58)where i(t) is deÞned in Eq. (3-55). Power absorbed by the load is I2rmsR,wherethe rms current is computed from(3-59)IrmsE12Li2(t)d(t)Io12Li(t)d(t)Vo12LVm sin (t)d(t)Vm2 ( cos cos )Figure 3-14(a) Controlled half-wave rectiÞer with RLload;(b) Voltage waveforms.βπαααββ000(a)(b)ωtωtωtvRvRvsvLvLivSCRvovs+++++−−−−−2π 2π + α2π + α2π + α2πvSCRhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 97
98CHAPTER3Half-Wave RectiÞersControlled Half-Wave RectiÞer with RLLoadFor the circuit of Fig. 3-14a, the source is 120 Vrms at 60 Hz, R20 , L0.04 H,and the delay angle is 45. Determine (a) an expression for i(t), (b) the average current,(c) the power absorbed by the load, and (d) the power factor.■Solution(a)From the parameters given,Vm120169.7 VZ[R2(L)2]0.5[202(377*0.04)2]0.525.0 tan1(LR) tan1(377*0.04)20) 0.646 radLR377*0.04/20 0.754450.785 radSubstituting the preceding quantities into Eq. (3-55), current is expressed asThe preceding equation is valid from to , where is found numerically bysetting the equation to zero and solving for t, with the result 3.79 rad (217).The conduction angle is 3.79 0.785 3.01 rad 172.(b)Average current is determined from Eq. (3-58).(c)The power absorbed by the load is computed from I2rmsR, whereyielding(d)The power factor isRL-Source LoadAcontrolled rectiÞer with a series resistance, inductance, and dc source is shownin Fig. 3-15. The analysis of this circuit is very similar to that of the uncontrolledhalf-wave rectiÞer discussed earlier in this chapter. The major difference is thatfor the uncontrolled rectiÞer, conduction begins as soon as the source voltagepfPS213(120)(3.26)0.54PI2rmsR(3.26)2(20)213 WIrmsE12L3.790.785C6.78 sin (t0.646)2.67et>0.754D2d(t)3.26 AIo12L3.790.785C6.78 sin (t0.646)2.67et>0.754Dd(t)2.19 Ai(t)6.78 sin (t0.646)2.67et>0.754 A for t12EXAMPLE 3-11har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 98
3.9The Controlled Half-Wave RectiÞer99reaches the level of the dc voltage. For the controlled rectiÞer, conduction beginswhen a gate signal is applied to the SCR, provided the SCR is forward-biased.Thus, the gate signal may be applied at any time that the ac source is larger thanthe dc source:(3-60)Current is expressed as in Eq. (3-22), with speciÞed within the allowablerange:(3-61)where Ais determined from Eq. (3-61):AcVmZsin()VdcRde>i(t)dVmZ sin (t)VdcR Aet> for t0 otherwiseminsin1aVdcVmbFigure 3-15Controlled rectiÞer with RL-source load.Vm sin(ωt)RLVdci+−+−EXAMPLE 3-12Controlled RectiÞer with RL-Source LoadThe controlled half-wave rectiÞer of Fig. 3-15has an ac input of 120 Vrms at 60 Hz, R2 , L20 mH, and Vdc100 V. The delay angle is 45. Determine (a) an expres-sion for the current, (b) the power absorbed by the resistor, and (c) the power absorbed bythe dc source in the load.■Solution:From the parameters given,Vm120169.7 VZ[R2(L)2]0.5[22(377*0.02)2]0.57.80 tan1(LR) tan1(377*0.02)2) 1.312 radLR377*0.02/2 3.77450.785 rad12har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 99
Controlled Half-Wave RectiÞer Design Using PSpiceAload consists of a series-connected resistance, inductance, and dc voltage source withR2 , L20 mH, and Vdc100 V. Design a circuit that will deliver 150 Wto the dcvoltage source from a 120-Vrms 60-Hz ac source.100CHAPTER3Half-Wave RectiÞers(a)First, use Eq. (3-60) to determine if 45is allowable. The minimum delay angle iswhich indicates that 45is allowable. Equation (3-61) becomeswhere the extinction angle is found numerically to be 3.37 rad from the equationi() 0.(b)Power absorbed by the resistor is I2rmsR, where Irmsis computed from Eq. (3-59)using the preceding expression for i(t).(c)Power absorbed by the dc source is IoVdc, where Iois computed from Eq. (3-58).3.10PSPICE SOLUTIONS FOR CONTROLLEDRECTIFIERSModeling the SCR in PSpiceTo simulate the controlled half-wave rectiÞer in PSpice, a model for the SCRmust be selected. An SCR model available in a device library can be utilized inthe simulation of a controlled half-wave rectiÞer. Acircuit for Example 3-10 using the 2N1595 SCR in the PSpice demo version library of devices isshown in Fig. 3-16a. An alternative model for the SCR is a voltage-controlledswitch and a diode as described in Chap. 1. The switch controls when the SCRbegins to conduct, and the diode allows current in only one direction. The switchmust be closed for at least the conduction angle of the current. An advantage ofusing this SCR model is that the device can be made ideal. The major disadvan-tage of the model is that the switch control must keep the switch closed for theentire conduction period and open the switch before the source becomes positiveagain. Acircuit for the circuit in Example 3-11 is shown in Fig. 3-16b.Io12Li(t)d(t)2.19 APdcIoVdc(2.19)(100)219 WIrmsE12Li2(t)d(t)3.90 AP(3.90) 2 (2)30.4 Wi(t)21.8 sin (t1.312)5075.0et>3.77 A for 0.785t3.37 radminsin1a10012012b36¡EXAMPLE 3-13har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 100
3.10PSpice Solutions for Controlled RectiÞers101Figure 3-16(a) Acontrolled half-wave rectiÞer using an SCR from the libraryof devices; (b) An SCR model using a voltage-controlled switch and a diode.V1 = 0V2 = 5TD = {Alpha/360/60}TR = 1nTF = 1nPW = {1/Freq-DLAY*1.1}PER = {1/Freq}VcontrolControlVsourceSourceVOFF = 0VAMPL = 170FREQ = 60R1L140m2012DbreakoutSCR ModelSbreak0PARAMETERS:Alpha = 45Freq = 60 ++−0TD = {alpha/360/freq}V1 = 0V2 = 5TF = 1nTR = 1nPW = 1mPER = {1/freq}PARAMETERS:alpha = 45freq = 60 SCRSourceVOFF = 0VAMPL = 170FREQ = 60Vcontrol2N1595RL2RG1kVs(a)(b)+−−+−++−Controlled Half-wave Rectifier with SCR 2N1595Change the SCR model for a higher voltage ratingCONTROLLED HALFWAVE RECTIFIERswitch and diode for SCR■SolutionPower in the dc source of 150 Wrequires an average load current of 150 W/100 V1.5 A.An uncontrolled rectiÞer with this source and load will have an average current of 2.25 Aand an average power in the dc source of 225 W, as was computed in Example 3-5 pre-viously. Ameans of limiting the average current to 1.5 Amust be found. Options includethe addition of series resistance or inductance. Another option that is chosen for thisapplication is the controlled half-wave rectiÞer of Fig. 3-15. The power delivered to theload components is determined by the delay angle . Since there is no closed-form solu-tion for , a trial-and-error iterative method must be used. APSpice simulation thatincludes a parametric sweep is used to try several values of alpha. The parametric sweephar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 101
102CHAPTER3Half-Wave RectiÞersis established in the Simulation Setting menu (see Example 3-4). APSpice circuit isshown in Fig. 3-17a.When the expression AVG(W(Vdc)) is entered, Probe produces a family of curvesrepresenting the results for a number of values of , as shown in Fig. 3-17b. An of 70,which results in about 148 Wdelivered to the load, is the approximate solution.Figure 3-17(a) PSpice circuit for Example 3-13; (b) Probe output for showing afamily of curves for different delay angles.(a)V1 = 0V2 = 5TD = {ALPHA/360/60}TR = 1nTF = 1nPW = {1/Freq-DLAY*11}PER = {1/Freq}VcontrolVdcVsControlSOURCEVOFF = 0VAMPL = {120*sqrt(2)}FREQ = 60R1L120m221100DbreakoutSCR ModelCONTROLLED HALFWAVE RECTIFIERparametric sweep for alphaSbreak0PARAMETERS:Alpha = 50Freq = 60 +−+−−++−400 WPARAMETRIC SWEEP FOR ALPHA(16.670m, 147.531)70 deg200 W0 W0 s4 ms8 msTime12 ms16 ms 20 ms22 ms(b)AVG {W(Vdc)}+−−+har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 102
3.11Commutation1032Commutation in this case is an example of natural commutationor line commutation,where thechange in instantaneous line voltage results in a device turning off. Other applications may use forcedcommutation,where current in a device such as a thyristor is forced to zero by additional circuitry. Loadcommutationmakes use of inherent oscillating currents produced by the load to turn a device off.The following results are obtained from Probe for 70:QuantityExpressionResultDC source powerAVG(W(Vdc))148 W(design objective of 150 W)RMS currentRMS(I(R1))2.87 AResistor powerAVG(W(R1))16.5 WSource apparent powerRMS(V(SOURCE))*RMS(I(Vs))344 VASource average powerAVG(W(Vs))166 WPower factor (P/S)166/3440.483.11COMMUTATIONThe Effect of Source InductanceThe preceding discussion on half-wave rectiÞers assumed an ideal source. In practi-cal circuits, the source has an equivalent impedance which is predominantly induc-tive reactance. For the single-diode half-wave rectiÞers of Figs. 3-1and 3-2, thenonideal circuit is analyzed by including the source inductance with the load ele-ments. However, the source inductance causes a fundamental change in circuitbehavior for circuits like the half-wave rectiÞer with a freewheeling diode.Ahalf-wave rectiÞer with a freewheeling diode and source inductance Lsisshown in Fig. 3-18a. Assume that the load inductance is very large, making theload current constant. At t0, the load current is IL, D1is off, and D2is on.As the source voltage becomes positive, D1turns on, but the source currentdoes not instantly equal the load current because of Ls. Consequently, D2mustremain on while the current in Lsand D1increases to that of the load. The inter-val when both D1and D2are on is called the commutation time or commutationangle. Commutation is the process of turning off an electronic switch, whichusually involves transferring the load current from one switch to another.2When both D1and D2are on, the voltage across Lsis(3-62)and current in Lsand the source is(3-63)isVmLs(1 cos t) is1LsLt0vLsd(t)is(0)1LsLt0Vm sin (t)d(t)0vLsVmsin(t)har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 103
104CHAPTER3Half-Wave RectiÞersCurrent in D2isThe current in D2starts at ILand decreases to zero. Letting the angle at which thecurrent reaches zero be tu,Solving for u,(3-64)u cos 1a1ILLsVmb cos 1a1ILXsVmbiD2(u)ILVmLs(1 cos u)0iD2ILisILVmLs(1 cos t)Figure 3-18(a) Half-wave rectiÞer with freewheeling diode and sourceinductance; (b) Diode currents and load voltage showing the effects ofCommutation.iD2ILvovLsLsVm sin(ωt)(a)(b)iD1 = isD2D1++−−ωtωtiD1iD2IovoVmIL000uuπ2π2π + uωt+−har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 104
3.12Summary105where XsLsis the reactance of the source. Figure 3-18bshows the effect ofthe source reactance on the diode currents. The commutation from D1to D2isanalyzed similarly, yielding an identical result for the commutation angle u.The commutation angle affects the voltage across the load. Since the voltageacross the load is zero when D2is conducting, the load voltage remains at zerothrough the commutation angle, as shown in Fig. 3-17b. Recall that the load volt-age is a half-wave rectiÞed sinusoid when the source is ideal.Average load voltage isUsing ufrom Eq. (3-64),(3-65)Recall that the average of a half-wave rectiÞed sine wave is Vm. Source reac-tance thus reduces average load voltage.3.12Summary¥ArectiÞer converts ac to dc. Power transfer is from the ac source to the dc load.¥The half-wave rectiÞer with a resistive load has an average load voltage of Vm/and an average load current of Vm/R.¥The current in a half-wave rectiÞer with an RLload contains a natural and a forcedresponse, resulting inwhereThe diode remains on as long as the current is positive. Power in the RLload is I2rmsR.¥Ahalf-wave rectiÞer with an RL-source load does not begin to conduct until the acsource reaches the dc voltage in the load. Power in the resistance is I2rmsR, andpower absorbed by the dc source is IoVdc, where Iois the average load current. Theload current is expressed asi(t)dVmZ sin (t) VdcR Aet> for t0 otherwiseZ2R2(L)2, tan 1aLRb and LRi(t)dVmZC sin (t)sin ()et>D for 0t0 for t2 VoVma1ILXs2VmbVo12LuVm sin (t)d(t) Vm2[cos (t)]ƒuVm2(1 cos u)har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 105
106CHAPTER3Half-Wave RectiÞerswhere¥Afreewheeling diode forces the voltage across an RLload to be a half-waverectiÞed sine wave. The load current can be analyzed using Fourier analysis. Alarge load inductance results in a nearly constant load current.¥Alarge Þlter capacitor across a resistive load makes the load voltage nearlyconstant. Average diode current must be the same as average load current, makingthe peak diode current large.¥An SCR in place of the diode in a half-wave rectiÞer provides a means ofcontrolling output current and voltage.¥PSpice simulation is an effective way of analyzing circuit performance. Theparametric sweep in PSpice allows several values of a circuit parameter to be triedand is an aid in circuit design.3.13BibliographyS. B. Dewan and A. Straughen, Power Semiconductor Circuits, Wiley, New York, 1975.Y.-S. Lee and M. H. L. Chow, Power Electronics Handbook, edited by M. H. Rashid,Academic Press, New York, 2001, Chapter 10.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters,Applications, and Design,3ded., Wiley, New York, 2003.M. H. Rashid, Power Electronics: Circuits, Devices, and Systems,3ded., Prentice-Hall,Upper Saddle River, NJ., 2004.R. Shaffer, Fundamentals of Power Electronics with MATLAB,Charles River Media,Boston, Mass., 2007.B. Wu, High-Power Converters and AC Drives,Wiley, New York, 2006.ProblemsHalf-Wave RectiÞerwith Resistive Load3-1.The half-wave rectiÞer circuit of Fig. 3-1ahas vs(t) 170 sin(377t) Vand a loadresistance R15 . Determine (a) the average load current, (b) the rms loadcurrent, (c) the power absorbed by the load, (d) the apparent power supplied bythe source, and (e) the power factor of the circuit.3-2.The half-wave rectiÞer circuit of Fig. 3-1ahas a transformer inserted between thesource and the remainder of the circuit. The source is 240 Vrms at 60 Hz, andthe load resistor is 20 . (a) Determine the required turns ratio of the transformersuch that the average load current is 12 A. (b) Determine the average current inthe primary winding of the transformer.3-3.For a half-wave rectiÞer with a resistive load, (a) show that the power factor is 1/and (b) determine the displacement power factor and the distortion factor as deÞnedin Chap. 2. The Fourier series for the half-wave rectiÞed voltage is given in Eq. (3-34).12AcVmZsin()VdcRde>har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 106
Problems107Half-Wave RectiÞerwith RLLoad3-4.Ahalf-wave rectiÞer has a source of 120 Vrms at 60 Hz and an RLload with R12 and L12 mH. Determine (a) an expression for load current, (b) theaverage current, (c) the power absorbed by the resistor, and (d) the power factor.3-5.Ahalf-wave rectiÞer has a source of 120 Vrms at 60 Hz and an RLload with R10 and L15 mH. Determine (a) an expression for load current, (b) theaverage current, (c) the power absorbed by the resistor, and (d) the power factor.3-6.Ahalf-wave rectiÞer has a source of 240 Vrms at 60 Hz and an RLload with R15 and L80 mH. Determine (a) an expression for load current, (b) theaverage current, (c) the power absorbed by the resistor, and (d) the power factor.(e) Use PSpice to simulate the circuit. Use the default diode model and compareyour PSpice results with analytical results.3-7.The inductor in Fig. 3-2arepresents an electromagnet modeled as a 0.1-Hinductance. The source is 240 Vat 60 Hz. Use PSpice to determine the value of aseries resistance such that the average current is 2.0 A.Half-Wave RectiÞerwith RL-Source Load3-8.Ahalf-wave rectiÞer of Fig. 3-5ahas a 240 Vrms, 60 Hz ac source. The load is a series inductance, resistance, and dc source, with L75 mH, R10 , andVdc100 V. Determine (a) the power absorbed by the dc voltage source, (b) thepower absorbed by the resistance, and (c) the power factor.3-9.Ahalf-wave rectiÞer of Fig. 3-5ahas a 120 Vrms, 60 Hz ac source. The load is a series inductance, resistance, and dc source, with L120 mH, R12 , andVdc48 V. Determine (a) the power absorbed by the dc voltage source, (b) thepower absorbed by the resistance, and (c) the power factor.3-10.Ahalf-wave rectiÞer of Fig. 3-6has a 120 Vrms, 60 Hz ac source. The load is a series inductance and dc voltage with L100 mH and Vdc48 V. Determinethe power absorbed by the dc voltage source.3-11.Ahalf-wave rectiÞer with a series inductor-source load has an ac source of 240 Vrms,60 Hz. The dc source is 96 V. Use PSpice to determine the value of inductancewhich results in 150 Wabsorbed by the dc source. Use the default diode model.3-12.Ahalf-wave rectifier with a series inductor and dc source has an ac source of120 Vrms, 60 Hz. The dc source is 24 V. Use PSpice to determine the value ofinductance which results in 50 Wabsorbed by the dc source. Use the default diode.Freewheeling Diode3-13.The half-wave rectiÞer with a freewheeling diode (Fig. 3-7a) has R12 andL60 mH. The source is 120 Vrms at 60 Hz. (a) From the Fourier series of thehalf-wave rectiÞed sine wave that appears across the load, determine the dccomponent of the current. (b) Determine the amplitudes of the Þrst four nonzeroac terms in the Fourier series. Comment on the results.3-14.In Example 3-8, the inductance required to limit the peak-to-peak ripple in loadcurrent was estimated by using the Þrst ac term in the Fourier series. Use PSpiceto determine the peak-to-peak ripple with this inductance, and compare it to theestimate. Use the ideal diode model (n0.001).har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 107
108CHAPTER3Half-Wave RectiÞers3-15.The half-wave rectiÞer with a freewheeling diode (Fig. 3-7a) has R4 and asource with Vm50 Vat 60 Hz. (a) Determine a value of Lsuch that the amplitudeof the Þrst ac current term in the Fourier series is less than 5 percent of the dccurrent. (b) Verify your results with PSpice, and determine the peak-to-peak current.3-16.The circuit of Fig. P3-16is similar to the circuit of Fig. 3-7aexcept that a dc sourcehas been added to the load. The circuit has vs(t) 170 sin(377t) V, R10 , and Vdc24 V. From the Fourier series, (a) determine the value of Lsuch that thepeak-to-peak variation in load current is no more than 1 A. (b) Determine thepower absorbed by the dc source. (c) Determine the power absorbed by the resistor.RLVdciovs(t)+−+−FigureP3-16Half-Wave RectiÞerwith a FilterCapacitor3-17.Ahalf-wave rectiÞer with a capacitor Þlter has Vm200 V, R1 k, C1000 F,and 377. (a) Determine the ratio of the RCtime constant to the period of theinput sine wave. What is the signiÞcance of this ratio? (b) Determine the peak-to-peak ripple voltage using the exact equations. (c) Determine the ripple using theapproximate formula in Eq. (3-51).3-18.Repeat Prob. 3-17 with (a) R100 and (b)R10 . Comment on the results.3-19.Ahalf-wave rectiÞer with a 1-kload has a parallel capacitor. The source is 120 Vrms, 60 Hz. Determine the peak-to-peak ripple of the output voltage whenthe capacitor is (a) 4000 F and (b) 20 F. Is the approximation of Eq. (3-51)reasonable in each case?3-20.Repeat Prob. 3-19 with R500 .3-21.Ahalf-wave rectiÞer has a 120 Vrms, 60 Hz ac source. The load is 750 .Determine the value of a Þlter capacitor to keep the peak-to-peak ripple acrossthe load to less than 2 V. Determine the average and peak values of diode current.3-22.Ahalf-wave rectiÞer has a 120 Vrms 60 Hz ac source. The load is 50 W.(a) Determine the value of a Þlter capacitor to keep the peak-to-peak ripple across theload to less than 1.5 V. (b) Determine the average and peak values of diode current.Controlled Half-Wave RectiÞer3-23.Show that the controlled half-wave rectiÞer with a resistive load in Fig. 3-13ahas a power factor of3-24.For the controlled half-wave rectiÞer with resistive load, the source is 120 Vrmsat 60 Hz. The resistance is 100 , and the delay angle is 45. (a) Determine thepfA122 sin (2)4har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 108
Problems 109average voltage across the resistor. (b) Determine the power absorbed by theresistor. (c) Determine the power factor as seen by the source.3-25.Acontrolled half-wave rectiÞer has an ac source of 240 Vrms at 60 Hz. The load is a30-resistor. (a) Determine the delay angle such that the average load current is 2.5 A. (b) Determine the power absorbed by the load. (c) Determine the power factor.3-26.Acontrolled half-wave rectiÞer has a 120 Vrms 60 Hz ac source. The series RLload has R25 and L50 mH. The delay angle is 30. Determine (a) anexpression for load current, (b) the average load current, and (c) the powerabsorbed by the load.3-27.Acontrolled half-wave rectiÞer has a 120 Vrms 60 Hz ac source. The series RLload has R40 and L75 mH. The delay angle is 60. Determine (a) anexpression for load current, (b) the average load current, and (c) the powerabsorbed by the load.3-28.Acontrolled half-wave rectiÞer has an RLload with R20 and L40 mH.The source is 120 Vrms at 60 Hz. Use PSpice to determine the delay anglerequired to produce an average current of 2.0 Ain the load. Use the default diodein the simulation.3-29.Acontrolled half-wave rectiÞer has an RLload with R16 and L60 mH.The source is 120 Vrms at 60 Hz. Use PSpice to determine the delay anglerequired to produce an average current of 1.8 Ain the load. Use the default diodein the simulation.3-30.Acontrolled half-wave rectiÞer has a 120 V, 60 Hz ac source. The load is a seriesinductance, resistance, and dc source, with L100 mH, R12 , and Vdc48 V.The delay angle is 50. Determine (a) the power absorbed by the dc voltage source,(b) the power absorbed by the resistance, and (c) the power factor.3-31.Acontrolled half-wave rectiÞer has a 240 Vrms 60 Hz ac source. The load is aseries resistance, inductance, and dc source with R100 , L150 mH, andVdc96 V. The delay angle is 60. Determine (a) the power absorbed by the dcvoltage source, (b) the power absorbed by the resistance, and (c) the power factor.3-32.Use PSpice to determine the delay angle required such that the dc source in Prob. 3-31 absorbs 35 W.3-33.Acontrolled half-wave rectiÞer has a series resistance, inductance, and dc voltagesource with R2 , L75 mH, and Vdc48 V. The source is 120 Vrms at 60 Hz.The delay angle is 50. Determine (a) an expression for load current, (b) the powerabsorbed by the dc voltage source, and (c) the power absorbed by the resistor.3-34.Use PSpice to determine the delay angle required such that the dc source in Prob.3-33 absorbs 50 W.3-35.Develop an expression for current in a controlled half-wave rectiÞer circuit thathas a load consisting of a series inductance Land dc voltage Vdc. The source is vsVmsin t, and the delay angle is . (a) Determine the average current if Vm100 V, L35 mH, Vdc24 V, 260 rad/s, and 75. (b) Verifyyour result with PSpice.3-36.Acontrolled half-wave rectiÞer has an RLload. Afreewheeling diode is placed inparallel with the load. The inductance is large enough to consider the load currentto be constant. Determine the load current as a function of the delay angle alpha.Sketch the current in the SCR and the freewheeling diode. Sketch the voltageacross the load.har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 109
110CHAPTER3Half-Wave RectiÞersCommutation3-37.The half-wave rectiÞer with freewheeling diode of Fig. 3-18ahas a 120 Vrms acsource that has an inductance of 1.5 mH. The load current is a constant 5 A.Determine the commutation angle and the average output voltage. Use PSpice toverify your results. Use ideal diodes in the simulation. Verify that thecommutation angle for D1to D2is the same as for D2to D1.3-38.The half-wave rectiÞer with freewheeling diode of Fig. 3-18ahas a 120 Vrms acsource which has an inductance of 10 mH. The load is a series resistance-inductancewith R20 and L500 mH. Use PSpice to determine (a) the steady-stateaverage load current, (b) the average load voltage, and (c) the commutation angle.Use the default diode in the simulation. Comment on the results.3-39.The half-wave rectiÞer with freewheeling diode of Fig. 3-18ahas a 120 Vrms acsource which has an inductance of 5 mH. The load is a series resistance-inductance with R15 and L500 mH. Use PSpice to determine (a) thesteady-state average load current, (b) the average load voltage, and (c) thecommutation angle. Use the default diode in the simulation.3-40.The commutation angle given in Eq. (3-64) for the half-wave rectifier with a freewheeling diode was developed for commutation of load current from D2to D1. Show that the commutation angle is the same for commutation fromD1to D2.3-41.Diode D1in Fig. 3-18ais replaced with an SCR to make a controlled half-waverectiÞer. Show that the angle for commutation from the diode to the SCR iswhere is the delay angle of the SCR.Design Problems3-42.Acertain situation requires that either 160 or 75 Wbe supplied to a 48 Vbatteryfrom a 120 Vrms 60 Hz ac source. There is a two-position switch on a controlpanel set at either 160 or 75. Design a single circuit to deliver both values ofpower, and specify what the control switch will do. Specify the values of all thecomponents in your circuit. The internal resistance of the battery is 0.1 .3-43.Design a circuit to produce an average current of 2 Ain an inductance of 100 mH. The ac source available is 120 Vrms at 60 Hz. Verify your design with PSpice. Give alternative circuits that could be used to satisfy the designspeciÞcations, and give reasons for your selection.3-44.Design a circuit that will deliver 100 Wto a 48 Vdc source from a 120 Vrms 60 Hz ac source. Verify your design with PSpice. Give alternative circuits thatcould be used to satisfy the design speciÞcations, and give reasons for yourselection.3-45.Design a circuit which will deliver 150 Wto a 100 Vdc source from a 120 Vrms60 Hz ac source. Verify your design with PSpice. Give alternative circuits thatcould be used to satisfy the design speciÞcations, and give reasons for yourselection.ucos1a cos ILXsVmbhar80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 110
CHAPTER4111Full-Wave RectiÞersConverting ac to dc4.1INTRODUCTIONThe objective of a full-wave rectiÞer is to produce a voltage or current that ispurely dc or has some speciÞed dc component. While the purpose of the full-wave rectiÞer is basically the same as that of the half-wave rectiÞer, full-waverectiÞers have some fundamental advantages. The average current in the acsource is zero in the full-wave rectiÞer, thus avoiding problems associated withnonzero average source currents, particularly in transformers. The output of thefull-wave rectiÞer has inherently less ripple than the half-wave rectiÞer.In this chapter, uncontrolled and controlled single-phase and three-phasefull-wave converters used as rectiÞers are analyzed for various types of loads.Also included are examples of controlled converters operating as inverters,where power ßow is from the dc side to the ac side.4.2SINGLE-PHASE FULL-WAVE RECTIFIERSThe bridge rectiÞer and the center-tapped transformer rectiÞer of Figs. 4-1and 4-2are two basic single-phase full-wave rectiÞers.The Bridge RectiÞerFor the bridge rectiÞer of Fig. 4-1, these are some basic observations:1.Diodes D1and D2conduct together, and D3and D4conduct together.KirchhoffÕs voltage law around the loop containing the source, D1, and D3har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 111
VmVmVm–Vm–VmvsvoioD4D1=D32p000000pp2pp2pwtwtwtD1D3+–D2D4iD1vD1, vD2vD3, vD4iD3, iD4isiD1, iD2iD4D2–+vsisiovovsvoiois2pp2ppwtwt02ppwt2ppwt2ppwt+-+-(a)(b)(c)Figure 4-1Full-wave bridge rectiÞer. (a) Circuit diagram. (b) Alternativerepresentation. (c) Voltages and currents.112har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 112
4.2Single-Phase Full-Wave RectiÞers113vsVmvoVmÐVmÐ2VmÐ2VmioisvD1vD2000π2π3π4πωtiD1iD2vsvoiovS1N1 : N2vS2D2D1+ÐÐÐÐ+++−(a)(b)Figure 4-2Full-wave center-tapped rectiÞer (a) circuit; (b) voltages and currents.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 113
114CHAPTER 4Full-Wave RectiÞersshows that D1and D3cannot be on at the same time. Similarly, D2and D4cannot conduct simultaneously. The load current can be positive or zero butcan never be negative.2.The voltage across the load is vswhen D1and D2are on. The voltageacross the load is vswhen D3and D4are on.3.The maximum voltage across a reverse-biased diode is the peak value of thesource. This can be shown by KirchhoffÕs voltage law around the loopcontaining the source, D1, and D3. With D1on, the voltage across D3is vs.4.The current entering the bridge from the source is iD1 iD4, which issymmetric about zero. Therefore, the average source current is zero.5.The rms source current is the same as the rms load current. The sourcecurrent is the same as the load current for one-half of the source period andis the negative of the load current for the other half. The squares of the loadand source currents are the same, so the rms currents are equal.6.The fundamental frequency of the output voltage is 2, where is thefrequency of the ac input since two periods of the output occur for everyperiod of the input. The Fourier series of the output consists of a dc term andthe even harmonics of the source frequency.The Center-Tapped TransformerRectiÞerThe voltage waveforms for a resistive load for the rectiÞer using the center-tapped transformer are shown in Fig. 4-2. Some basic observations for this cir-cuit are as follows:1.KirchhoffÕs voltage law shows that only one diode can conduct at a time.Load current can be positive or zero but never negative.2.The output voltage is vs1when D1conducts and isvs2when D2conducts.The transformer secondary voltages are related to the source voltage by vs1vs2vs( N2/2N1).3.KirchhoffÕs voltage law around the transformer secondary windings, D1, andD2shows that the maximum voltage across a reverse-biased diode is twicethe peak value of the load voltage.4.Current in each half of the transformer secondary is reßected to the primary,resulting in an average source current of zero.5.The transformer provides electrical isolation between the source and theload.6.The fundamental frequency of the output voltage is 2since two periods ofthe output occur for every period of the input.The lower peak diode voltage in the bridge rectiÞer makes it more suitablefor high-voltage applications. The center-tapped transformer rectiÞer, in additionto including electrical isolation, has only one diode voltage drop between thesource and load, making it desirable for low-voltage, high-current applications.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 114
4.2Single-Phase Full-Wave RectiÞers115The following discussion focuses on the full-wave bridge rectiÞer but gen-erally applies to the center-tapped circuit as well.Resistive LoadThe voltage across a resistive load for the bridge rectiÞer of Fig. 4-1is expressed as(4-1)The dc component of the output voltage is the average value, and load current issimply the resistor voltage divided by resistance.(4-2)Power absorbed by the load resistor can be determined from I2rmsR, where Irmsfor the full-wave rectiÞed current waveform is the same as for an unrectiÞedsine wave,(4-3)The source current for the full-wave rectiÞer with a resistive load is a sinu-soid that is in phase with the voltage, so the power factor is 1.RLLoadFor an RLseries-connected load (Fig. 4-3a), the method of analysis is similar tothat for the half-wave rectiÞer with the freewheeling diode discussed in Chap. 3.After a transient that occurs during start-up, the load current ioreaches a periodicsteady-state condition similar to that in Fig. 4-3b.For the bridge circuit, current is transferred from one pair of diodes to theother pair when the source changes polarity. The voltage across the RLload is afull-wave rectiÞed sinusoid, as it was for the resistive load. The full-wave recti-Þed sinusoidal voltage across the load can be expressed as a Fourier series con-sisting of a dc term and the even harmonicswhere(4-4)Vo2Vm and Vn2Vm a1n1 1n1bvo(t)Voaqn2,4ÁVn cos (n0 t)IrmsIm12IoVoR2VmRVo130Vm sin t d(t)2Vm vo(t)bVm sin tVm sin t for 0 t for t 2har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 115
1160π2π(b)(c)3π4πωtvo, iovs, isvs, isvo, iD1, iD2vo, iD3, iD4vsisiD1, iD2iD3, iD4voio(a)D1D4RLD3D2+Ðvoioisvs(t) =Vm sin ωt+−Figure 4-3(a) Bridge rectiÞer with an RLload; (b) Voltages andcurrents; (c) Diode and source currents when the inductance islarge and the current is nearly constant.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 116
4.2Single-Phase Full-Wave RectiÞers117The current in the RLload is then computed using superposition, taking eachfrequency separately and combining the results. The dc current and currentamplitude at each frequency are computed from(4-5)Note that as the harmonic number nincreases in Eq.(4-4), the voltageamplitude decreases. For an RLload, the impedance Znincreases as nincreases.The combination of decreasing Vnand increasing Znmakes Indecrease rapidlyfor increasing harmonic number. Therefore, the dc term and only a few, if any, ofthe ac terms are usually necessary to describe current in an RLload.InVnZnVnƒRjnLƒI0V0REXAMPLE 4-1Full-Wave RectiÞer with RLLoadThe bridge rectiÞer circuit of Fig. 4-3ahas an ac source with Vm100 Vat 60 Hz and aseries RLload with R10and L10mH. (a) Determine the average current in theload. (b) Estimate the peak-to-peak variation in load current based on the Þrst ac term inthe Fourier series. (c) Determine the power absorbed by the load and the power factor ofthe circuit. (d) Determine the average and rms currents in the diodes.■Solution(a)The average load current is determined from the dc term in the Fourier series. Thevoltage across the load is a full-wave rectiÞed sine wave that has the Fourier seriesdetermined from Eq. (4-4). Average output voltage isand average load current is(b)Amplitudes of the ac voltage terms are determined from Eq. (4-4). For n2 and 4,The amplitudes of Þrst two ac current terms in the current Fourier series arecomputed from Eq. (4-5).I48.49|10j(4)(377)(0.01)|8.49 V18.1 Æ0.47 AI242.4|10j(2)(377)(0.01)|42.4 V12.5 Æ3.39 AV42(100)a1315b8.49 VV22(100)a1113b42.4 VI0V0R63.7 V10 Æ6.37 AV02Vm2(200)63.7 Vhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 117
118CHAPTER 4Full-Wave RectiÞersThe current I2is much larger than I4and higher-order harmonics, so I2can be usedto estimate the peak-to-peak variation in load current ioL2(3.39) 6.78 A.Actual variation in iowill be larger because of the higher-order terms.(c)The power absorbed by the load is determined from I2rms. The rms current is thendetermined from Eq. (2-43) asAdding more terms in the series would not be useful because they are small andhave little effect on the result. Power in the load isThe rms source current is the same as the rms load current. Power factor is(d)Each diode conducts for one-half of the time, soandIn some applications, the load inductance may be relatively large or madelarge by adding external inductance. If the inductive impedance for the ac termsin the Fourier series effectively eliminates the ac current terms in the load, theload current is essentially dc. If LWR,(4-6)Load and source voltages and currents are shown in Fig. 4-3c.Source HarmonicsNonsinusoidal source current is a concern in power systems. Source currents likethat of Fig. 4-3have a fundamental frequency equal to that of the source but arerich in the odd-numbered harmonics. Measures such as total harmonic distortion(THD) and distortion factor (DF) as presented in Chap. 2describe the nonsinu-soidal property of the source current. Where harmonics are of concern, Þlters canbe added to the input of the rectiÞer.i(t)LIoVoR2VmR IrmsLIo for LWRID, rmsIrms126.81124.82 AID, avgIo26.3723.19 ApfPSPVs, rms Is, rms464a10012b(6.81)0.964PI2rms R(6.81)2 (10)464 WC(6.37)2a3.3912b2a0.4712b2Á L 6.81 AIrms3gI2n, rmshar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 118
4.2Single-Phase Full-Wave RectiÞers119PSpice SimulationAPSpice simulation will give the output voltage, current, and power for full-wave rectiÞer circuits. Fourier analysis from the FOUR command or from Probewill give the harmonic content of voltages and currents in the load and source.The default diode model will give results that differ from the analytical resultsthat assume an ideal diode. For the full-wave rectiÞer, two diodes will conduct ata time, resulting in two diode voltage drops. In some applications, the reducedvoltage at the output may be signiÞcant. Since voltage drops across the diodesexist in real circuits, PSpice results are a better indicator of circuit performancethan results that assume ideal diodes. (To simulate an ideal circuit in PSpice, adiode model with n0.001 will produce forward voltage drops in the microvoltrange, approximating an ideal diode.)EXAMPLE 4-2PSpice Simulation of a Full-Wave RectiÞerFor the full-wave bridge rectiÞer in Example 4-1, obtain the rms current and power absorbed by the load from a PSpice simulation.■SolutionThe PSpice circuit for Fig. 4-3is created using VSIN for the source, Dbreak for thediodes, and Rand Lfor the load. Atransient analysis is performed using a run time of 50 ms and data saved after 33.33 ms to obtain steady-state current.The Probe output is used to determine the operating characteristics of the rectiÞerusing the same techniques as presented in Chaps. 2and 3. To obtain the average value ofthe load current, enter AVG(I(R1)). Using the cursor to identify the point at the end of theresulting trace, the average current is approximately 6.07 A. The Probe output is shownin Fig. 4-4.Entering RMS(I(R1)) shows that the rms current is approximately 6.52 A. Powerabsorbed by the resistor can be computed from I2rmsR, or average power in the load canbe computed directly from Probe by entering AVG(W(R1)), which yields 425.4 W.This is significantly less than the 464 Wobtained in Example 4-1 when assuming idealdiodes.The power supplied by the ac source is computed from AVG(W(V1)) as 444.6 W.When ideal diodes were assumed, power supplied by the ac source was identical to thepower absorbed by the load, but this analysis reveals that power absorbed by thediodes in the bridge is 444.6 425.4 19.2 W. Another way to determine power absorbed by the bridge is to enter AVG(W(D1)) to obtain the power absorbed by diodeD1, which is 4.8 W. Total power for the diodes is 4 times 4.8, or 19.2 W. Better mod-els for power diodes would yield a more accurate estimate of power dissipation in thediodes.Comparing the results of the simulation to the results based on ideal diodes showshow more realistic diode models reduce the current and power in the load.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 119
120CHAPTER 4Full-Wave RectiÞersRL-Source LoadAnother general industrial load may be modeled as a series resistance, induc-tance, and a dc voltage source, as shown in Fig. 4-5a. Adc motor drive circuitand a battery charger are applications for this model. There are two possiblemodes of operation for this circuit, the continuous-current mode and the discontinuous-current mode. In the continuous-current mode, the load currentis always positive for steady-state operation (Fig. 4-5b). Discontinuous load current is characterized by current returning to zero during every period(Fig. 4-5c).For continuous-current operation, one pair of diodes is always conducting,and the voltage across the load is a full-wave rectiÞed sine wave. The only mod-iÞcation to the analysis that was done for an RLload is in the dc term of theFourier series. The dc (average) component of current in this circuit is(4-7)The sinusoidal terms in the Fourier analysis are unchanged by the dc source pro-vided that the current is continuous.Discontinuous current is analyzed like the half-wave rectiÞer of Sec. 3.5.The load voltage is not a full-wave rectiÞed sine wave for this case, so theFourier series of Eq. (4-4) does not apply.Io VoVdcR 2VmVdcRFigure 4-4PSpice output for Example 4-2.0 A32 ms35 ms40 ms45 msTime50 ms55 ms60 ms5 AI (R1)RMS(50.000m, 6.5224)AVERAGE(50.000m, 6.0687)10 AI (R1)AVG (I(R1))RMS (I(R1))har80679_ch04_111-170.qxd 12/17/09 2:35 PM Page 120
4.2Single-Phase Full-Wave RectiÞers121Full-Wave RectiÞer with RL-Source LoadÑContinuous CurrentFor the full-wave bridge rectiÞer circuit of Fig. 4-5a, the ac source is 120 Vrms at 60 Hz,R2 , L10 mH, and Vdc80 V. Determine the power absorbed by the dc voltagesource and the power absorbed by the load resistor.(a)(b)(c)++ÐÐiovovoiovoiottVdcVdcRL+−Figure 4-5(a) RectiÞer with RL-source load; (b) Continuous current: whenthe circuit is energized, the load current reaches the steady-state after a fewperiods; (c) Discontinuous current: the load current returns to zero duringevery period.EXAMPLE 4-3har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 121
122CHAPTER 4Full-Wave RectiÞers■SolutionFor continuous current, the voltage across the load is a full-wave rectiÞed sine wavewhich has the Fourier series given by Eq. (4-4). Equation (4-7) is used to compute the average current, which is used to compute power absorbed by the dc source,The first few terms of the Fourier series using Eqs. (4-4) and (4-5) are shown in Table 4-1.PdcI0Vdc(14)(80)1120 WI02VmVdcR222(120)80214.0 ATable 4-1Fourier series componentsnVnZnIn01082.014.0272.07.809.23414.415.20.90The rms current is computed from Eq. (2-43).Power absorbed by the resistor isPSpice SolutionPSpice simulation of the circuit of Fig 4-5ausing the default diode model yields these results from Probe:QuantityExpression EnteredResultIoAVG(I(R1))11.9 AIrmsRMS(I(R1))13.6 APacAVG(W(Vs))1383 WPD1AVG(W(D1))14.6 WPdcAVG(W(VDC))955 WPRAVG(W(R))370 WNote that the simulation veriÞes the assumption of continuous load current.Capacitance Output FilterPlacing a large capacitor in parallel with a resistive load can produce an outputvoltage that is essentially dc (Fig. 4-6). The analysis is very much like that of thehalf-wave rectiÞer with a capacitance Þlter in Chap. 3. In the full-wave circuit,the time that the capacitor discharges is smaller than that for the half-wave circuitPRI2rms R(15.46)2(2)478 WIrmsC142a9.2312b2a0.9012b2… L 15.46 A har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 122
4.2Single-Phase Full-Wave RectiÞers123because of the rectiÞed sine wave in the second half of each period. The outputvoltage ripple for the full-wave rectiÞer is approximately one-half that of thehalf-wave rectiÞer. The peak output voltage will be less in the full-wave circuitbecause there are two diode voltage drops rather than one.The analysis proceeds exactly as for the half-wave rectiÞer. The output volt-age is a positive sine function when one of the diode pairs is conducting and is adecaying exponential otherwise. Assuming ideal diodes,(4-8)where is the angle where the diodes become reverse biased, which is the sameas that for the half-wave rectiÞer and is found using Eq. (3-41).(4-9)The maximum output voltage is Vm, and the minimum output voltage is deter-mined by evaluating voat the angle at which the second pair of diodes turns on,which is at t. At that boundary point,(Vm sin )e()>RCVm sin () tan 1(RC)tan 1(RC) vo(t)bƒVm sin tƒone diode pair on(Vm sin )e(t)>RCdiodes offiCCR+0π2ππ + ααθÐiRvs(t) =vm sin(ωt)vovoVmΔVoωtÐ+−(a)(b)Figure 4-6(a) Full-wave rectiÞer with capacitance Þlter; (b) Source and output voltage.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 123
124CHAPTER 4Full-Wave RectiÞersor(4-10)which must be solved numerically for .The peak-to-peak voltage variation, or ripple, is the difference between max-imum and minimum voltages.(4-11)This is the same as Eq. (3-49) for voltage variation in the half-wave rectiÞer, butis larger for the full-wave rectiÞer and the ripple is smaller for a given load. Ca-pacitor current is described by the same equations as for the half-wave rectiÞer.In practical circuits where RCW.(4-12)The minimum output voltage is then approximated from Eq. (4-9) for the diodesoff evaluated at t.The ripple voltage for the full-wave rectiÞer with a capacitor Þlter can then beapproximated asFurthermore, the exponential in the above equation can be approximated by theseries expansionSubstituting for the exponential in the approximation, the peak-to-peak ripple is(4-13)Note that the approximate peak-to-peak ripple voltage for the full-wave rectiÞeris one-half that of the half-wave rectiÞer from Eq. (3-51). As for the half-waverectiÞer, the peak diode current is much larger than the average diode current andEq. (3-48) applies. The average source current is zero.VoLVmRCVm2f RCe>RCL1 RC VoLVm(1e>RC)vo ()Vme(>2>2)>RCVme>RCL>2 L>2VoVmƒVm sin ()ƒVm(1 sin )(sin )e()>RC sin 0EXAMPLE 4-4Full-Wave RectiÞer with Capacitance FilterThe full-wave rectiÞer of Fig. 4-6ahas a 120 Vsource at 60 Hz, R500 , and C100 F.(a) Determine the peak-to-peak voltage variation of the output. (b) Determine the value ofcapacitance that would reduce the output voltage ripple to 1percent of the dc value.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 124
4.2Single-Phase Full-Wave RectiÞers125■SolutionFrom the parameters given,The angle is determined from Eq. (4-9).The angle is determined by the numerical solution of Eq. (4-10).(a)Peak-to-peak output voltage is described by Eq. (4-11).Note that this is the same load and source as for the half-wave rectiÞer of Example 3-9where Vo43 V.(b)With the ripple limited to 1 percent, the output voltage will be held close to Vmandthe approximation of Eq. (4-13) applies.Solving for C,Voltage DoublersThe rectiÞer circuit of Fig. 4-7aserves as a simple voltage doubler, having anoutput of twice the peak value of the source. For ideal diodes, C1charges to Vmthrough D1when the source is positive; C2charges to Vmthrough D2when thesource is negative. The voltage across the load resistor is the sum of the capaci-tor voltages 2Vm. This circuit is useful when the output voltage of a rectiÞer mustbe larger than the peak input voltage. Voltage doubler circuits avoid using atransformer to step up the voltage, saving expense, volume, and weight.The full-wave rectiÞer with a capacitive output Þlter can be combined withthe voltage doubler, as shown in Fig. 4-7b. When the switch is open, the circuitis similar to the full-wave rectiÞer of Fig. 4-6a, with output at approximatelyVmwhen the capacitors are large. When the switch is closed, the circuit acts asthe voltage doubler of Fig. 4-7a. Capacitor C1charges to Vmthrough D1whenCL12fR(Vo>Vm)1(2)(60)(500)(0.01)1670 FVoVm 0.01L 12fRC VoVm(1sin )169.731sin(1.06)422 V 1.06 rad = 60.6¡ sin (1.62)e(1.62)>18.85 sin 0Vm sin 169.5 Vtan 1(18.85)1.62 rad93¡RC(260)(500)(10)618.85Vm12022169.7 Vhar80679_ch04_111-170.qxd 12/17/09 2:36 PM Page 125
126CHAPTER 4Full-Wave RectiÞersthe source is positive, and C2charges to Vmthrough D4when the source is neg-ative. The output voltage is then 2Vm. Diodes D2and D3remain reverse-biasedin this mode.This voltage doubler circuit is useful when equipment must be used on sys-tems with different voltage standards. For example, a circuit could be designedto operate properly in both the United States, where the line voltage is 120 V, andplaces abroad where the line voltage is 240 V.LCFiltered OutputAnother full-wave rectiÞer conÞguration has an LCÞlter on the output, as shownin Fig. 4-8a. The purpose of the Þlter is to produce an output voltage that is closeto purely dc. The capacitor holds the output voltage at a constant level, and theinductor smooths the current from the rectiÞer and reduces the peak current inthe diodes from that of the current of Fig. 4-6a.The circuit can operate in the continuous- or discontinuous-current mode.For continuous current, the inductor current is always positive, as illustrated inFig. 4-8b. Discontinuous current is characterized by the inductor current return-ing to zero in each cycle, as illustrated in Fig. 4-8c. The continuous-current caseis easier to analyze and is considered Þrst.Continuous Current forLCFiltered OutputFor continuous current, thevoltage vxin Fig. 4-8ais a full-wave rectiÞed sine wave, which has an averageD1D2D1D4D3D2C1C2C1(a)(b)C2++–+––~~+–Vmvovs =Vm sin wt2Vm~~~~voVm or 2VmVo = 2VmVo = Vm~~Vm+-vs(t) =Vm sin (wt)+-Figure 4-7(a) Voltage doubler. (b) Dual-voltage rectiÞer.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 126
value of 2Vm/. Since the average voltage across the inductor in the steady stateis zero, the average output voltage for continuous inductor current is(4-14)Average inductor current must equal the average resistor current because the average capacitor current is zero.(4-15)ILIRVoR2VmR Vo2Vm 4.2Single-Phase Full-Wave RectiÞers127Figure 4-8(a) RectiÞer with LCÞltered output; (b) Continuous inductor current; (c) Discontinuous inductorcurrent; (d) Normalized output.iLiLvxiCttvoLR++ÐÐCiR(a)(b)vs(t) =vm sin(ωt)iLVo/Vm(c)1.00.80.60.40.20.00.20.40.60.8(d)3ωL/R1.01.21.4Normalized Output with LC Filter+−har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 127
128CHAPTER 4Full-Wave RectiÞersThe variation in inductor current can be estimated from the Þrst ac term in theFourier series. The Þrst ac voltage term is obtained from Eq. (4-4) with n2.Assuming the capacitor to be a short circuit to ac terms, the harmonic voltage v2exists across the inductor. The amplitude of the inductor current for n2 is(4-16)For the current to always be positive, the amplitude of the ac term must be lessthan the dc term (average value). Using the above equations and solving for L,or(4-17)If 3L/R1, the current is continuous and the output voltage is 2Vm/. Other-wise, the output voltage must be determined from analysis for discontinuous cur-rent, discussed as follows.Discontinuous Current forLCFiltered OutputFor discontinuous inductorcurrent, the current reaches zero during each period of the current waveform(Fig. 4-8c). Current becomes positive again when the bridge output voltagereaches the level of the capacitor voltage, which is at t.(4-18)While current is positive, the voltage across the inductor is(4-19)where the output voltage Vois yet to be determined. Inductor current is expressed as(4-20)which is valid until the current reaches zero, at t .The solution for the load voltage Vois based on the fact that the average in-ductor current must equal the current in the load resistor. Unfortunately, a closed-form solution is not available, and an iterative technique is required.for t when 1L CVm Acos cos tBDVo(t)iL(t)1L3tCVm sin (t)VoD d(t)vLVm sin (t)Vo sin 1aVoVmb 3LR 1 for continuous currentLR32Vm3L2VmRI2ILI2V2Z2LV22L4Vm>32L2Vm3Lhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 128
4.2Single-Phase Full-Wave RectiÞers129Aprocedure for determining Vois as follows:1.Estimate a value for Voslightly below Vmand solve for in Eq. (4-18).2.Solve for numerically in Eq. (4-20) for inductor current,3.Solve for average inductor current IL.(4-21)4.Solve for load voltage Vobased upon the average inductor current fromstep 3.or(4-22)5.Repeat steps 1 to 4 until the computed value of Voin step 4 equals theestimated Voin step 1.Output voltage for discontinuous current is larger than for continuous cur-rent. If there is no load, the capacitor charges to the peak value of the source sothe maximum output is Vm. Figure 4-8dshows normalized output Vo/Vmas afunction of 3L/R.VoILRIRILVoR 131L CVm( cos cos t)Vo(t)D d(t)iL13iL(t) d(t)iL()0Vm( cos cos )Vo()EXAMPLE 4-5Full-Wave RectiÞer with LCFilterAfull-wave rectiÞer has a source of vs(t) 100 sin(377t) V. An LCÞlter as in Fig. 4-8ais used, with L5 mH and C10,000 F. The load resistance is (a) 5 and (b) 50 .Determine the output voltage for each case.■SolutionUsing Eq. (4-17), continuous inductor current exists whenwhich indicates continuous current for 5 and discontinuous current for 50 .(a)For R5 with continuous current, output voltage is determined from Eq. (4-14).Vo2Vm2(100)63.7 VR 3L3(377)(0.005)5.7 Æhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 129
130CHAPTER 4Full-Wave RectiÞers(b)For R50 with discontinuous current, the iteration method is used to determineVo. Initially, Vois estimated to be 90 V. The results of the iteration are as follows:Estimated VoCalculatedVo901.122.4838.8(Estimate is too high)800.932.89159(Estimate is too low)851.122.7088.2(Estimate is slightly low)861.042.6676.6(Estimate is too high)85.31.022.6984.6(Approximate solution)Therefore, Vois approximately 85.3 V. As a practical matter, three signiÞcant Þgures forthe load voltage may not be justiÞed when predicting performance of a real circuit.Knowing that the output voltage is slightly above 85 Vafter the third iteration is proba-bly sufÞcient. Output could also be estimated from the graph of Fig. 4-8d.PSpice SolutionThe circuit is created using VSIN for the source and Dbreak for the diodes, with thediode model modiÞed to represent an ideal diode by using n0.01. The voltage of theÞlter capacitor is initialized at 90 V, and small capacitors are placed across the diodes toavoid convergence problems. Both values of Rare tested in one simulation by using aparametric sweep. The transient analysis must be sufÞciently long to allow a steady-state periodic output to be observed. The Probe output for both load resistors is shownin Fig. 4-9. Average output voltage for each case is obtained from Probe by enteringAVG(V(out)V(out)) after restricting the data to represent steady-state output (afterabout 250 ms), resulting in Vo63.6 Vfor R5 (continuous current) and Vo84.1 Vfor R50 (discontinuous current). These values match very well with those of theanalytical solution.D1DbreakD3FULL-WAVE RECTIFIER WITH AN LÐC FILTERD21p1p1p12out+outÐC110000uR1(R)PARAMETERS:R = 5L15 m1pD4VOFF = 0VAMPL = 100FREQ = 60Vs0+Ð(a)Figure 4-9PSpice output for Example 4-6. (a) Full-wave rectiÞer with an LCÞlter. The smallcapacitors across the diodes help with convergence; (b) The output voltage for continuous anddiscontinuous inductor current.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 130
4.3Controlled Full-Wave RectiÞers1314.3 CONTROLLED FULL-WAVE RECTIFIERSAversatile method of controlling the output of a full-wave rectiÞer is to substi-tute controlled switches such as thyristors (SCRs) for the diodes. Output is con-trolled by adjusting the delay angle of each SCR, resulting in an output voltagethat is adjustable over a limited range.Controlled full-wave rectiÞers are shown in Fig. 4-10. For the bridge recti-Þer, SCRs S1and S2will become forward-biased when the source becomes posi-tive but will not conduct until gate signals are applied. Similarly, S3and S4willbecome forward-biased when the source becomes negative but will not conductuntil they receive gate signals. For the center-tapped transformer rectiÞer, S1isforward-biased when vsis positive, and S2is forward-biased when vsis negative,but each will not conduct until it receives a gate signal.The delay angle is the angle interval between the forward biasing of theSCR and the gate signal application. If the delay angle is zero, the rectiÞers behave exactly as uncontrolled rectiÞers with diodes. The discussion that followsgenerally applies to both bridge and center-tapped rectiÞers.Resistive LoadThe output voltage waveform for a controlled full-wave rectiÞer with a resistiveload is shown in Fig. 4-10c. The average component of this waveform is deter-mined from(4-23)Vo13Vm sin (t) d(t)Vm (1 cos )90 V80 V70 V60 V0 s50 msv(OUT+, OUT–)100 msTime150 msR = 50, DISCONTINUOUS CURRENTR = 5, CONTINUOUS CURRENT200 ms250 ms300 ms(b)Figure 4-9(continued)har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 131
132CHAPTER 4Full-Wave RectiÞersAverage output current is then(4-24)The power delivered to the load is a function of the input voltage, the delayangle, and the load components; PI2rmsRis used to determine the power in aresistive load, where(4-25)The rms current in the source is the same as the rms current in the load.VmRA122 sin (2)4IrmsC13aVmR sin tb2d (t)IoVoRVmR (1 cos )Figure 4-10(a) Controlled full-wave bridge rectiÞer; (b) Controlled full-wave center-tapped transformer rectiÞer; (c) Output for a resistive load.S1S4(a)0αππ + α2πωt(b)(c)+−S3vovovovs =Vm sin ωtS2S1S2++ÐÐ+−har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 132
4.3Controlled Full-Wave RectiÞers133Controlled Full-Wave RectiÞer with Resistive LoadThe full-wave controlled bridge rectiÞer of Fig. 4-10ahas an ac input of 120 Vrms at 60 Hz and a 20-load resistor. The delay angle is 40. Determine the average current inthe load, the power absorbed by the load, and the source voltamperes.■SolutionThe average output voltage is determined from Eq. (4-23).Average load current isPower absorbed by the load is determined from the rms current from Eq. (4-24), remem-bering to use in radians.The rms current in the source is also 5.80 A, and the apparent power of the source isPower factor isRLLoad, Discontinuous CurrentLoad current for a controlled full-wave rectiÞer with an RLload (Fig. 4-11a) canbe either continuous or discontinuous, and a separate analysis is required foreach. Starting the analysis at t0 with zero load current, SCRs S1and S2in thebridge rectiÞer will be forward-biased and S3and S4will be reverse-biased as thesource voltage becomes positive. Gate signals are applied to S1and S2at t,turning S1and S2on. With S1and S2on, the load voltage is equal to the sourcevoltage. For this condition, the circuit is identical to that of the controlled half-wave rectiÞer of Chap. 3, having a current functionwhere(4-26)Z2R2(L)2 tan1aLRb and LRio(t)VmZ Csin (t)sin () e(t)>D for t pfPS6726960.967SVrms Irms(120)(5.80)696 VAPI2rms R(5.80)2 (20)673 WIrms22(120)20A12 0.6982 sin[2(0.698)]45.80 AIoVoR95.4204.77 AVoVm A1 cos B22 (120) A1 cos 40¡B 95.4 VEXAMPLE 4-6har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 133
134CHAPTER 4Full-Wave RectiÞersThe above current function becomes zero at t. If , the currentremains at zero until twhen gate signals are applied to S3and S4which are then forward-biased and begin to conduct. This mode of operation iscalled discontinuous current, which is illustrated in Fig. 4-11b.(4-27) : discontinuous current(a)voioRLvs (ωt) =Vm sin(ωt)+Ð+−000(b)(c)αππ + αωtωtωtωtβVmiovoiovoαππ + α2ππ2ππFigure 4-11(a) Controlled rectiÞer with RLload; (b) Discontinuous current; (c) Continuous current.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 134
4.3Controlled Full-Wave RectiÞers135Analysis of the controlled full-wave rectiÞer operating in the discontinuous-current mode is identical to that of the controlled half-wave rectiÞer except thatthe period for the output current is rather than 2rad.EXAMPLE 4-7Controlled Full-Wave RectiÞer, Discontinuous CurrentAcontrolled full-wave bridge rectiÞer of Fig. 4-11ahas a source of 120 Vrms at 60 Hz,R10 , L20 mH, and 60. Determine (a) an expression for load current, (b) theaverage load current, and (c) the power absorbed by the load.■SolutionFrom the parameters given,(a)Substituting into Eq. (4-26),Solving io() 0 numerically for , 3.78 rad (216). Since 4.19 ,the current is discontinuous, and the above expression for current is valid.(b)Average load current is determined from the numerical integration of(c)Power absorbed by the load occurs in the resistor and is computed from I2rmsR,whereRLLoad, Continuous CurrentIf the load current is still positive at twhen gate signals are applied toS3and S4in the above analysis, S3and S4are turned on and S1and S2are forcedP(8.35)2(10)697 WIrmsC13io(t) d(t) 8.35 AIo13io(t)d(t)7.05 Aio(t)13.6 sin (t0.646)21.2et>0.754 A for t 60¡1.047 radLR(377)(0.02)100.754 rad tan 1aLRb tan 1c(377)(0.02)10d0.646 radZ2R2(L)22102[(377)(0.02)]212.5 ÆVm12012169.7 Vhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 135
136CHAPTER 4Full-Wave RectiÞersoff. Since the initial condition for current in the second half-cycle is not zero, thecurrent function does not repeat. Equation (4-26) is not valid in the steady statefor continuous current. For an RLload with continuous current, the steady-statecurrent and voltage waveforms are generally as shown in Fig. 4-11c.The boundary between continuous and discontinuous current occurs when for Eq. (4-26) is . The current at tmust be greater than zero forcontinuous-current operation.UsingSolving for ,Using(4-28)Either Eq. (4-27) or Eq. (4-28) can be used to check whether the load current iscontinuous or discontinuous.Amethod for determining the output voltage and current for the continuous-current case is to use the Fourier series. The Fourier series for the voltage wave-form for continuous-current case shown in Fig. 4-11cis expressed in generalform as(4-29)The dc (average) value is(4-30)The amplitudes of the ac terms are calculated from()()(4-31)Vn2a2nb2nVo13Vm sin (t) d(t)2Vm cos vo(t)Voaqn1Vn cos (n0tn) tan 1aLRb for continuous current tan 1aLRb sin() A1e(>)B 0sin()sin()sin()sin() e()> 0i() 0har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 136
4.3Controlled Full-Wave RectiÞers137where(4-32)Figure 4-12 shows the relationship between normalized harmonic content of theoutput voltage and delay angle.The Fourier series for current is determined by superposition as was done forthe uncontrolled rectiÞer earlier in this chapter. The current amplitude at eachfrequency is determined from Eq. (4-5). The rms current is determined by com-bining the rms currents at each frequency. From Eq. (2-43),where(4-33)Io VoR and InVnZnVnƒRjn0LƒIrmsCI2oaqn2,4,6 ÁaIn12b2n2, 4, 6, . . .bn2Vmcsin(n1)n1 sin(n1)n1dan2Vm ccos(n1)n1 cos(n1)n1dFigure 4-12Output harmonic voltages as a functionof delay angle for a single-phase controlled rectiÞer.1.00.80.60.40.204080Delay Anglen = 8n = 6n = 4Vn/Vmn = 290120160har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 137
138CHAPTER 4Full-Wave RectiÞersAs the harmonic number increases, the impedance for the inductance increases.Therefore, it may be necessary to solve for only a few terms of the series to beable to calculate the rms current. If the inductor is large, the ac terms will becomesmall, and the current is essentially dc.EXAMPLE 4-8Controlled Full-Wave RectiÞer with RLLoad, Continuous CurrentAcontrolled full-wave bridge rectiÞer of Fig. 4-11ahas a source of 120 Vrms at 60 Hz,an RLload where R10 and L100 mH. The delay angle 60(same as Exam-ple 4-7 except Lis larger). (a) Verify that the load current is continuous. (b) Determine thedc (average) component of the current. (c) Determine the power absorbed by the load.■Solution(a)Equation (4-28) is used to verify that the current is continuous.(b)The voltage across the load is expressed in terms of the Fourier series of Eq. (4-29).The dc term is computed from Eq. (4-30).(c)The amplitudes of the ac terms are computed from Eqs. (4-31) and (4-32) and aresummarized in the following table where, Zn|RjL| and InVn/Zn.nanbnVnZnIn0 (dc)ÑÑ54.0105.4029093.5129.876.01.71446.818.750.4151.10.3363.1932.032.2226.40.14The rms current is computed from Eq. (4-33).Power is computed from I2rmsR.Note that the rms current could be approximated accurately from the dc term andone ac term (n2). Higher-frequency terms are very small and contribute little tothe power in the load.P(5.54)2(10)307 WIrmsC(5.40)2a1.7112b2a0.3312b2a0.1412b2. . . L 5.54 AV02Vm cos 222(120) cos(60¡)54.0 V 60¡ 75¡ ‹continuous current tan 1aLRb tan 1c(377)(0.1)10d75¡har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 138
4.3Controlled Full-Wave RectiÞers139PSpice Simulation of Controlled Full-Wave RectiÞersTo simulate the controlled full-wave rectiÞer in PSpice, a suitable SCR modelmust be chosen. As with the controlled half-wave rectiÞer of Chap. 3, a simpleswitch and diode can be used to represent the SCR, as shown in Fig. 4-13a. Thiscircuit requires the full version of PSpice.EXAMPLE 4-9PSpice Simulation of a Controlled Full-Wave RectiÞerUse PSpice to determine the solution of the controlled full-wave rectifier in Example 4-8.■SolutionAPSpice circuit that uses the controlled-switch model for the SCRs is shown in Fig. 4-13a. (This circuit is too large for the demo version and requires the full productionversion of PSpice.)+00VsS1SbreakDbreakS4Control12Control34–++––+–00+0S3S212R1L110100mControl34Control12–++––+–0Control12Vcontrol12+–Out–Out+CONTROLLED FULL-WAVE RECTIFIERPARAMETERS:ALPHA = 60PW = {.51/60}DLAY = {ALPHA/360/60}VOFF = 0VAMPL = 170FREQ = 60V1 = 0V2 = 5TD = {DLAY}TR = 1nTF = 1nPW = {PW}PER = {1/60}V1 = 0V2 = 5TD = {DLAY + 0.5/60}TR = 1nTF = 1nPW = {PW}PER = {1/60}0Control34Vcontrol34+–(a)Figure 4-13(a) PSpice circuit for a controlled full-wave rectiÞer of Example 4-8;(b) Probe output showing load voltage and current.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 139
140CHAPTER 4Full-Wave RectiÞersControlled RectiÞerwith RL-Source LoadThe controlled rectiÞer with a load that is a series resistance, inductance, and dcvoltage (Fig. 4-14) is analyzed much like the uncontrolled rectiÞer of Fig. 4-5adiscussed earlier in this chapter. For the controlled rectiÞer, the SCRs may beturned on at any time that they are forward-biased, which is at an angle(4-34)For the continuous-current case, the bridge output voltage is the same as inFig. 4-11c. The average bridge output voltage is(4-35)Vo2Vm cos sin 1aVdcVmb200 V–200 Vv(2, 4)VOLTAGECURRENT0 V10 A0 A60 msI (R)Time70 ms80 ms90 ms100 msSEL>>5 A(b)Figure 4-13(continued)Figure 4-14Controlled rectiÞer with RL-source load.iovs (ωt) =Vm sin(ωt)voVdcLR++ÐÐ+−har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 140
4.3Controlled Full-Wave RectiÞers141The average load current is(4-36)The ac voltage terms are unchanged from the controlled rectiÞer with an RLloadin Fig. 4-11aand are described by Eqs. (4-29) to (4-32). The ac current terms aredetermined from the circuit of Fig. 4-14c. Power absorbed by the dc voltage is(4-37)Power absorbed by the resistor in the load is I2rmsR. If the inductance is large and theload current has little ripple, power absorbed by the resistor is approximately Io2R.PdcIoVdcIoVoVdcREXAMPLE 4-10Controlled RectiÞer with RL-Source LoadThe controlled rectiÞer of Fig. 4-14has an ac source of 240 Vrms at 60 Hz, Vdc100 V,R5 , and an inductor large enough to cause continuous current. (a) Determine thedelay angle such that the power absorbed by the dc source is 1000 W. (b) Determine thevalue of inductance that will limit the peak-to-peak load current variation to 2 A.■Solution(a)For the power in the 100-Vdc source to be 1000 W, the current in it must be 10 A.The required output voltage is determined from Eq. (4-36) asThe delay angle which will produce a 150 Vdc output from the rectiÞer isdetermined from Eq. (4-35).(b)Variation in load current is due to the ac terms in the Fourier series. The loadcurrent amplitude for each of the ac terms iswhere Vnis described by Eqs. (4-31) and (4-32) or can be estimated from the graphof Fig. 4-12. The impedance for the ac terms isSince the decreasing amplitude of the voltage terms and the increasing magnitudeof the impedance both contribute to diminishing ac currents as nincreases, thepeak-to-peak current variation will be estimated from the Þrst ac term. For n2,Vn/Vmis estimated from Fig. 4-12as 0.68 for 46, making V20.68Vm0.68 (240) 230 V. The peak-to-peak variation of 2 Acorresponds to a 1-Azero-to-peak amplitude. The required load impedance for n2 is thenZ2V2I2230 V1 A230 Æ22ZnƒRjn0LƒInVnZn cos 1aVo2Vmb cos 1c(150)()212(240)d46¡VoVdcIoR100(10)(5)150 Vhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 141
142CHAPTER 4Full-Wave RectiÞersThe 5-resistor is insigniÞcant compared to the total 230-required impedance,so ZnLnL. Solving for L,Aslightly larger inductance should be chosen to allow for the effect of higher-orderac terms.Controlled Single-Phase ConverterOperating as an InverterThe above discussion focused on circuits operating as rectiÞers, which meansthat the power ßow is from the ac source to the load. It is also possible for powerto ßow from the load to the ac source, which classiÞes the circuit as an inverter.For inverter operation of the converter in Fig. 4-14, power is supplied by thedc source, and power is absorbed by the bridge and is transferred to the ac sys-tem. The load current must be in the direction shown because of the SCRs in thebridge. For power to be supplied by the dc source, Vdcmust be negative. Forpower to be absorbed by the bridge and transferred to the ac system, the bridgeoutput voltage Vomust also be negative. Equation (4-35) applies, so a delayangle larger than 90will result in a negative output voltage.(4-38)The voltage waveform for 150and continuous inductor current is shown inFig. 4-15. Equations (4-36) to (4-38) apply. If the inductor is large enough to90¡180¡:Vo 0 inverter operation 090¡:Vo 0 rectifier operationLLZ222302(377)0.31 HFigure 4-15Output voltage for the controlled single-phaseconverter of Fig. 4-14operating as an inverter, 150and Vdc0.ωtvoVm sin ωtÐVm sin ωtαπhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 142
4.3Controlled Full-Wave RectiÞers143effectively eliminate the ac current terms and the bridge is lossless, the power absorbed by the bridge and transferred to the ac system is(4-39)PbridgePacIoVo EXAMPLE 4-11Single-Phase Bridge Operating as an InverterThe dc voltage in Fig. 4-14represents the voltage generated by an array of solar cells andhas a value of 110 V, connected such that Vdc110 V. The solar cells are capable of pro-ducing 1000 W. The ac source is 120 Vrms, R0.5 , and Lis large enough to causethe load current to be essentially dc. Determine the delay angle such that 1000 Wis sup-plied by the solar cell array. Determine the power transferred to the ac system and thelosses in the resistance. Assume ideal SCRs.■SolutionFor the solar cell array to supply 1000 W, the average current must beThe average output voltage of the bridge is determined from Eq. (4-36).The required delay angle is determined from Eq. (4-35).Power absorbed by the bridge and transferred to the ac system is determined from Eq. (4-39).Power absorbed by the resistor isNote that the load current and power will be sensitive to the delay angle and the voltagedrops across the SCRs because bridge output voltage is close to the dc source voltage. Forexample, assume that the voltage across a conducting SCR is 1 V. Two SCRs conduct atall times, so the average bridge output voltage is reduced toAverage load current is thenIo107.5(110)0.55.0 AVo105.52107.5 VPRI2rms RLI2o R(9.09)2(0.5)41 WPacVoIo(9.09)(105.5) 959 W cos 1aVo2Vmb cos 1c105.5212(120)d165.5¡VoIoRVdc(9.09)(0.5)(110) 105.5 VIoPdcVdc10001109.09 Ahar80679_ch04_111-170.qxd 12/17/09 2:36 PM Page 143
144CHAPTER 4Full-Wave RectiÞersPower delivered to the bridge is then reduced toAverage current in each SCR is one-half the average load current. Power absorbed byeach SCR is approximatelyTotal power loss in the bridge is then 4(2.5) 10 W, and power delivered to the ac sourceis 537.5 10 527.5 W.4.4THREE-PHASE RECTIFIERSThree-phase rectiÞers are commonly used in industry to produce a dc voltage andcurrent for large loads. The three-phase full-bridge rectiÞer is shown in Fig. 4-16a.The three-phase voltage source is balanced and has phase sequence a-b-c.Thesource and the diodes are assumed to be ideal in the initial analysis of the circuit.PSCRISCRVSCR12IoVSCR12 (5)(1)2.5 WPbridge(107.5)(5.0)537.5 W Figure 4-16(a) Three-phase full-bridge rectiÞer; (b) Source and output voltages; (c) Currents for a resistive load.(a)iavoVbnVcnnVanabc+−+−+−LoadD5D2D3D6D1Ð++ÐvD1D4anabvD1iD1iD2iD3iD4iD5iD6iaiDvoacbcωt = 0ωtπ3bacacbabacbcbaSourceBridge(b)(c)6.11.22.33.44.55.66.1bncnanbncnÐ2π3Ñhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 144
4.4Three-Phase RectiÞers145Some basic observations about the circuit are as follows:1.KirchhoffÕs voltage law around any path shows that only one diode in thetop half of the bridge may conduct at one time (D1, D3, or D5). The diodethat is conducting will have its anode connected to the phase voltage that ishighest at that instant.2.KirchhoffÕs voltage law also shows that only one diode in the bottom half ofthe bridge may conduct at one time (D2, D4, or D6). The diode that isconducting will have its cathode connected to the phase voltage that islowest at that instant.3.As a consequence of items 1 and 2 above, D1and D4cannot conduct at thesame time. Similarly, D3and D6cannot conduct simultaneously, nor can D5and D2.4.The output voltage across the load is one of the line-to-line voltages of thesource. For example, when D1and D2are on, the output voltage is vac.Furthermore, the diodes that are on are determined by which line-to-linevoltage is the highest at that instant. For example, when vacis the highestline-to-line voltage, the output is vac.5.There are six combinations of line-to-line voltages (three phases taken twoat a time). Considering one period of the source to be 360, a transition ofthe highest line-to-line voltage must take place every 360/6 60. Becauseof the six transitions that occur for each period of the source voltage, thecircuit is called a six-pulse rectiÞer.6.The fundamental frequency of the output voltage is 6, where is thefrequency of the three-phase source.Figure 4-16bshows the phase voltages and the resulting combinations ofline-to-line voltages from a balanced three-phase source. The current in each ofthe bridge diodes for a resistive load is shown in Fig. 4-16c. The diodes conductin pairs (6,1), (1,2), (2,3), (3,4), (4,5), (5,6), (6,1), . . . . Diodes turn on in the sequence 1, 2, 3, 4, 5, 6, 1, . . . .The current in a conducting diode is the same as the load current. To deter-mine the current in each phase of the source, KirchhoffÕs current law is appliedat nodes a,b,and c,(4-40)Since each diode conducts one-third of the time, resulting in(4-41)Is, rmsA23 Io, rmsID, rms113Io, rmsID, avg13Io, avgiaiD1iD4ibiD3iD6iciD5iD2har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 145
146CHAPTER 4Full-Wave RectiÞersThe apparent power from the three-phase source is(4-42)The maximum reverse voltage across a diode is the peak line-to-line voltage.The voltage waveform across diode D1is shown in Fig. 4-16b. When D1con-ducts, the voltage across it is zero. When D1is off, the output voltage is vabwhenD3is on and is vacwhen D5is on.The periodic output voltage is deÞned as vo(t) Vm,LLsin(t) for /3 t2/3 with period /3 for the purpose of determining the Fourier series coefÞcients. The coefÞcients for the sine terms are zero from symmetry, enablingthe Fourier series for the output voltage to be expressed as(4-43)The average or dc value of the output voltage is(4-44)where Vm,LLis the peak line-to-line voltage of the three-phase source, which isVLL,rms. The amplitudes of the ac voltage terms are(4-45)Since the output voltage is periodic with period one-sixth of the ac supply volt-age, the harmonics in the output are of order 6k, k1, 2, 3 . . . An advantageof the three-phase rectiÞer over the single-phase rectiÞer is that the output is inherently like a dc voltage, and the high-frequency low-amplitude harmonicsenable Þlters to be effective.In many applications, a load with series inductance results in a load currentthat is essentially dc. For a dc load current, the diode and ac line currents areshown in Fig. 4-17. The Fourier series of the currents in phase aof the ac line is(4-46)which consists of terms at the fundamental frequency of the ac system and har-monics of order 6k1, k1, 2, 3, . . . .Because these harmonic currents may present problems in the ac system, Þl-ters are frequently necessary to prevent these harmonics from entering the ac sys-tem. Atypical Þltering scheme is shown in Fig. 4-18. Resonant Þlters are used toprovide a path to ground for the Þfth and seventh harmonics, which are the twolowest and are the strongest in amplitude. Higher-order harmonics are reducedwith the high-pass Þlter. These Þlters prevent the harmonic currents from propa-gating through the ac power system. Filter components are chosen such that theimpedance to the power system frequency is large.ia(t)223 Io acos 0t15 cos 50t17 cos 70t111 cos 110t113 cos 130tÁb Vn6Vm, LL(n21) n6, 12, 18,Á 22V01>332>3>3Vm, LL sin (t) d(t)3Vm, LL0.955 Vm, LLvo(t)Vo aqn6,12,18 ÁVn cos (n0t) S13 VLL, rms IS, rmshar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 146
4.4Three-Phase RectiÞers147Three-Phase RectiÞerThe three-phase rectiÞer of Fig. 4-16ahas a three-phase source of 480 Vrms line-to-line,and the load is a 25-resistance in series with a 50-mH inductance. Determine (a) the dclevel of the output voltage, (b) the dc and Þrst ac term of the load current, (c) the averageand rms current in the diodes, (d) the rms current in the source, and (e) the apparent powerfrom the source.■Solution(a)The dc output voltage of the bridge is obtained from Eq. (4-44).Vo3Vm, LL 322 (480)648 VFigure 4-17Three-phase rectiÞer currents when the output isÞltered.ioiaibiciD1iD2iD3iD4iD5iD6ACSystem(Each Phase)5th7thHighConductorPassφ6-PulseConverterFigure 4-18Filters for ac line harmonics.EXAMPLE 4-12har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 147
148CHAPTER 4Full-Wave RectiÞers(b)The average load current isThe Þrst ac voltage term is obtained from Eq. (4-45) with n6, and current isThis and other ac terms are much smaller than the dc term and can be neglected.(c)Average and rms diode currents are obtained from Eq. (4-41). The rms load currentis approximately the same as average current since the ac terms are small.(d)The rms source current is also obtained from Eq. (4-41).(e)The apparent power from the source is determined from Eq. (4-42).PSpice SolutionAcircuit for this example is shown in Fig. 4-19a. VSIN is used for each of the sources.Dbreak, with the model changed to make n0.01, approximates an ideal diode. Atransient analysis starting at 16.67 ms and ending at 50 ms represents steady-statecurrents.S23(VLL, rms)(Is, rms)23 (480)(21.2)17.6 kVAIs, rmsaA23bIo, rms L aA23b25.9 21.2 AID, rmsIo, rms13L25.91315.0 AID, avgIo325.938.63 AI6, rms0.32120.23 AI6V6Z60.0546Vm1R2(6L)20.054612(480)1252[6(377)(0.05)]237.0 V115.8 Æ 0.32 AIoVoR6482525.9 AFigure 4-19(a) PSpice circuit for a three-phase rectiÞer; (b) Probe output showingthe current waveform and the Fourier analysis in one phase of the source.D1DbreakD3THREE-PHASE RECTIFIERDbreakD5DbreakD4Dbreak(a)PHASE = –240PHASE = –1200VOFF = 0VAMPL = [Vrms*sqrt(2/3)]FREQ = 60PHASE = 0APARAMETERS:Vrms = 480VAVBVCR1L150m2512CBD6DbreakD2Dbreakout–out++–+–+–har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 148
4.5Controlled Three-Phase RectiÞers149All the circuit currents as calculated above can be veriÞed. The Probe outputin Fig. 4-19bshows the current and Fourier (FFT) components in one of thesources. Note that the harmonics correspond to those in Eq. (4-46).4.5CONTROLLED THREE-PHASE RECTIFIERSThe output of the three-phase rectiÞer can be controlled by substituting SCRs fordiodes. Figure 4-20ashows a controlled six-pulse three-phase rectiÞer. WithSCRs, conduction does not begin until a gate signal is applied while the SCR isforward-biased. Thus, the transition of the output voltage to the maximum in-stantaneous line-to-line source voltage can be delayed. The delay angle is ref-erenced from where the SCR would begin to conduct if it were a diode. The delayangle is the interval between when the SCR becomes forward-biased and whenthe gate signal is applied. Figure 4-20bshows the output of the controlled recti-Þer for a delay angle of 45.The average output voltage is(4-47)Equation (4-47) shows that the average output voltage is reduced as the delayangle increases.Vo1>332>3>3 Vm, LL sin (t) d(t)3Vm, LL cos 40 A0 A–40 A10 ms20 msSOURCE PHASE CURRENTTimeI (VA)30 A20 A10 A0 A0 Hz200 HzI (VA)400 HzFrequency(b)600 Hzn = 13n = 11(420.042, 4.0529)n = 7(300.030, 5.7521)n = 5(60.006, 28.606)n = 1800 HzSEL>>30 ms40 ms50 msFigure 4-19(continued)har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 149
150CHAPTER 4Full-Wave RectiÞersHarmonics for the output voltage remain of order 6k, but the amplitudes are functions of . Figure 4-21shows the first three normalized harmonic amplitudes.Figure 4-20(a) Acontrolled three-phase rectiÞer; (b) Outputvoltage for 45.vovoAφBφCφS1S4S3S6S5+ÐS2Load(a)(b)ωtαEXAMPLE 4-13AControlled Three-Phase RectiÞerAthree-phase controlled rectiÞer has an input voltage which is 480 Vrms at 60 Hz. Theload is modeled as a series resistance and inductance with R10 and L50 mH.(a) Determine the delay angle required to produce an average current of 50 Ain theload. (b) Determine the amplitude of harmonics n6 and n12.■Solution(a)The required dc component in the bridge output voltage isVoIo R(50)(10)500 Vhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 150
4.5Controlled Three-Phase RectiÞers151Equation (4-47) is used to determine the required delay angle:(b)Amplitudes of harmonic voltages are estimated from the graph in Fig. 4-21. For 39.5, normalized harmonic voltages are V6/VmL0.21 and V12/VmL0.10.Using Vm(480), V6143 V, and V1268 V, harmonic currents are thenTwelve-Pulse RectiÞersThe three-phase six-pulse bridge rectiÞer shows a marked improvement in thequality of the dc output over that of the single-phase rectiÞer. Harmonics of the output voltage are small and at frequencies that are multiples of 6 times thesource frequency. Further reduction in output harmonics can be accomplished byI12V12Z12681102[12(377)(0.05)]2 0.30 AI6V6Z61431102[6(377)(0.05)]2 1.26 A12 cos 1aVo3Vm, LLb cos 1a500312(480)b39.5¡Figure 4-21Normalized output voltage harmonics as afunction of delay angle for a three-phase rectiÞer.04080120Delay Angle (degrees)1602000.00.10.2Vn/Vm0.30.4n = 12n = 6n = 18har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 151
152CHAPTER 4Full-Wave RectiÞersusing two six-pulse bridges as shown in Fig. 4-22a. This conÞguration is calleda 12-pulse converter.One of the bridges is supplied through a Y-Yconnected transformer, andthe other is supplied through a Y-(or -Y) transformer as shown. Thepurpose of the Y-transformer connection is to introduce a 30phase shiftbetween the source and the bridge. This results in inputs to the two bridgesYAφBφCφ++(a)(b)0+LoadÐÐÐYvoYvoYvoYΔvoΔvoΔvoFigure 4-22(a) A12-pulse three-phase rectiÞer; (b) Outputvoltage for 0.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 152
4.5Controlled Three-Phase RectiÞers153which are 30apart. The two bridge outputs are similar, but also shifted by30. The overall output voltage is the sum of the two bridge outputs. The delayangles for the bridges are typically the same. The dc output is the sum of thedc output of each bridge(4-48)The peak output of the 12-pulse converter occurs midway between alternatepeaks of the 6-pulse converters. Adding the voltages at that point for 0 gives(4-49)Figure 4-22bshows the voltages for 0.Since a transition between conducting thyristors occurs every 30, there area total of 12 such transitions for each period of the ac source. The output has har-monic frequencies that are multiples of 12 times the source frequency (12k, k 1,2, 3, . . .). Filtering to produce a relatively pure dc output is less costly than thatrequired for the 6-pulse rectiÞer.Another advantage of using a 12-pulse converter rather than a 6-pulse con-verter is the reduced harmonics that occur in the ac system. The current in the aclines supplying the Y-Ytransformer is represented by the Fourier series(4-50)The current in the ac lines supplying the Y-transformer is represented by theFourier series(4-51)The Fourier series for the two currents are similar, but some terms have oppositealgebraic signs. The ac system current, which is the sum of those transformercurrents, has the Fourier series(4-52)Thus, some of the harmonics on the ac side are canceled by using the 12-pulsescheme rather than the 6-pulse scheme. The harmonics that remain in the ac423Ioacos0t111cos110t113cos130t …biac (t)iY (t)i(t)111cos110t113cos130t…bi(t)223Ioacos0t15 cos 50 t17cos70t111cos110t113 cos130t …biY (t)223Ioacos 0t15 cos 50t17 cos 70tVo, peak2Vm, LL cos (15¡)1.932 Vm, LLVoVo, YVo, 3Vm, LL cos 3Vm, LL cos 6Vm, LL cos har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 153
154CHAPTER 4Full-Wave RectiÞerssystem are of order 12k1. Cancellation of harmonics 6(2n1) 1 has resulted from this transformer and converter conÞguration.This principle can be expanded to arrangements of higher pulse numbers byincorporating increased numbers of 6-pulse converters with transformers thathave the appropriate phase shifts. The characteristic ac harmonics of a p-pulseconverter will be pk1, k 1, 2, 3, . . . . Power system converters have a practi-cal limitation of 12 pulses because of the large expense of producing high-voltagetransformers with the appropriate phase shifts. However, lower-voltage indus-trial systems commonly have converters with up to 48 pulses.The Three-Phase ConverterOperating as an InverterThe above discussion focused on circuits operating as rectiÞers, meaning that thepower ßow is from the ac side of the converter to the dc side. It is also possiblefor the three-phase bridge to operate as an inverter, having power ßow from thedc side to the ac side. Acircuit that enables the converter to operate as an inverteris shown in Fig. 4-23a. Power is supplied by the dc source, and power isFigure 4-23(a) Six-pulse three-phase converter operating asan inverter; (b) Bridge output voltage for 150.+ÐiovovovdcRAφBφα+ÐCφ(a)(b)Lhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 154
4.5Controlled Three-Phase RectiÞers155absorbed by the converter and transferred to the ac system. The analysis of thethree-phase inverter is similar to that of the single-phase case.The dc current must be in the direction shown because of the SCRs in thebridge. For power to be absorbed by the bridge and transferred to the ac system,the bridge output voltage must be negative. Equation (4-47) applies, so a delayangle larger than 90results in a negative bridge output voltage.(4-53)The output voltage waveform for 150and continuous load current is shownin Fig. 4-23b.090¡Vo 0 : rectifier operation90¡180¡Vo 0 : inverter operationEXAMPLE 4-14 Three-Phase Bridge Operating as an InverterThe six-pulse converter of Fig. 4-23ahas a delay angle 120. The three-phase ac sys-tem is 4160 Vrms line-to-line. The dc source is 3000 V, R2 , and Lis large enoughto consider the current to be purely dc. (a) Determine the power transferred to the acsource from the dc source. (b) Determine the value of Lsuch that the peak-to-peak vari-ation in load current is 10 percent of the average load current.■Solution(a)The dc output voltage of the bridge is computed from Eq. (4-47) asThe average output current isThe power absorbed by the bridge and transferred back to the ac system isPower supplied by the dc source isPower absorbed by the resistance is(b)Variation in load current is due to the ac terms in the Fourier series. The loadcurrent amplitudes for each of the ac terms isInVnZnPRI2rms RLI2o R(95.5)2(2)18.2 kWPdcIoVdc(95.5)(3000)286.5 kW PacIoVo(95.5)(2809)268.3 kWIoVoVdcR28093000295.5 AVo3Vm, LL cos 322 (4160) cos (120¡)2809 Vhar80679_ch04_111-170.qxd 12/17/09 2:37 PM Page 155
156CHAPTER 4Full-Wave RectiÞerswhere Vncan be estimated from the graph of Fig. 4-21andSince the decreasing amplitude of the voltage terms and the increasing magnitude of theimpedance both contribute to diminishing ac currents as nincreases, the peak-to-peakcurrent variation will be estimated from the Þrst ac term. For n 6, Vn/Vmis estimatedfrom Fig. 4-21as 0.28, making V60.28(4160) 1650 V. The peak-to-peak varia-tion of 10 percent corresponds to a zero-to-peak amplitude of (0.05)(95.5) 4.8 A. Therequired load impedance for n6 is thenThe 2-resistor is insignificant compared to the total 343-required impedance, soZ6L60L. Solving for L,4.6DC POWER TRANSMISSIONThe controlled 12-pulse converter of Fig. 4-22ais the basic element for dc powertransmission. DC transmission lines are commonly used for transmission of elec-tric power over very long distances. Examples include the PaciÞc Intertie; theSquare Butte Project from Center, North Dakota, to Duluth, Minnesota; and theCross Channel Link under the English Channel between England and France. Mod-ern dc lines use SCRs in the converters, while very old converters used mercury-arc rectiÞers.Advantages of dc power transmission include the following:1.The inductance of the transmission line has zero impedance to dc, whereasthe inductive impedance for lines in an ac system is relatively large.2.The capacitance that exists between conductors is an open circuit for dc. Forac transmission lines, the capacitive reactance provides a path for current,resulting in additional I2Rlosses in the line. In applications where theconductors are close together, the capacitive reactance can be a signiÞcantproblem for ac transmission lines, whereas it has no effect on dc lines.3.There are two conductors required for dc transmission rather than three forconventional three-phase power transmission. (There will likely be anadditional ground conductor in both dc and ac systems.)4.Transmission towers are smaller for dc than ac because of only twoconductors, and right-of-way requirements are less.5.Power ßow in a dc transmission line is controllable by adjustment of the delayangles at the terminals. In an ac system, power ßow over a given transmissionline is not controllable, being a function of system generation and load.LLZ6603436(377)0.15 HZ6V6I61650 V4.8 A343 Æ12ZnƒRjn0Lƒhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 156
4.6DC Power Transmission1576.Power ßow can be modulated during disturbances on one of the ac systems,resulting in increased system stability.7.The two ac systems that are connected by the dc line do not need to be insynchronization. Furthermore, the two ac systems do not need to be of thesame frequency. A50-Hz system can be connected to a 60-Hz system via adc link.The disadvantage of dc power transmission is that a costly ac-dc converter,Þlters, and control system are required at each end of the line to interface with theac system.Figure 4-24ashows a simpliÞed scheme for dc power transmission using six-pulse converters at each terminal. The two ac systems each have their owngenerators, and the purpose of the dc line is to enable power to be interchangedbetween the ac systems. The directions of the SCRs are such that current iowillbe positive as shown in the line.In this scheme, one converter operates as a rectiÞer (power ßow from ac to dc),and the other terminal operates as an inverter (power ßow from dc to ac). Eitherterminal can operate as a rectiÞer or inverter, with the delay angle determiningthe mode of operation. By adjusting the delay angle at each terminal, power ßowis controlled between the two ac systems via the dc link.The inductance in the dc line is the line inductance plus an extra seriesinductor to Þlter harmonic currents. The resistance is that of the dc line conduc-tors. For analysis purposes, the current in the dc line may be considered to be aripple-free dc current.Figure 4-24(a) An elementary dc transmission system; (b) Equivalent circuit.RÐ+Vo2+ÐVo1Rvo1vo2ioioL+DCTransmissionLineACSystem1ACSystem2ÐÐ+har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 157
158CHAPTER 4Full-Wave RectiÞersVoltages at the terminals of the converters Vo1and Vo2are positive as shownfor between 0 and 90and negative for between 90 and 180. The convertersupplying power will operate with a positive voltage while the converter absorb-ing power will have a negative voltage.With converter 1 in Fig. 4-24aoperating as a rectiÞer and converter 2 oper-ating as an inverter, the equivalent circuit for power computations is shown inFig. 4-24b. The current is assumed to be ripple-free, enabling only the dc com-ponent of the Fourier series to be relevant. The dc current is(4-54)where(4-55)Power supplied by the converter at terminal 1 is(4-56)Power supplied by the converter at terminal 2 is(4-57)P2Vo2 IoP1Vo1 Io Vo23Vm2, LL cos 2Vo13Vm1, LL cos 1IoVo1Vo2REXAMPLE 4-15DC Power TransmissionFor the elementary dc transmission line represented in Fig. 4-24a, the ac voltage to eachof the bridges is 230 kVrms line to line. The total line resistance is 10 , and the induc-tance is large enough to consider the dc current to be ripple-free. The objective is to trans-mit 100 MWto ac system 2 from ac system 1 over the dc line. Design a set of operatingparameters to accomplish this objective. Determine the required current-carrying capac-ity of the dc line, and compute the power loss in the line.■SolutionThe relationships that are required are from Eqs. (4-54) to (4-57), whereThe maximum dc voltage that is obtainable from each converter is, for 0 in Eq. (4-47),Vo, max 3Vm, LL322 (230 kV)310.6 kVP2IoVo2100 MW (100 MW absorbed)har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 158
4.6DC Power Transmission159The dc output voltages of the converters must have magnitudes less than 310.6 kV, so avoltage of 200 kVis arbitrarily selected for converter 2. This voltage must be negativebecause power must be absorbed at converter 2. The delay angle at converter 2 is thencomputed from Eq. (4-47).Solving for 2,The dc current required to deliver 100 MWto converter 2 is thenwhich is the required current-carrying capacity of the line.The required dc output voltage at converter 1 is computed asThe required delay angle at converter 1 is computed from Eq. (4-47).Power loss in the line is I2rmsR, where IrmsLIobecause the ac components of line currentare Þltered by the inductor. Line loss isNote that the power supplied at converter 1 iswhich is the total power absorbed by the other converter and the line resistance.Certainly other combinations of voltages and current will meet the design objectives,as long as the dc voltages are less than the maximum possible output voltage and the lineand converter equipment can carry the current. Abetter design might have higher volt-ages and a lower current to reduce power loss in the line. That is one reason for using 12-pulse converters and bipolar operation, as discussed next.Amore common dc transmission line has a 12-pulse converter at each ter-minal. This suppresses some of the harmonics and reduces Þltering require-ments. Moreover, a pair of 12-pulse converters at each terminal provides bipolaroperation. One of the lines is energized at Vdcand the other is energizedatVdc. In emergency situations, one pole of the line can operate without theother pole, with current returning through the ground path. Figure 4-25shows abipolar scheme for dc power transmission.P1Vdc1Io(205 kV)(500 A)102.5 MWPlossI2rmsRL(500)2 (10)2.5 MW 1 cos 1 205 kV310.6 kV48.7¡Vo1Vo2Io R200 kV(500)(10)205 kVIo100 MW200 kV500 A2 cos 1a200 kV310.6 kVb130¡Vo23Vm, LL cos 2(310.6 kV) cos 2200 kVhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 159
160CHAPTER 4Full-Wave RectiÞers4.7COMMUTATION: THE EFFECTOFSOURCE INDUCTANCESingle-Phase Bridge RectiÞerAn uncontrolled single-phase bridge rectiÞer with a source inductance Lsand aninductive load is shown in Fig. 4-26a. When the source changes polarity, sourcecurrent cannot change instantaneously, and current must be transferred gradu-ally from one diode pair to the other over a commutation interval u, as shown inFig. 4-26b. Recall from Chap. 3that commutation is the process of transferringthe load current from one diode to another or, in this case, one diode pair to theother. (See Sec. 3.11.) During commutation, all four diodes are on, and the volt-age across Lsis the source voltage Vmsin (t).Assume that the load current is a constant Io. The current in Lsand the sourceduring the commutation from D1-D2to D3-D4starts at Ioand goes toIo. Thiscommutation interval starts when the source changes polarity at tas isexpressed inEvaluating,(4-58)is(t)VmLs (1cos t)Io is(t)1Ls3tVm sin (t) d(t)Io Figure 4-25Adc transmission system with two 12-pulse converters at eachterminal.12-PulseConverterDC lineAC system 2AC system 1YYYYYΔYΔYYYYYΔYΔhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 160
4.7Commutation: The Effect of Source Inductance161When commutation is complete at tu,(4-59)Solving for the commutation angle u,(4-60)where XsLsis the reactance of the source. Figure 4-26bshows the effect ofthe source reactance on the load current and voltage.Average load voltage isVo13uVm sin (t)d(t)Vm (1 cos u)u cos 1 a12IoLSVmb cos 1a12IoXSVmbi(u)IoVmLS 31 cos (u)4IoD1iD1iD3(a)(b)0000+++–––vLsvoisIovs = Vm sin wtVmIoIoIo–IovoisuD4D3D2Figure 4-26Commutation for the single-phase rectiÞer (a) circuitwith source inductance Ls; (b) voltage and current waveforms.har80679_ch04_111-170.qxd 12/17/09 3:47 PM Page 161
162CHAPTER 4Full-Wave RectiÞersUsing ufrom Eq. (4-60),(4-61)Thus, source inductance lowers the average output voltage of full-wave rectiÞers.Three-Phase RectiÞerFor the uncontrolled three-phase bridge rectiÞer with source reactance (Fig. 4-27a),assume that diodes D1and D2are conducting and the load current is a constant Io.The next transition has load current transferred from D1to D3in the top half ofthe bridge. The equivalent circuit during commutation from D1to D3is shown inFig. 4-27b. The voltage across Lais(4-62)Current in Lastarts at Ioand decreases to zero in the commutation interval,(4-63)iLa(u)01La3uVm, LL2 sin (t) d(t)IovLavAB2Vm, LL2 sin (t) Vo2Vm a1Io XsVmbIovAvBvC(a)(b)D1D4D3voLaLbLcD6D5+ÐD2vAvBvCD1+ÐD3vLaLbLaLcD2IoFigure 4-27Commutation for the three-phase rectiÞer. (a) Circuit; (b) Circuitduring commutation from D1to D3; (c) Output voltage and diode currents.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 162
4.8Summary163Solving for u,(4-64)During the commutation interval from D1to D3, the converter output voltage is(4-65)Output voltage and diode currents are shown in Fig. 4-27c. Average output volt-age for the three-phase converter with a nonideal source is(4-66)Therefore, source inductance lowers the average output voltage of three-phaserectiÞers.4.8Summary¥Single-phase full-wave rectiÞers can be of the bridge or center-tapped transformertypes.¥The average source current for single-phase full-wave rectiÞers is zero.¥The Fourier series method can be used to analyze load currents.Vo3Vm, LL a1XsIoVm, LLbvovbcvac2 u cos 1a1 2LaIoVm, LLb cos 1a1 2XsIoVm, LLbvoiD1iD3IovACvBCvovBC + vAC2uIo00(c)0Figure 4-27(continued)har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 163
164CHAPTER 4Full-Wave RectiÞers¥Alarge inductor in series with a load resistor produces a load current that isessentially dc.¥AÞlter capacitor on the output of a rectiÞer can produce an output voltage that isnearly dc. An LCoutput Þlter can further improve the quality of the dc output andreduce the peak current in the diodes.¥Switches such as SCRs can be used to control the output of a single-phase or three-phase rectiÞer.¥Under certain circumstances, controlled converters can be operated as inverters.¥The 6-pulse three-phase rectiÞers have 6 diodes or SCRs, and 12-pulse rectiÞershave 12 diodes or SCRs.¥Three-phase bridge rectiÞers produce an output that is inherently like dc.¥DC power transmission has a three-phase converter at each end of a dc line. Oneconverter is operated as a rectiÞer and the other is operated as a converter.¥Source inductance reduces the dc output of a single-phase or three-phase rectiÞer.4.9BibliographyS. B. Dewan and A. Straughen, Power Semiconductor Circuits, Wiley, New York, 1975.J. Dixon, Power Electronics Handbook, edited by M. H. Rashid, Academic Press, SanDiego, 2001, Chapter 12.E. W. Kimbark, Direct Current Transmission, Wiley-Interscience, New York, 1971.P. T. Krein, Elements of Power Electronics, Oxford University Press, 1998.Y.-S. Lee and M. H. L. Chow, Power Electronics Handbook, edited by M. H. Rashid,Academic Press, San Diego, 2001, Chapter 10.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters,Applications, and Design,3d ed., Wiley, New York, 2003.M. H. Rashid, Power Electronics: Circuits, Devices, and Systems,3d ed., Prentice-Hall,Upper Saddle River, N.J., 2004.B. Wu, High-Power Converters and AC Drives, Wiley, New York, 2006.ProblemsUncontrolled Single-Phase RectiÞers4-1.Asingle-phase full-wave bridge rectiÞer has a resistive load of 18 and an acsource of 120-Vrms. Determine the average, peak, and rms currents in the loadand in each diode.4-2.Asingle-phase rectiÞer has a resistive load of 25 . Determine the averagecurrent and peak reverse voltage across each of the diodes for (a) a bridgerectiÞer with an ac source of 120 Vrms and 60 Hz and (b) a center-tappedtransformer rectiÞer with 120 Vrms on each half of the secondary winding.4-3.Asingle-phase bridge rectiÞer has an RLload with R15 and L60 mH.The ac source is vs100 sin (377t) V. Determine the average and rms currentsin the load and in each diode.4-4.Asingle-phase bridge rectiÞer has an RLload with R10 and L25 mH.The ac source is vs170 sin (377t) V. Determine the average and rms currentsin the load and in each diode.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 164
Problems1654-5.Asingle-phase bridge rectiÞer has an RLload with R15 and L30 mH.The ac source is 120 Vrms, 60 Hz. Determine (a) the average load current, (b) the power absorbed by the load, and (c) the power factor.4-6.Asingle-phase bridge rectiÞer has an RLload with R12 and L20 mH.The ac source is 120 Vrms and 60 Hz. Determine (a) the average load current,(b) the power absorbed by the load, and (c) the power factor.4-7.Asingle-phase center-tapped transformer rectiÞer has an ac source of 240 Vrmsand 60 Hz. The overall transformer turns ratio is 3:1 (80 Vbetween the extremeends of the secondary and 40 Von each tap). The load is a resistance of 4 .Determine (a) the average load current, (b) the rms load current, (c) the averagesource current, and (d) the rms source current. Sketch the current waveforms ofthe load and the source.4-8.Design a center-tapped transformer rectiÞer to produce an average current of10.0 Ain a 15-resistive load. Both 120- and 240-Vrms 60-Hz sources areavailable. Specify which source to use and specify the turns ratio of thetransformer.4-9.Design a center-tapped transformer rectiÞer to produce an average current of 5.0 Ain an RLload with R10 and L50 mH. Both 120- and 240-Vrms60-Hz sources are available. Specify which source to use and specify the turnsratio of the transformer.4-10.An electromagnet is modeled as a 200-mH inductance in series with a 4-resistance. The average current in the inductance must be 10 Ato establish therequired magnetic Þeld. Determine the amount of additional series resistancerequired to produce the required average current from a bridge rectiÞer suppliedfrom a single-phase 120-V, 60-Hz source.4-11.The full-wave rectiÞer of Fig. 4-3ahas vs(t) 170 sin tV, R3 , L15 mH,Vdc48 V, and 2(60) rad/s. Determine (a) the power absorbed by the dcsource, (b) the power absorbed by the resistor, and (c) the power factor. (d) Estimatethe peak-to-peak variation in the load current by considering only the Þrst ac term inthe Fourier series for current.4-12.The full-wave rectiÞer of Fig. 4-3ahas vs(t) 340 sin tV, R5 , L40 mH,Vdc96 V, and 2(60) rad/s. Determine (a) the power absorbed by the dcsource, (b) the power absorbed by the resistor, and (c) the power factor. (d) Estimatethe peak-to-peak variation in the load current by considering only the Þrst ac term inthe Fourier series for current.4-13.The peak-to-peak variation in load current in Example 4-1 based on I2wasestimated to be 6.79 A. Compare this estimate with that obtained from a PSpicesimulation. (a) Use the default diode model Dbreak. (b) Modify the diode modelto make n0.01 to approximate an ideal diode.4-14.(a) In Example 4-3, the inductance is changed to 8 mH. Simulate the circuit inPSpice and determine whether the inductor current is continuous or discontinuous.Determine the power absorbed by the dc voltage using PSpice. (b) Repeat part (a),using L4 mH.4-15.The single-phase full-wave bridge rectiÞer of Fig. 4-5ahas an RL-source loadwith R4 , L40 mH, and Vdc24 V. The ac source is 120 Vrms at 60 Hz.Determine (a) the power absorbed by the dc source, (b) the power absorbed bythe resistor, and (c) the power factor.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 165
166CHAPTER 4Full-Wave RectiÞers4-16.The single-phase full-wave bridge rectiÞer of Fig. 4-5ahas an RL-source loadwith R5 , L60 mH, and Vdc36 V. The ac source is 120 Vrms at 60 Hz.Determine (a) the power absorbed by the dc source, (b) the power absorbed bythe resistor, and (c) the power factor.4-17.Simulate the circuit of Prob. 4-16 using L40 mH and again with L100 H.Discuss the differences in the behavior of the circuits for the two inductors.Observe steady-state conditions. Use the PSpice default diode model.4-18.The full-wave rectiÞer of Fig. 4-6has a 120-Vrms 60 Hz source and a loadresistance of 200 . Determine the Þlter capacitance required to limit the peak-to-peak output voltage ripple to 1 percent of the dc output. Determine the peakand average diode currents.4-19.The full-wave rectiÞer of Fig. 4-6has a 60-Hz ac source with Vm100 V. It is to supply a load that requires a dc voltage of 100 Vand will draw 0.5 A.Determine the Þlter capacitance required to limit the peak-to-peak output voltage ripple to 1 percent of the dc output. Determine the peak and averagediode currents.4-20.In Example 3-9, the half-wave rectiÞer of Fig. 3-11ahas a 120 Vrms source at60 Hz, R500 . The capacitance required for a 1 percent ripple in outputvoltage was determined to be 3333 F. Determine the capacitance required for a1 percent ripple if a full-wave rectiÞer is used instead. Determine the peak diodecurrents for each circuit. Discuss the advantages and disadvantages of eachcircuit.4-21.Determine the output voltage for the full-wave rectiÞer with an LCÞlter of Fig. 4-8aif L10 mH and (a) R7 and (b) R20 . The source is 120 Vrms at 60 Hz. Assume the capacitor is sufÞciently large to produce aripple-free output voltage. (c) Modify the PSpice circuit in Example 4-5 todetermine Vofor each case. Use the default diode model.4-22.For the full-wave rectiÞer with an LCÞlter in Example 4-5, the inductor has aseries resistance of 0.5 . Use PSpice to determine the effect on the outputvoltage for each load resistance.Controlled Single-phase RectiÞers4-23.The controlled single-phase bridge rectiÞer of Fig. 4-10ahas a 20-resistiveload and has a 120-Vrms, 60-Hz ac source. The delay angle is 45. Determine(a) the average load current, (b) the rms load current, (c) the rms source current,and (d) the power factor.4-24.Show that the power factor for the controlled full-wave rectiÞer with a resistiveload is4-25.The controlled single-phase full-wave bridge rectiÞer of Fig. 4-11ahas an RLload with R25 and L50 mH. The source is 240 Vrms at 60 Hz.Determine the average load current for (a) 15and (b) 75.4-26.The controlled single-phase full-wave bridge rectiÞer of Fig. 4-11ahas an RLload with R30 and L75 mH. The source is 120 Vrms at 60 Hz.Determine the average load current for (a) 20and (b) 80.pfA1sin(2)2har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 166
Problems1674-27.Show that the power factor for the full-wave rectiÞer with RLload where Lislarge and the load current is considered dc is 2/.4-28.A20-resistive load requires an average current that varies from 4.5 to 8.0 A.An isolation transformer is placed between a 120-Vrms 60-Hz ac source and acontrolled single-phase full-wave rectiÞer. Design a circuit to meet the currentrequirements. Specify the transformer turns ratio and the range of delay angle.4-29.An electromagnet is modeled as a 100-mH inductance in series with a 5-resistance. The average current in the inductance must be 10 Ato establish therequired magnetic Þeld. Determine the delay angle required for a controlled single-phase rectiÞer to produce the required average current from a single-phase 120-V,60-Hz source. Determine if the current is continuous or discontinuous. Estimate thepeak-to-peak variation in current based on the Þrst ac term in the Fourier series.4-30.The full-wave converter used as an inverter in Fig. 4-14has an ac source of 240 Vrms at 60 Hz, R10 , L0.8 H, and Vdc100 V. The delay angle for theconverter is 105. Determine the power supplied to the ac system from the dcsource. Estimate the peak-to-peak ripple in load current from the Þrst ac term inthe Fourier series.4-31.An array of solar cells produces 100 Vdc. Asingle-phase ac power system is 120 Vrms at 60 Hz. (a) Determine the delay angle for the controlled converter in thearrangement of Fig. 4-14(Vdc100) such that 2000 Wis transmitted to the acsystem. Assume Lis large enough to produce a current that is nearly ripple-free. Theequivalent resistance is 0.8 . Assume that the converter is lossless. (b) Determinethe power supplied by the solar cells. (c) Estimate the value of inductance such thatthe peak-to-peak variation in solar cell current is less than 2.5 A.4-32.An array of solar panels produces a dc voltage. Power produced by the solarpanels is to be delivered to an ac power system. The method of interfacing thesolar panels with the power system is via a full-wave SCR bridge as shown in Fig. 4-14except with the dc source having the opposite polarity. Individual solarpanels produce a voltage of 12 V. Therefore, the voltage from the solar panel arraycan be established at any multiple of 12 by connecting the panels in appropriatecombinations. The ac source is(120) sin (377t) V. The resistance is 1 .1212Determine values of Vdc, delay angle , and inductance Lsuch that the powerdelivered to the ac system is 1000 Wand the maximum variation in solar panelcurrent is no more than 10 percent of the average current. There are severalsolutions to this problem.4-33.Afull-wave converter operating as an inverter is used to transfer power from awind generator to a single-phase 240-Vrms 60-Hz ac system. The generatorproduces a dc output of 150 Vand is rated at 5000 W. The equivalent resistancein the generator circuit is 0.6 . Determine (a) the converter delay angle forrated generator output power, (b) the power absorbed by the ac system, and (c) the inductance required to limit the current peak-to-peak ripple to 10 percentof the average current.Three-phase Uncontrolled RectiÞers4-34.Athree-phase rectiÞer is supplied by a 480-Vrms line-to-line 60-Hz source. Theload is a 50-resistor. Determine (a) the average load current, (b) the rms loadcurrent, (c) the rms source current, and (d) the power factor.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 167
168CHAPTER 4Full-Wave RectiÞers4-35.Athree-phase rectiÞer is supplied by a 240-Vrms line-to-line 60-Hz source. Theload is an 80-resistor. Determine (a) the average load current, (b) the rms loadcurrent, (c) the rms source current, and (d) the power factor.4-36.Athree-phase rectiÞer is supplied by a 480-Vrms line-to-line 60-Hz source. TheRLload is a 100-resistor in series with a 15-mH inductor. Determine (a) theaverage and rms load currents, (b) the average and rms diode currents, (c) the rmssource current, and (d) the power factor.4-37.Use PSpice to simulate the three-phase rectiÞer of Prob. 4-31. Use the defaultdiode model Dbreak. Determine the average and rms values of load current,diode current, and source current. Compare your results to Eq. (4-41). How muchpower is absorbed by the diodes?4-38.Using the PSpice circuit of Example 4-12, determine the harmonic content of theline current in the ac source. Compare the results with Eq. (4-46). Determine thetotal harmonic distortion of the source current.Three-phase Controlled RectiÞers4-39.The three-phase controlled rectiÞer of Fig. 4-20ais supplied from a 4160-Vrmsline-to-line 60-Hz source. The load is a 120-resistor. (a) Determine the delayangle required to produce an average load current of 25 A. (b) Estimate theamplitudes of the voltage harmonics V6, V12, and V18. (c) Sketch the currents inthe load, S1, S4, and phase Aof the ac source.4-40.The three-phase controlled rectiÞer of Fig. 4-20ais supplied from a 480-Vrmsline-to-line 60-Hz source. The load is a 50-resistor. (a) Determine the delayangle required to produce an average load current of 10 A. (b) Estimate theamplitudes of the voltage harmonics V6, V12, and V18. (c) Sketch the currents inthe load, S1, S4, and phase Aof the ac source.4-41.The six-pulse controlled three-phase converter of Fig. 4-20ais supplied from a480-Vrms line-to-line 60-Hz three-phase source. The delay angle is 35, and theload is a series RLcombination with R50 and L50 mH. Determine (a) the average current in the load, (b) the amplitude of the sixth harmoniccurrent, and (c) the rms current in each line from the ac source.4-42.The six-pulse controlled three-phase converter of Fig. 4-20ais supplied from a 480-Vrms line-to-line 60-Hz three-phase source. The delay angle is 50, and the load is a series RLcombination with R10 and L10 mH. Determine (a) the average current in the load, (b) the amplitudeof the sixth harmonic current, and (c) the rms current in each line from the ac source.4-43.The six-pulse controlled three-phase converter of Fig. 4-20ais supplied form a480-Vrms line-to-line 60-Hz three-phase source. The load is a series RLcombination with R20 . (a) Determine the delay angle required for anaverage load current of 20 A. (b) Determine the value of Lsuch that the Þrst accurrent term (n6) is less than 2 percent of the average current. (c) Verify yourresults with a PSpice simulation.4-44.Athree-phase converter is operating as an inverter and is connected to a 300-Vdc source as shown in Fig. 4-23a. The ac source is 240 Vrms line to line at 60 Hz.The resistance is 0.5 , and the inductor is large enough to consider the loadcurrent to be ripple-free. (a) Determine the delay angle such that the outputhar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 168
Problems169voltage of the converter is Vo280 V. (b) Determine the power supplied orabsorbed by each component in the circuit. The SCRs are assumed to be ideal.4-45.An inductor having superconducting windings is used to store energy. Thecontrolled six-pulse three-phase converter of Fig. 4-20ais used to recover thestored energy and transfer it to a three-phase ac system. Model the inductor as a1000-Acurrent source load, and determine the required delay angle such that 1.5 MWis transferred to the ac system which is 4160 Vline-to-line rms at 60 Hz.What is the rms current in each phase of the ac system?4-46.Apower company has installed an array of solar cells to be used as an energysource. The array produces a dc voltage of 1000 Vand has an equivalent seriesresistance of 0.1 . The peak-to-peak variation in solar cell current should notexceed 5 percent of the average current. The interface between the solar cellarray and the ac system is the controlled six-pulse three-phase converter ofFig. 4-23a. Athree-phase transformer is placed between the converter and a12.5-kVline-to-line rms 60-Hz ac line. Design a system to transfer 100 kWto the ac power system from the solar cell array. (The ac system must absorb100 kW.) Specify the transformer turns ratio, converter delay angle, and thevalues of any other circuit components. Determine the power loss in theresistance.Dc PowerTransmission4-47.For the elementary dc transmission line represented in Fig. 4-24a, the ac voltageto each of the bridges is 345 kVrms line to line. The total line resistance is 15 ,and the inductance is large enough to consider the dc current to be ripple-free.AC system 1 is operated with 45.0, and ac system 2 has 134.4. (a) Determine the power absorbed or supplied by each ac system. (b) Determinethe power loss in the line.4-48.For the elementary dc transmission line represented in Fig. 4-24a, the ac voltageto each of the bridges is 230 kVrms line to line. The total line resistance is 12 ,and the inductance is large enough to consider the dc current to be ripple-free.The objective is to transmit 80 MWto ac system 2 from ac system 1 over the dcline. Design a set of operating parameters to accomplish this objective.Determine the required current-carrying capacity of the dc line, and compute thepower loss in the line.4-49.For the elementary dc transmission line represented in Fig. 4-24a, the ac voltageto each of the bridges is 345 kVrms line-to-line. The total line resistance is 20 ,and the inductance is large enough to consider the dc current to be ripple-free.The objective is to transmit 300 MWto ac system 2 from ac system 1 over the dcline. Design a set of operating parameters to accomplish this objective. Determinethe required current-carrying capacity of the dc line, and compute the power lossin the line.Design Problems4-50.Design a circuit that will produce an average current that is to vary from 8 to 12 Ain an 8-resistor. Single-phase ac sources of 120 and 240 Vrms at 60 Hz areavailable. The current must have a peak-to-peak variation of no more than 2.5 A.Determine the average and rms currents and maximum voltage for each circuithar80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 169
170CHAPTER 4Full-Wave RectiÞerselement. Simulate your circuit in PSpice to verify that it meets the speciÞcations.Give alternative circuits that could be used to satisfy the design speciÞcations,and give reasons for your selection.4-51.Design a circuit that will produce a current which has an average value of 15 Aina resistive load of 20 . The peak-to-peak variation in load current must be nomore than 10 percent of the dc current. Voltage sources available are a single-phase 480 Vrms, 60 Hz source and a three-phase 480 Vrms line-to-line 60 Hzsource. You may include additional elements in the circuit. Determine theaverage, rms, and peak currents in each circuit element. Simulate your circuit inPSpice to verify that it meets the speciÞcations. Give alternative circuits thatcould be used to satisfy the design speciÞcations, and give reasons for yourselection.har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 170
CHAPTER5171AC Voltage ControllersAC to ac Converters5.1INTRODUCTIONAn ac voltage controller is a converter that controls the voltage, current, and aver-age power delivered to an ac load from an ac source. Electronic switches connectand disconnect the source and the load at regular intervals. In a switching schemecalled phase control, switching takes place during every cycle of the source, ineffect removing some of the source waveform before it reaches the load. Anothertype of control is integral-cycle control, whereby the source is connected and dis-connected for several cycles at a time.The phase-controlled ac voltage controller has several practical uses includinglight-dimmer circuits and speed control of induction motors. The input voltagesource is ac, and the output is ac (although not sinusoidal), so the circuit is classi-Þed as an ac-ac converter.5.2THE SINGLE-PHASE AC VOLTAGECONTROLLERBasic OperationAbasic single-phase voltage controller is shown in Fig. 5-1a. The electronicswitches are shown as parallel thyristors (SCRs). This SCR arrangement makesit possible to have current in either direction in the load. This SCR connection iscalled antiparallel or inverse parallel because the SCRs carry current in oppositedirections. Atriac is equivalent to the antiparallel SCRs. Other controlled switch-ing devices can be used instead of SCRs.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 171
172CHAPTER 5AC Voltage ControllersThe principle of operation for a single-phase ac voltage controller using phasecontrol is quite similar to that of the controlled half-wave rectiÞer of Sec. 3.9.Here, load current contains both positive and negative half-cycles. An analysisidentical to that done for the controlled half-wave rectiÞer can be done on a half-cycle for the voltage controller. Then, by symmetry, the result can be extrapo-lated to describe the operation for the entire period.(b)(a)vsvoioRS2++−−vsw+−S10αvsioπ + α π2πωtvo0απ + α π2πωtvsw0απ + α π2πωtFigure 5-1(a) Single-phase ac voltage controller with aresistive load; (b) Waveforms.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 172
5.2The Single-Phase AC Voltage Controller173Some basic observations about the circuit of Fig. 5-1aare as follows:1.The SCRs cannot conduct simultaneously.2.The load voltage is the same as the source voltage when either SCR is on.The load voltage is zero when both SCRs are off.3.The switch voltage vswis zero when either SCR is on and is equal to thesource voltage when neither is on.4.The average current in the source and load is zero if the SCRs are on forequal time intervals. The average current in each SCR is not zero because ofunidirectional SCR current.5.The rms current in each SCR is times the rms load current if the SCRsare on for equal time intervals. (Refer to Chap. 2.)1/12For the circuit of Fig. 5-1a, S1conducts if a gate signal is applied during thepositive half-cycle of the source. Just as in the case of the SCR in the controlledhalf-wave rectiÞer, S1conducts until the current in it reaches zero. Where this cir-cuit differs from the controlled half-wave rectiÞer is when the source is in its neg-ative half-cycle. Agate signal is applied to S2during the negative half-cycle of thesource, providing a path for negative load current. If the gate signal for S2is a halfperiod later than that of S1, analysis for the negative half-cycle is identical to thatfor the positive half, except for algebraic sign for the voltage and current.Single-Phase Controllerwith a Resistive LoadFigure 5-1bshows the voltage waveforms for a single-phase phase-controlledvoltage controller with a resistive load. These are the types of waveforms thatexist in a common incandescent light-dimmer circuit. Let the source voltage be(5-1)Output voltage is(5-2)The rms load voltage is determined by taking advantage of positive and neg-ative symmetry of the voltage waveform, necessitating evaluation of only a half-period of the waveform:(5-3)Note that for 0, the load voltage is a sinusoid that has the same rms valueas the source. Normalized rms load voltage is plotted as a function of in Fig. 5-2.The rms current in the load and the source is(5-4)Io, rmsVo, rmsR Vo, rmsA11[Vm sin (t)]2 d(t) Vm12A1 sin (2)2vo(t)bVm sin t for t and t 20 otherwisevs(t)Vm sin t har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 173
174CHAPTER 5AC Voltage Controllersand the power factor of the load is(5-5)Note that pf 1 for 0, which is the same as for an uncontrolled resistiveload, and the power factor for 0 is less than 1.The average source current is zero because of half-wave symmetry. TheaverageSCR current is(5-6)Since each SCR carries one-half of the line current, the rms current in eachSCR is(5-7)ISCR, rmsIo, rms12 ISCR, avg123Vm sin (t)R d(t)Vm2R (1 cos )pfA1 sin (2)2 Vm12A1 (sin 2)2Vm>12pfPSPVs, rms Is, rmsV2o, rms >RVs, rms(Vo, rms>R)Vo, rmsVs, rms1.00.80.60.40.20.004080120160Normalized rms Output VoltageDelay Angle (Degrees)Single-phase Voltage ControllerFigure 5-2Normalized rms load voltage vs. delay angle for a single-phase acvoltage controller with a resistive load.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 174
5.2The Single-Phase AC Voltage Controller175Since the source and load current is nonsinusoidal, harmonic distortion is aconsideration when designing and applying ac voltage controllers. Only odd har-monics exist in the line current because the waveform has half-wave symmetry.Harmonic currents are derived from the deÞning Fourier equations in Chap. 2.Normalized harmonic content of the line currents vs. is shown in Fig. 5-3. Basecurrent is source voltage divided by resistance, which is the current for 0.Single-Phase Controller with a Resistive LoadThe single-phase ac voltage controller of Fig. 5-1ahas a 120-Vrms 60-Hz source. Theload resistance is 15 . Determine (a) the delay angle required to deliver 500 Wto the load,(b) the rms source current, (c) the rms and average currents in the SCRs, (d) the powerfactor, and (e) the total harmonic distortion (THD) of the source current.■Solution(a)The required rms voltage to deliver 500 Wto a 15-load isVo, rms1PR2(500)(15)86.6 VPV2o, rmsR00.00.20.4 0.60.81.0Cnn = 1Delay Angle (Degrees)Harmonics, Single-phase Controllern = 3n = 5n = 74080120160Figure 5-3Normalized harmonic content vs. delay anglefor a single-phase ac voltage controller with a resistiveload; Cnis the normalized amplitude. (See Chap. 2.)EXAMPLE 5-1har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 175
176CHAPTER 5AC Voltage ControllersThe relationship between output voltage and delay angle is described by Eq. (5-3)and Fig. 5-2. From Fig. 5-2, the delay angle required to obtain a normalized outputof 86.6/120 0.72 is approximately 90. Amore precise solution is obtained fromthe numerical solution for in Eq. (5-3), expressed aswhich yields(b)Source rms current is(c)SCR currents are determined from Eqs. (5-6) and (5-7),(d)The power factor iswhich could also be computed from Eq. (5-5).(e)Base rms current isThe rms value of the currentÕs fundamental frequency is determined from C1in thegraph of Fig. 5-3.The THD is computed from Eq. (2-68),THD2I2rmsI21, rmsI1, rms25.7724.924.90.6363%C1L0.61QI1, rmsC1Ibase(0.61)(8.0)4.9 AIbaseVs, rmsR120158.0 ApfPS500(120)(5.77)0.72ISCR, avg12 (120)2(15)C1 cos (88.1¡)D1.86 AISCR, rmsIrms125.77124.08 AIo, rmsVo, rmsR86.6155.77 A1.54 rad88.1¡ 86.6120A1 sin (2)2 0har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 176
5.2The Single-Phase AC Voltage Controller177βvovsw0α0απ + α βπ + α π2πωt0αvsioπ + α πβ2πωt(b)ωt(a)vsvoioRLS2++−−vsw+−S1Figure 5-4(a) Single-phase ac voltage controller with an RLload; (b) Typical waveforms.Single-Phase Controllerwith an RLLoadFigure 5-4ashows a single-phase ac voltage controller with an RLload. When agate signal is applied to S1at t, KirchhoffÕs voltage law for the circuit isexpressed as(5-8)Vm sin (t)Rio(t)Ldio(t)dthar80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 177
178CHAPTER 5AC Voltage ControllersThe solution for current in this equation, outlined in Sec. 3.9, iswhere(5-9)The extinction angle is the angle at which the current returns to zero, when t,(5-10)which must be solved numerically for .Agate signal is applied to S2at t, and the load current is negativebut has a form identical to that of the positive half-cycle. Figure 5-4bshows typ-ical waveforms for a single-phase ac voltage controller with an RLload.The conduction angle is deÞned as(5-11)In the interval between and when the source voltage is negative and theload current is still positive, S2cannot be turned on because it is not forward-biased. The gate signal to S2must be delayed at least until the current in S1reacheszero, at t. The delay angle is therefore at least .(5-12)The limiting condition when is determined from an examinationof Eq. (5-10). When , Eq. (5-10) becomes which has a solutionTherefore,(5-13)If , , provided that the gate signal is maintained beyond t.In the limit, when , one SCR is always conducting, and the voltageacross the load is the same as the voltage of the source. The load voltage and cur-rent are sinusoids for this case, and the circuit is analyzed using phasor analysis forac circuits. The power delivered to the load is continuously controllable betweenthe two extremes corresponding to full source voltage and zero. when sin ()0 io()0VmZ csin ()sin () e()>dZ 2R2(L)2 , and tan 1aLRbio (t)dVmZ csin(t)sin()e(t)>d for t0 otherwisehar80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 178
5.2The Single-Phase AC Voltage Controller179This SCR combination can act as a solid-state relay, connecting or disconnect-ing the load from the ac source by gate control of the SCRs. The load is discon-nected from the source when no gate signal is applied, and the load has the samevoltage as the source when a gate signal is continuously applied. In practice, the gatesignal may be a high-frequency series of pulses rather than a continuous dc signal.An expression for rms load current is determined by recognizing that thesquare of the current waveform repeats every rad. Using the deÞnition of rms,(5-14)where io(t) is described in Eq. (5-9).Power absorbed by the load is determined from(5-15)The rms current in each SCR is(5-16)The average load current is zero, but each SCR carries one-half of the currentwaveform, making the average SCR current(5-17)Single-Phase Voltage Controller with RLLoadFor the single-phase voltage controller of Fig. 5-4a, the source is 120 Vrms at 60 Hz, andthe load is a series RLcombination with R20 and L50 mH. The delay angle is90. Determine (a) an expression for load current for the Þrst half-period, (b) the rms loadcurrent, (c) the rms SCR current, (d) the average SCR current, (e) the power delivered tothe load, and (f) the power factor.■Solution(a)The current is expressed as in Eq. (5-9). From the parameters given,90¡1.57 radVmZ1202227.56.18 AaLRb377a0.0520b0.943 rad tan 1aLRb tan 1 (377)(0.05)200.756 radZ 2R2(L)23(20)2C(377)(0.05)D227.5ÆISCR, avg123io(t) d(t)ISCR, rmsIo, rms12 PI2o, rms R Io, rmsC1Li2o(t) d(t)EXAMPLE 5-2har80679_ch05_171-195.qxd 12/17/09 2:39 PM Page 179
180CHAPTER 5AC Voltage ControllersThe current is then expressed in Eq. (5-9) asThe extinction angle is determined from the numerical solution of i() 0 in theabove equation, yieldingNote that the conduction angle 2.26 rad 130, which is less thanthe limit of 180.(b)The rms load current is determined from Eq. (5-14).(c)The rms current in each SCR is determined from Eq. (5-16).(d)Average SCR current is obtained from Eq. (5-17).(e)Power absorbed by the load is(f)Power factor is determined from P/S.PSpice Simulation of Single-Phase AC Voltage ControllersThe PSpice simulation of single-phase voltage controllers is very similar to thesimulation of the controlled half-wave rectiÞer. The SCR is modeled with adiode and voltage-controlled switch. The diodes limit the currents to positivevalues, thus duplicating SCR behavior. The two switches are complementary,each closed for one-half the period.The Schematic Capture circuit requires the full version, whereas the textCIR Þle will run on the PSpice A/D Demo version.pf PS PVs, rms Is, rms 147(120)(2.71) 0.45 45%PI2o, rms R(2.71)2 (20)147 WISCR, avg1233.831.57C6.18 sin (t0.756)23.8et>0.943D d(t)1.04 AISCR, rmsIo, rms122.71121.92 AIo, rmsF133.831.57C6.18 sin (t0.756)23.8et>0.943D d(t) 2.71 A3.83 rad220¡ io(t)6.18 sin (t0.756)23.8et>0.943 A for t VmZ sin () e>23.8 Ahar80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 180
5.2The Single-Phase AC Voltage Controller181PSpice Simulation of a Single-Phase Voltage ControllerUse PSpice to simulate the circuit of Example 5-2. Determine the rms load current, the rmsand average SCR currents, load power, and total harmonic distortion in the source current.Use the default diode model in the SCR.■SolutionThe circuit for the simulation is shown in Fig. 5-5. This requires the full version ofSchematic Capture.The PSpice circuit Þle for the A/D Demo version is as follows:SINGLE-PHASE VOLTAGE CONTROLLER (voltcont.cir)*** OUTPUT VOLTAGE IS V(3), OUTPUT CURRENT IS I(R) ******************* INPUT PARAMETERS *********************.PARAM VS 120;source rms voltage.PARAM ALPHA 90;delay angle in degrees.PARAM R 20;load resistance.PARAM L 50mH;load inductance.PARAM F 60;frequency.PARAM TALPHA {ALPHA/(360*F)}PW 5 {0.5/F};converts angle to time delay***************** CIRCUIT DESCRIPTION *********************VS 1 0 SIN(0 {VS*SQRT(2)} {F})S1 1 2 11 0 SMODD1 2 3 DMOD; FORWARD SCRS2 3 5 0 11 SMODEXAMPLE 5-3Figure 5-5The circuit schematic for a single-phase ac voltage controller. The full version of SchematicCapture is required for this circuit.000+−+−VC2S2S1VsR1202150mL1D2D1AControl2Control20+−VC10Control1V1 = 0V2 = 5TD = {TALPHA}TR = 1nTF = 1nPW = {0.5/F}PER = {1/F}V1 = 0V2 = 5TD = {TALPHA + 1/(2∗F)}TR = 1nTF = 1nPW = {0.5/F}PER = {1/F}ALPHA = 90F = 60Vrms = 120TALPHA = {ALPHA/(360*F)} PARAMETERS:VOFF = 0VAMPL = {Vrms*sqrt(2)}FREQ = {F}++Control1AC VOLTAGE CONTROLLER0+−+−har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 181
182CHAPTER 5AC Voltage ControllersD2 5 1 DMOD; REVERSE SCRR 3 4 {R}L 4 0 {L}**************** MODELS AND COMMANDS ********************.MODEL DMOD D.MODEL SMOD VSWITCH (RON.01)VCONTROL 11 0 PULSE(-10 10 {TALPHA} 0 0 {PW} {1/F});control for bothswitches.TRAN .1MS 33.33MS 16.67MS .1MS UIC;one period of output.FOUR 60 I(R);Fourier Analysis to get THD.PROBE.ENDUsing the PSpice A/D input Þle for the simulation, the Probe output of load current andrelated quantities is shown in Fig. 5-6. From Probe, the following quantities are obtained:QuantityExpressionResultRMS load currentRMS(I(R))2.59 ARMS SCR currentRMS(I(S1))1.87 AAverage SCR currentAVG(I(S1))1.01 ALoad powerAVG(W(R))134 WTotal harmonic distortion(from the output Þle)31.7%Note that the nonideal SCRs (using the default diode) result in smaller currents andload power than for the analysis in Example 5-2 which assumed ideal SCRs. Amodel forthe particular SCR that will be used to implement the circuit will give a more accurateprediction of actual circuit performance.70 ms60 ms(50.000m, 1.8660)(50.000m, 1.0090)(50.000m, 2.5916)50 msTime40 ms15 ms-5.0 A0 A5.0 A20 ms30 msI (R)RMS ( I (R)) RMS ( I (S1) AVG ( I (S1)) Figure 5-6Probe output for Example 5-3.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 182
5.3Three-Phase Voltage Controllers1835.3THREE-PHASE VOLTAGE CONTROLLERSY-Connected Resistive LoadAthree-phase voltage controller with a Y-connected resistive load is shown inFig. 5-7a. The power delivered to the load is controlled by the delay angle oneach SCR. The six SCRs are turned on in the sequence 1-2-3-4-5-6, at 60inter-vals. Gate signals are maintained throughout the possible conduction angle.S2(a)(b)30¡(α)vanvanvAN60¡90¡120¡150¡180¡CcS5S6S3S4S1ABbRRRnaNvAB2vAC2Figure 5-7(a) Three-phase ac voltage controller with a Y-connected resistiveload; (b) Load voltage vanfor 30; (c) Load voltages and switch currentsfor a three-phase resistive load for 30; (d) Load voltage vanfor 75;(e) Load voltage vanfor 120. har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 183
184CHAPTER 5AC Voltage ControllersvanvbnvcniS1iS2iS3iS4iS5iS6(c)vANvAB2vAC2van75¡135¡195¡van(d)Figure 5-7(continued) har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 184
5.3Three-Phase Voltage Controllers185The instantaneous voltage across each phase of the load is determined bywhich SCRs are conducting. At any instant, three SCRs, two SCRs, or no SCRsare on. The instantaneous load voltages are either a line-to-neutral voltage (threeon), one-half of a line-to-line voltage (two on), or zero (none on).When three SCRs are on (one in each phase), all three phase voltages are con-nected to the source, corresponding to a balanced three-phase source connected toa balanced three-phase load. The voltage across each phase of the load is the cor-responding line-to-neutral voltage. For example, if S1, S2, and S6are on, vanvAN,vbnvBN, and vcnvCN. When two SCRs are on, the line-to-line voltage of thosetwo phases is equally divided between the two load resistors that are connected.For example, if only S1and S2are on, vanvAC/2, vcnvCA/2, and vbn0.Which SCRs are conducting depends on the delay angle and on the sourcevoltages at a particular instant. The following are the ranges of that produceparticular types of load voltages with an example for each:For 0 60:Two or three SCRs conduct at any one time for this range of . Figure 5-7bshows the load line-to-neutral voltage vanfor 30. At t0, S5and S6areconducting and there is no current in Ra, making van 0. At t/6 (30),S1receives a gate signal and begins to conduct; S5and S6remain on, and vanvAN. The current in S5reaches zero at 60, turning S5off. With S1and S6remaining on, vanvAB/2. At 90, S2is turned on; the three SCRs S1, S2, andS6are then on; and vanvAN. At 120, S6turns off, leaving S1and S2on, so vanvAC/2. As the Þring sequence for the SCRs proceeds, the number ofSCRson at a particular instant alternates between 2 and 3. All three phase-to-neutral load voltages and switch currents are shown in Fig. 5-7c. For intervalsto exist when three SCRs are on, the delay angle must be less than 60.For 6090:Only two SCRs conduct at any one time when the delay angle is between60 and 90. Load voltage vanfor 75is shown in Fig. 5-7d. JustvanvANvAB2vAC2van(e)120¡150¡180¡210¡Figure 5-7(continued)har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 185
186CHAPTER 5AC Voltage Controllersprior to 75, S5and S6are conducting, and van0. When S1is turned on at75, S6continues to conduct, but S5must turn off because vCNis negative.Voltage vanis then vAB/2. When S2is turned on at 135, S6is forced off, andvanvAC/2. The next SCR to turn on is S3, which forces S1off, and van0. One SCR is always forced off when an SCR is turned on for in thisrange. Load voltages are one-half line-to-line voltages or zero.For 90150:Only two SCRs can conduct at any one time in this mode. Additionally, thereare intervals when no SCRs conduct. Figure 5-7eshows the load voltage vanfor 120. In the interval just prior to 120, no SCRs are on, and van0.At 120, S1is given a gate signal, and S6still has a gate signal applied.Since vABis positive, both S1and S6are forward-biased and begin to conduct,and vanvAB/2. Both S1and S6turn off when vABbecomes negative. When agate signal is applied to S2, it turns on, and S1turns on again.For 150, there is no time interval when an SCR is forward-biased while agate signal is applied. Output voltage is zero for this condition.Normalized output voltage vs. delay angle is shown in Fig. 5-8. Note that adelay angle of zero corresponds to the load being connected directly to the0Delay Angle (Degrees)Output VoltageNormalized Output Voltage0200.20.40.60.81.0406080100140120Figure 5-8Normalized rms output voltage for a three-phaseac voltage controller with a resistive load.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 186
5.3Three-Phase Voltage Controllers187three-phase source. The range of output voltage for the three-phase voltage con-troller is between full source voltage and zero.Harmonic currents in the load and line for the three-phase ac voltage con-troller are the odd harmonics of order 6n1, n1, 2, 3, . . . (that is, 5th, 7th,11th, 13th). . . . Harmonic Þlters may be required in some applications to preventharmonic currents from propagating into the ac system.Since analysis of the three-phase ac voltage controller is cumbersome, sim-ulation is a practical means of obtaining rms output voltages and power deliveredto a load. PSpice simulation is presented in Example 5-4.Y-Connected RLLoadThe load voltages for a three-phase voltage controller with an RLload are againcharacterized by being a line-to-neutral voltage, one-half of a line-to-line volt-age, or zero. The analysis is much more difÞcult for an RLload than for a resis-tive load, and simulation provides results that would be extremely difÞcult toobtain analytically. Example 5-4 illustrates the use of PSpice for a three-phase acvoltage controller.PSpice Simulation of a Three-Phase Voltage ControllerUse PSpice to obtain the power delivered to a Y-connected three-phase load. Each phaseof the load is a series RLcombination with R10 and L30 mH. The three-phasesource is 480 Vrms line-to-line at 60 Hz, and the delay angle is 75. Determine the rmsvalue of the line currents, the power absorbed by the load, the power absorbed by theSCRs, and the total harmonic distortion (THD) of the source currents.■SolutionAPSpice A/D input Þle for the Y-connected three-phase voltage controller with an RLload is as follows:THREE-PHASE VOLTAGE CONTROLLERÐR-L LOAD (3phvc.cir)*SOURCE AND LOAD ARE Y-CONNECTED (UNGROUNDED)********************** INPUT PARAMETERS ****************************.PARAM Vs 480; rms line-to-line voltage.PARAM ALPHA 75; delay angle in degrees.PARAM R 10; load resistance (y-connected).PARAM L 30mH; load inductance.PARAM F 60; source frequency********************** COMPUTED PARAMETERS **************************.PARAM Vm {Vs*SQRT(2)/SQRT(3)}; convert to peak line-neutral volts.PARAM DLAY {1/(6*F)}; switching interval is 1/6 period.PARAM PW {.5/F} TALPHA{ALPHA/(F*360)}.PARAM TRF 10US; rise and fall time for pulse switch controlEXAMPLE 5-4har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 187
188CHAPTER 5AC Voltage Controllers*********************** THREE-PHASE SOURCE **************************VAN 1 0 SIN(0 {VM} 60)VBN 2 0 SIN(0 {VM} 60 0 0 -120)VCN 3 0 SIN(0 {VM} 60 0 0 -240)***************************** SWITCHES ********************************S1 1 8 18 0 SMOD; A-phaseD1 8 4 DMODS4 4 9 19 0 SMODD4 9 1 DMODS3 2 10 20 0 SMOD; B-phaseD3 10 5 DMODS6 5 11 21 0 SMODD6 11 2 DMODS5 3 12 22 0 SMOD; C-phaseD5 12 6 DMODS2 6 13 23 0 SMODD2 13 3 DMOD***************************** LOAD **********************************RA 4 4A {R}; van v(4,7)LA 4A 7 {L}RB 5 5A {R}; vbn v(5,7)LB 5A 7 {L}RC 6 6A {R}; vcn v(6,7)LC 6A 7 {L}************************* SWITCH CONTROL *****************************V1 18 0 PULSE(-10 10 {TALPHA}{TRF}{TRF}{PW}{1/F})V4 19 0 PULSE(-10 10 {TALPHA+3*DLAY}{TRF}{TRF}{PW}{1/F})V3 20 0 PULSE(-10 10 {TALPHA+2*DLAY}{TRF}{TRF}{PW}{1/F})V6 21 0 PULSE(-10 10 {TALPHA+5*DLAY}{TRF}{TRF}{PW}{1/F})V5 22 0 PULSE(-10 10 {TALPHA+4*DLAY}{TRF}{TRF}{PW}{1/F})V2 23 0 PULSE(-10 10 {TALPHA+DLAY}{TRF}{TRF}{PW}{1/F})************************ MODELS AND COMMANDS *************************.MODEL SMOD VSWITCH(RON0.01).MODEL DMOD D.TRAN .1MS 50MS 16.67ms .05MS UIC.FOUR 60 I(RA); Fourier analysis of line current.PROBE.OPTIONS NOPAGE ITL50.ENDProbe output of the steady-state current in one of the phases is shown in Fig. 5-9.The rms line current, load power, and power absorbed by the SCRs are obtained by en-tering the appropriate expression in Probe. The THD in the source current is determinedfrom the Fourier analysis in the output Þle. The results are summarized in the followingtable.QuantityExpressionResultRMS line currentRMS(I(RA))12.86 ALoad power3*AVG(V(4,7)*I(RA))4960 WTotal SCR power absorbed6*AVG(V(1,4)*I(S1))35.1 WTHD of source current(from the output Þle)13.1%har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 188
5.3Three-Phase Voltage Controllers189Delta-Connected Resistive LoadAthree-phase ac voltage controller with a delta-connected resistive load is shown inFig. 5-10a. The voltage across a load resistor is the corresponding line-to-line volt-age when a SCR in the phase is on. The delay angle is referenced to the zero cross-ing of the line-to-line voltage. SCRs are turned on in the sequence 1-2-3-4-5-6.The line current in each phase is the sum of two of the delta currents:(5-18)The relationship between rms line and delta currents depends on the conductionangle of the SCRs. For small conduction angles (large ), the delta currents donot overlap (Fig. 5-10b), and the rms line currents are(5-19)For large conduction angles (small ), the delta currents overlap (Fig. 5-10c),and the rms line current is larger than. In the limit when (0), thedelta currents and line currents are sinusoids. The rms line current is determinedfrom ordinary three-phase analysis.(5-20)The range of rms line current is therefore(5-21)depending on .12 I, rms IL, rms 13 I, rmsIL, rms13 I, rms 12IIL, rms12 I, rms iaiabicaibibciabicicaibc10 ms-20 A0 A20 A20 ms40 ms30 ms50 msA–PHASE CURRENTTimeI (RA)Figure 5-9Probe output for Example 5-4.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 189
190CHAPTER 5AC Voltage ControllersS1S5RRABC(a)RS4iaibiciabicaia = iab – ica icaiabibc(c)S2S3S6(b)iabicaia = iab – ica Figure 5-10(a) Three-phase acvoltage controller witha delta-connectedresistive load; (b) Current waveformsfor 130; (c) Current waveformsfor 90.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 190
5.5Static VAR Control191Use of the delta-connected three-phase voltage controller requires the load to bebroken to allow thyristors to be inserted in each phase, which is often not feasible.5.4INDUCTION MOTOR SPEED CONTROLSquirrel-cage induction motor speed can be controlled by varying the voltageand/or frequency. The ac voltage controller is suitable for some speed controlapplications. The torque produced by an induction motor is proportional to thesquare of the applied voltage. Typical torque-speed curves for an inductionmotor are shown in Fig. 5-11. If a load has a torque-speed characteristic like thatalso shown in Fig. 5-11, speed can be controlled by adjusting the motor voltage.Operating speed corresponds to the intersection of the torque-speed curves of themotor and the load. Afan or pump is a suitable load for this type of speed con-trol, where the torque requirement is approximately proportional to the square ofthe speed.Single-phase induction motors are controlled with the circuit of Fig. 5-4a, andthree-phase motors are controlled with the circuit of Fig. 5-7a. Energy efÞciencyis poor when using this type of control, especially at low speeds. The large slip atlow speeds results in large rotor losses. Typical applications exist where the loadis small, such as single-phase fractional-horsepower motors, or where the time oflow-speed operation is short. Motor speed control using a variable-frequencysource from an inverter circuit (Chap. 8) is usually a preferred method.5.5STATIC VAR CONTROLCapacitors are routinely placed in parallel with inductive loads for power factorimprovement. If a load has a constant reactive voltampere (VAR) requirement, aÞxed capacitor can be selected to correct the power factor to unity. However, if av1LoadSpeedv2v3w3w2w1TorqueFigure 5-11Torque-speed curves for an induction motor.har80679_ch05_171-195.qxd 12/17/09 2:40 PM Page 191
192CHAPTER 5AC Voltage Controllersload has a varying VAR requirement, the Þxed-capacitor arrangement results ina changing power factor.The circuit of Fig. 5-12represents an application of an ac voltage controllerto maintain a unity power factor for varying load VAR requirements. The powerfactor correction capacitance supplies a Þxed amount of reactive power, gener-ally greater than required by the load. The parallel inductance absorbs a variableamount of reactive power, depending on the delay angle of the SCRs. The netreactive power supplied by the inductor-capacitor combination is controlled tomatch that absorbed by the load. As the VAR requirement of the load changes,the delay angle is adjusted to maintain unity power factor. This type of powerfactor correction is known as static VAR control.The SCRs are placed in the inductor branch rather than in the capacitor branchbecause very high currents could result from switching a capacitor with a SCR.Static VAR control has the advantage of being able to adjust to changingload requirements very quickly. Reactive power is continuously adjustable withstatic VAR control, rather than having discrete levels as with capacitor bankswhich are switched in and out with circuit breakers. Static VAR control is be-coming increasingly prevalent in installations with rapidly varying reactivepower requirements, such as electric arc furnaces. Filters are generally requiredto remove the harmonic currents generated by the switched inductance.5.6Summary¥Voltage controllers use electronic switches to connect and disconnect a load to anac source at regular intervals. This type of circuit is classiÞed as an ac-ac converter.¥Voltage controllers are used in applications such as single-phase light-dimmercircuits, single-phase or three-phase induction motor control, and static VAR control.¥The delay angle for the thyristors controls the time interval for the switch being onand thereby controls the effective value of voltage at the load. The range of controlfor load voltage is between full ac source voltage and zero.¥An ac voltage controller can be designed to function in either the fully on or fullyoff mode. This application is used as a solid-state relay.¥The load and source current and voltage in ac voltage controller circuits maycontain signiÞcant harmonics. For equal delay angles in the positive and negativehalf-cycles, the average source current is zero, and only odd harmonics exist.LoadLCFigure 5-12Static VAR control.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 192
Problems193¥Three-phase voltage controllers can have Y- or -connected loads.¥Simulation of single-phase or three-phase voltage controllers provides an efÞcientanalysis method.5.7BibliographyB. K. Bose, Power Electronics and Motor Drives: Advances and Trends, AcademicPress, New York, 2006.A. K. Chattopadhyay, Power Electronics Handbook, edited by M. H. Rashid, AcademicPress, New York, 2001, Chapter 16.M. A. El-Sharkawi, Fundamentals of Electric Drives, Brooks/Cole, PaciÞc Grove,Calif., 2000.B. M. Han and S. I. Moon, ÒStatic Reactive-Power Compensator Using Soft-SwitchingCurrent-Source Inverter,Ó IEEE Transactions on Power Electronics, vol. 48, no. 6,December 2001.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters,Applications, and Design,3d ed., Wiley, New York, 2003.M. H. Rashid, Power Electronics: Circuits, Devices, and Systems,3d ed., Prentice-Hall,Upper Saddle River, N. J., 2004.R. Valentine, Motor Control Electronics Handbook, McGraw-Hill, New York, 1996.B. Wu, High-Power Converters and AC Drives, Wiley, New York, 2006.ProblemsSingle-phase Voltage Controllers5-1.The single-phase ac voltage controller of Fig. 5-1ahas a 480-Vrms 60-Hzsource and a load resistance of 50 . The delay angle is 60. Determine (a) therms load voltage, (b) the power absorbed by the load, (c) the power factor, (e) theaverage and rms currents in the SCRs, and (f) the THD of the source current.5-2.The single-phase ac voltage controller of Fig. 5-1ahas a 120-Vrms 60-Hzsource and a load resistance of 20 . The delay angle is 45. Determine (a) therms load voltage, (b) the power absorbed by the load, (c) the power factor, (d) theaverage and rms currents in the SCRs, and (e) the THD of the source current.5-3.The single-phase ac voltage controller of Fig. 5-1ahas a 240-Vrms source and aload resistance of 35 . (a) Determine the delay angle required to deliver 800 Wto the load. (b) Determine the rms current in each SCR. (c) Determine the powerfactor.5-4.Aresistive load absorbs 200 Wwhen connected to a 120-Vrms 60-Hz ac voltagesource. Design a circuit which will result in 200 Wabsorbed by the sameresistance when the source is 240 Vrms at 60 Hz. What is the peak load voltagein each case?5-5.The single-phase ac voltage controller of Fig. 5-1ahas a 120-Vrms source at 60 Hzand a load resistance of 40 . Determine the range of so that the output powercan be controlled from 200 to 400 W. Determine the range of power factor thatwill result.5-6.Design a circuit to deliver power in the range of 750 to 1500 Wto a 32-resistorfrom a 240-Vrms 60-Hz source. Determine the maximum rms and average currentsin the switching devices, and determine the maximum voltage across the devices.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 193
194CHAPTER 5AC Voltage Controllers5-7.Design a circuit to deliver a constant 1200 Wof power to a load that varies inresistance from 20 to 40 . The ac source is 240 Vrms, 60 Hz. Determine themaximum rms and average currents in the devices, and determine the maximumvoltage across the devices.5-8.Design a light-dimmer for a 120-V, 100-Wincandescent lightbulb. The source is120 Vrms, 60 Hz. Specify the delay angle for the triac to produce an outputpower of (a) 75 W(b) 25 W. Assume that the bulb is a load of constant resistance.5-9.Asingle-phase ac voltage controller is similar to Fig. 5-1aexcept that S2isreplaced with a diode. S1operates at a delay angle . Determine (a) anexpression for rms load voltage as a function of and Vmand (b) the range ofrms voltage across a resistive load for this circuit.5-10.The single-phase ac voltage controller of Fig. 5-1ais operated with unequaldelays on the two SCRs (12). Derive expressions for the rms load voltageand average load voltage in terms of Vm, 1, and 2.5-11.The single-phase ac voltage controller of Fig. 5-4ahas a 120-Vrms 60-Hz source.The series RLload has R18 and L30 mH. The delay angle 60.Determine (a) an expression for current, (b) rms load current, (c) rms current ineach of the SCRs, and (d) power absorbed by the load. (e) Sketch the waveformsof output voltage and voltage across the SCRs.5-12.The single-phase ac voltage controller of Fig. 5-4ahas a 120-Vrms 60-Hzsource. The RLload has R22 and L40 mH. The delay angle 50.Determine (a) an expression for current, (b) rms load current, (c) rms current ineach of the SCRs, and (d) power absorbed by the load. (e) Sketch the waveformsof output voltage and voltage across the SCRs.5-13.The single-phase ac voltage controller of Fig. 5-4ahas a 120-Vrms 60-Hzsource. The RLload has R12 and L24 mH. The delay angle is 115.Determine the rms load current.5-14.The single-phase ac voltage controller of Fig. 5-4ahas a 120-Vrms 60-Hz source.The RLload has R12 and L20 mH. The delay angle is 70. (a) Determinethe power absorbed by the load for ideal SCRs. (b) Determine the power in the loadfrom a PSpice simulation. Use the default diode and Ron0.1 in the SCR model.(c) Determine the THD of the source current from the PSpice output.5-15.Use PSpice to determine the delay angle required in the voltage controller ofFig. 5-4ato deliver (a) 400 W, and (b) 700 Wto an RLload with R15 andL15 mH from a 120-Vrms 60-Hz source.5-16.Use PSpice to determine the delay angle required in the voltage controller of Fig. 5-4ato deliver (a) 600 W, and (b) 1000 Wto an RLload with R25 andL60 mH from a 240-Vrms 60-Hz source.5-17.Design a circuit to deliver 250 Wto an RLseries load, where R24 and L35 mH. The source is 120 Vrms at 60 Hz. Specify the rms and averagecurrents in the devices. Specify the maximum voltage across the devices.Three-phase Voltage Controllers5-18.The three-phase voltage controller of Fig. 5-7ahas a 480-Vrms line-to-linesource and a resistive load with 35 in each phase. Simulate the circuit inPSpice to determine the power absorbed by the load if the delay angle is (a) 20, (b) 80, and (c) 115.har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 194
Problems1955-19.The three-phase Y-connected voltage controller has a 240-Vrms, 60-Hz line-to-line source. The load in each phase is a series RLcombination with R16 and L50 mH. The delay angle is 90. Simulate the circuit in PSpice todetermine the power absorbed by the load. On a graph of one period of A-phasecurrent, indicate the intervals when each SCR conducts. Do your analysis forsteady-state current.5-20.For the delta-connected resistive load in the three-phase voltage controller of Fig. 5-10, determine the smallest delay angle such that the rms line current isdescribed by Ilinermsrms.5-21.Modify the PSpice circuit Þle for the three-phase controller for analysis of adelta-connected load. Determine the rms values of the delta currents and the linecurrents for a 480-Vrms source, a resistive load of R25 in each phase, anda delay angle of 45. Hand in a Probe output showing iaband ia.5-22.Athree-phase ac voltage controller has a 480-Vrms, 60-Hz source. The load isY-connected, and each phase has series RLC combination with R14 , L10 mH, and C1 F. The delay angle is 70. Use PSpice to determine (a) therms load current, (b) the power absorbed by the load, and (c) the THD of the linecurrent. Also hand in a graph of one period of A-phase current, indicating whichSCRs are conducting at each time. Do your analysis for steady-state current.5-23.For a three-phase ac voltage controller with a Y-connected load, the voltageacross the S1-S4SCR pair is zero when either is on. In terms of the three-phasesource voltages, what is the voltage across the S1-S4pair when both are off?12Ihar80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 195
1CHAPTER196DC-DC ConvertersDc-dc converters are power electronic circuits that convert a dc voltage to a dif-ferent dc voltage level, often providing a regulated output. The circuits describedin this chapter are classiÞed as switched-mode dc-dc converters, also calledswitching power supplies or switchers. This chapter describes some basic dc-dcconverter circuits. Chapter 7 describes some common variations of these circuitsthat are used in many dc power supply designs.6.1LINEAR VOLTAGE REGULATORSBefore we discuss switched-mode converters, it is useful to review the motiva-tion for an alternative to linear dc-dc converters that was introduced in Chapt. 1.One method of converting a dc voltage to a lower dc voltage is a simple circuitas shown in Fig. 6-1. The output voltage iswhere the load current is controlled by the transistor. By adjusting the transistorbase current, the output voltage may be controlled over a range of 0 to roughlyVs. The base current can be adjusted to compensate for variations in the supplyvoltage or the load, thus regulating the output. This type of circuit is called a lin-ear dc-dc converter or a linear regulator because the transistor operates in the lin-ear region, rather than in the saturation or cutoff regions. The transistor in effectoperates as a variable resistance.While this may be a simple way of converting a dc supply voltage to a lowerdc voltage and regulating the output, the low efÞciency of this circuit is a seriousdrawback for power applications. The power absorbed by the load is VoIL, andVo ILRLCHAPTER6har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 196
6.2A Basic Switching Converter197the power absorbed by the transistor is VCEIL, assuming a small base current. Thepower loss in the transistor makes this circuit inefÞcient. For example, if the outputvoltage is one-quarter of the input voltage, the load resistor absorbs one-quarterofthe source power, which is an efÞciency of 25 percent. The transistor absorbs theother 75 percent of the power supplied by the source. Lower output voltagesresultin even lower efÞciencies. Therefore, the linear voltage regulator is suit-able only for low-power applications.6.2ABASIC SWITCHING CONVERTERAn efÞcient alternative to the linear regulator is the switching converter. In aswitching converter circuit, the transistor operates as an electronic switch bybeing completely on or completely off (saturation or cutoff for a BJTor the triodeand cutoff regions of a MOSFET). This circuit is also known as a dc chopper.Assuming the switch is ideal in Fig. 6-2, the output is the same as the inputwhen the switch is closed, and the output is zero when the switch is open. PeriodicFigure 6-1Abasic linear regulator.iLRLRLVCE++−−Vo+−Vs+−VsvoVsDT(1 − D)TTtRL+−vo+−VsRL+−vo+−Closed(a)(b)Open(c)0Figure 6-2(a) Abasic dc-dc switching converter; (b) Switchingequivalent; (c) Output voltage.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 197
198CHAPTER 6DC-DC Convertersopening and closing of the switch results in the pulse output shown in Fig. 6-2c.The average or dc component of the output voltage is(6-1)The dc component of the output voltage is controlled by adjusting the duty ratioD, which is the fraction of the switching period that the switch is closed(6-2)where fis the switching frequency. The dc component of the output voltage willbe less than or equal to the input voltage for this circuit.The power absorbed by the ideal switch is zero. When the switch is open, thereis no current in it; when the switch is closed, there is no voltage across it. Therefore,all power is absorbed by the load, and the energy efÞciency is 100 percent. Losseswill occur in a real switch because the voltage across it will not be zero when it ison, and the switch must pass through the linear region when making a transitionfrom one state to the other.6.3THE BUCK (STEP-DOWN) CONVERTERControlling the dc component of a pulsed output voltage of the type in Fig. 6-2cmay be sufÞcient for some applications, such as controlling the speed of a dcmotor, but often the objective is to produce an output that is purely dc. One way ofobtaining a dc output from the circuit of Fig. 6-2ais to insert a low-pass Þlter afterthe switch. Figure 6-3ashows an LClow-pass Þlter added to the basic converter.The diode provides a path for the inductor current when the switch is opened andis reverse-biased when the switch is closed. This circuit is called a buck converteror a step-down converterbecause the output voltage is less than the input.Voltage and Current RelationshipsIf the low-pass Þlter is ideal, the output voltage is the average of the input voltageto the Þlter. The input to the Þlter, vxin Fig. 6-3a, is Vswhen the switch is closedand is zero when the switch is open, provided that the inductor current remainspositive, keeping the diode on. If the switch is closed periodically at a duty ratioD,the average voltage at the Þlter input is VsD, as in Eq. (6-1).This analysis assumes that the diode remains forward-biased for the entiretime when the switch is open, implying that the inductor current remains positive.An inductor current that remains positive throughout the switching period isknown as continuous current. Conversely, discontinuous current is characterizedby the inductor currentÕs returning to zero during each period.DKtontontofftonTtonfVo1T3T0vo(t)dt1T3DT0VsdtVsDhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 198
6.3The Buck (Step-Down) Converter199Another way of analyzing the operation of the buck converter of Fig. 6-3aisto examine the inductor voltage and current. This analysis method will proveuseful for designing the Þlter and for analyzing circuits that are presented later inthis chapter.Buck converters and dc-dc converters in general, have the following proper-ties when operating in the steady state:1.The inductor current is periodic.(6-3)2.The average inductor voltage is zero (see Sec. 2.3).(6-4)VL1T3tTtvL(l)dl0iL(tT)iL(t) Figure 6-3(a) Buck dc-dc converter; (b) Equivalentcircuit for the switch closed; (c) Equivalent circuitfor the switch open.Vs+-Vo+-(b)vL = Vs – Vovx = Vs++–(a)iLvLiCiRvx++–Vs+-Vo+-Vs+-Vo+-(c)vL = -Vo vx = 0 ++–har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 199
200CHAPTER 6DC-DC Converters3.The average capacitor current is zero (see Sec. 2.3).(6-5)4.The power supplied by the source is the same as the power delivered to theload. For nonideal components, the source also supplies the losses.(6-6)Analysis of the buck converter of Fig. 6-3abegins by making these assumptions:1.The circuit is operating in the steady state.2.The inductor current is continuous (always positive).3.The capacitor is very large, and the output voltage is held constant at volt-age Vo. This restriction will be relaxed later to show the effects of Þnitecapacitance.4.The switching period is T; the switch is closed for time DTand open for time(1D)T.5.The components are ideal.The key to the analysis for determining the output Vois to examine the inductorcurrent and inductor voltage Þrst for the switch closed and then for the switchopen. The net change in inductor current over one period must be zero for steady-state operation. The average inductor voltage is zero.Analysis forthe Switch ClosedWhen the switch is closed in the buck convertercircuit of Fig. 6-3a, the diode is reverse-biased and Fig. 6-3bis an equivalent cir-cuit. The voltage across the inductor isRearranging,Since the derivative of the current is a positive constant, the current increases lin-early as shown in Fig. 6-4b. The change in current while the switch is closed iscomputed by modifying the preceding equation.(6-7)(iL)closedaVsVoLbDTdiLdtiLtiLDTVsVoLdiLdtVsVoL switch closedvLVsVoL diLdtPsPolosses nonidealPsPo idealIC1T3tTtiC(l)dl0har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 200
6.3The Buck (Step-Down) Converter201Analysis forthe Switch OpenWhen the switch is open, the diode becomesforward-biased to carry the inductor current and the equivalent circuit of Fig. 6-3capplies. The voltage across the inductor when the switch is open isRearranging,The derivative of current in the inductor is a negative constant, and the currentdecreases linearly as shown in Fig. 6-4b. The change in inductor current whenthe switch is open is(6-8)(iL)openaVoLb(1D)TiLtiL(1D)TVoLdiLdtVoL switch openvLVoL diLdtFigure 6-4Buck converter waveforms: (a) Inductor voltage; (b) Inductor current; (c) Capacitor current.ΔiLΔiLiCttTDTIminiLvL−VoVs − VoImaxtIR(a)(b)(c)har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 201
202CHAPTER 6DC-DC ConvertersSteady-state operation requires that the inductor current at the end of theswitching cycle be the same as that at the beginning, meaning that the net changein inductor current over one period is zero. This requiresUsing Eqs. (6-7) and (6-8),Solving for Vo,(6-9)which is the same result as Eq. (6-1). The buck converter produces an outputvoltage that is less than or equal to the input.An alternative derivation of the output voltage is based on the inductor volt-age, as shown in Fig. 6-4a. Since the average inductor voltage is zero for periodicoperation,Solving the preceding equation for Voyields the same result as Eq. (6-9), VoVsD.Note that the output voltage depends on only the input and the duty ratio D.If the input voltage ßuctuates, the output voltage can be regulated by adjustingthe duty ratio appropriately. Afeedback loop is required to sample the outputvoltage, compare it to a reference, and set the duty ratio of the switch accord-ingly. Regulation techniques are discussed in Chap. 7.The average inductor current must be the same as the average current in the loadresistor, since the average capacitor current must be zero for steady-state operation:(6-10)Since the change in inductor current is known from Eqs. (6-7) and (6-8), themaximum and minimum values of the inductor current are computed as(6-11)(6-12)where f1/Tis the switching frequency.VoR12cVoL(1D)TdVoa1R1D2LfbI min ILiL2VoR12cVoL(1D)TdVoa1R1D2LfbI max ILiL2ILIRVoRVL(VsVo)DT(Vo)(1D)T0VoVsDaVsVoLb(DT)aVoLb(1D)T0(iL)closed(iL)open0har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 202
6.3The Buck (Step-Down) Converter203For the preceding analysis to be valid, continuous current in the inductor mustbe veriÞed. An easy check for continuous current is to calculate the minimuminductor current from Eq. (6-12). Since the minimum value of inductor currentmust be positive for continuous current, a negative minimum calculated fromEq. (6-12) is not allowed due to the diode and indicates discontinuous current. Thecircuit will operate for discontinuous inductor current, but the preceding analysis isnot valid. Discontinuous-current operation is discussed later in this chapter.Equation (6-12) can be used to determine the combination of Land fthat willresult in continuous current. Since Imin0 is the boundary between continuousand discontinuous current,(6-13)If the desired switching frequency is established,(6-14)where Lminis the minimum inductance required for continuous current. In practice,a value of inductance greater than Lminis desirable to ensure continuous current.In the design of a buck converter, the peak-to-peak variation in the inductorcurrent is often used as a design criterion. Equation (6-7) can be combined withEq. (6-9) to determine the value of inductance for a speciÞed peak-to-peak inductorcurrent for continuous-current operation:(6-15)or(6-16)Since the converter components are assumed to be ideal, the power supplied bythe source must be the same as the power absorbed by the load resistor.(6-17)orNote that the preceding relationship is similar to the voltage-current relationshipfor a transformer in ac applications. Therefore, the buck converter circuit isequivalent to a dc transformer.VoVsIsIoVsIsVoIoPsPoLaVsVoiLfbDVo(1D)iLfiLaVsVoLbDTaVsVoLfbDVo(1D)LfL min (1D)R2f for continuous current(Lf) min (1D)R2I min 0Voa1R1D2Lfbhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 203
204CHAPTER 6DC-DC ConvertersOutput Voltage RippleIn the preceding analysis, the capacitor was assumed to be very large to keep theoutput voltage constant. In practice, the output voltage cannot be kept perfectlyconstant with a Þnite capacitance. The variation in output voltage, or ripple, iscomputed from the voltage-current relationship of the capacitor. The current inthe capacitor isshown in Fig. 6-5a.While the capacitor current is positive, the capacitor is charging. From thedeÞnition of capacitance,The change in charge Qis the area of the triangle above the time axisresulting inVoTiL8C Q12aT2baiL2bTiL8VoQCQCVoQCVoiCiLiRFigure 6-5Buck converter waveforms. (a) Capacitor current;(b) Capacitor ripple voltage.ΔVovoVot(b)iCTt2(a)ΔiL2ΔQhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 204
6.3The Buck (Step-Down) Converter205Using Eq. (6-8) for iL,(6-18)In this equation, Vois the peak-to-peak ripple voltage at the output, as shown inFig. 6-5b. It is also useful to express the ripple as a fraction of the output voltage,(6-19)In design, it is useful to rearrange the preceding equation to express requiredcapacitance in terms of speciÞed voltage ripple:(6-20)If the ripple is not large, the assumption of a constant output voltage is reason-able and the preceding analysis is essentially valid.Buck ConverterThe buck dc-dc converter of Fig. 6-3ahas the following parameters:Vs50 VD0.4L400 HC100 Ff20 kHzR20 Assuming ideal components, calculate (a) the output voltage Vo, (b) the maximum andminimum inductor current, and (c) the output voltage ripple.■Solution(a)The inductor current is assumed to be continuous, and the output voltage iscomputed from Eq. (6-9),(b)Maximum and minimum inductor currents are computed from Eqs. (6-11) and (6-12).11.521.75A20c12010.42(400)(10)6(20)(10)3dI max Voa1R 1D2LfbVoVsD(50)(0.4)20VC1D8L(Vo>Vo)f2VoVo1D8LCf2VoT8CVoL(1D)TVo(1D)8LCf2EXAMPLE 6-1har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 205
206CHAPTER 6DC-DC ConvertersThe average inductor current is 1 A, and iL1.5 A. Note that the minimum inductorcurrent is positive, verifying that the assumption of continuous current was valid.(c)The output voltage ripple is computed from Eq. (6-19).Since the output ripple is sufÞciently small, the assumption of a constant outputvoltage was reasonable.CapacitorResistanceÑThe Effect on Ripple VoltageThe output voltage ripple in Eqs. (6-18) and (6-19) is based on an ideal capaci-tor. Areal capacitor can be modeled as a capacitance with an equivalent series re-sistance (ESR) and an equivalent series inductance (ESL). The ESR may have asigniÞcant effect on the output voltage ripple, often producing a ripple voltagegreater than that of the ideal capacitance. The inductance in the capacitor is usu-ally not a signiÞcant factor at typical switching frequencies. Figure 6.6 shows acapacitor model that is appropriate for most applications.The ripple due to the ESR can be approximated by Þrst determining the cur-rent in the capacitor, assuming the capacitor to be ideal. For the buck converterin the continuous-current mode, capacitor current is the triangular current wave-form of Fig. 6-4c. The voltage variation across the capacitor resistance is(6-21)To estimate a worst-case condition, one could assume that the peak-to-peak ripplevoltage due to the ESR algebraically adds to the ripple due to the capacitance. How-ever, the peaks of the capacitor and the ESR ripple voltages will not coincide, so(6-22)where Vo,Cis Voin Eq. (6-18). The ripple voltage due to the ESR can be muchlarger than the ripple due to the pure capacitance. In that case, the output capacitor ischosen on the basis of the equivalent series resistance rather than capacitance only.(6-23)VoLVo,ESRiCrCVoVo,CVo,ESRVo,ESRiCrCiLrC 0.004690.469%VoVo1D8LCf210.48(400)(10)6(100)(10)6(20,000)211.520.25 AI min Voa1R1D2Lfb+−+−ΔVo,CΔiCCrCΔVo, ESRFigure 6-6Amodel for thecapacitor including the equivalentseries resistance (ESR).har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 206
6.4Design Considerations207Capacitor ESR is inversely proportional to the capacitance valueÑa larger ca-pacitance results in a lower ESR. Manufacturers provide what are known as low-ESR capacitorsfor power supply applications.In Example 6-1, the 100-F capacitor may have an ESR of rC0.1 . Theripple voltage due to the ESR is calculated asExpressed as a percent, Vo/Vois 0.15/20 0.75 percent. The total ripple canthen be approximated as 0.75 percent.Synchronous RectiÞcation forthe Buck ConverterMany buck converters use a second MOSFETin place of the diode. When S2is onand S1is off, current ßows upward out of the drain of S2. The advantage of this con-Þguration is that the second MOSFETwill have a much lower voltage drop acrossit compared to a diode, resulting in higher circuit efÞciency. This is especially im-portant in low-voltage, high-current applications. AShottky diode would have avoltage of 0.3 to 0.4 Vacross it while conducting, whereas a MOSFETwill havean extremely low voltage drop due to an RDSonas low as single-digit milliohms.This circuit has a control scheme known as synchronous switching, orsynchronousrectiÞcation. The second MOSFETis known as a synchronous rectiÞer. The twoMOSFETs must not be on at the same time to prevent a short circuit across thesource, so a Òdead timeÓ is built into the switching controlÑone MOSFETisturned off before the other is turned on. Adiode is placed in parallel with the sec-ond MOSFETto provide a conducting path for inductor current during the deadtime when both MOSFETs are off. This diode may be the MOSFETbody diode, orit may be an extra diode, most likely a Shottky diode, for improved switching. Thesynchronous buck converter should be operated in the continuous-current modebecause the MOSFETwould allow the inductor current to go negative.Other converter topologies presented in this chapter and in Chap. 7 can uti-lize MOSFETs in place of diodes.6.4DESIGN CONSIDERATIONSMost buck converters are designed for continuous-current operation. Thechoice of switching frequency and inductance to give continuous current isgiven by Eq. (6-13), and the output voltage ripple is described by Eqs. (6-16)and (6-21). Note that as the switching frequency increases, the minimum size ofthe inductor to produce continuous current and the minimum size of the capac-itor to limit output ripple both decrease. Therefore, high switching frequenciesare desirable to reduce the size of both the inductor and the capacitor.The tradeoff for high switching frequencies is increased power loss in theswitches, which is discussed later in this chapter and in Chap. 10. Increased powerloss in the switches means that heat is produced. This decreases the converterÕs ef-Þciency and may require a large heat sink, offsetting the reduction in size of theinductor and capacitor. Typical switching frequencies are above 20 kHz to avoidaudio noise, and they extend well into the 100s of kilohertz and into the megahertzrange. Some designers consider about 500 kHz to be the best compromiseVo,ESRiCrCiLrC(1.5 A)(0.1 Æ)0.15 Vhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 207
208CHAPTER 6DC-DC Convertersbetween small component size and efÞciency. Other designers prefer to use lowerswitching frequencies of about 50 kHz to keep switching losses small, while stillothers prefer frequencies larger than 1 MHz. As switching devices improve,switching frequencies will increase.For low-voltage, high-current applications, the synchronous rectiÞcationscheme of Fig. 6-7is preferred over using a diode for the second switch. The volt-age across the conducting MOSFETwill be much less than that across a diode, re-sulting in lower losses.The inductor value should be larger than Lminin Eq. (6-14) to ensure continuous-current operation. Some designers select a value 25 percent larger than Lmin. Otherdesigners use different criteria, such as setting the inductor current variation,iLin Eq. (6-15), to a desired value, such as 40 percent of the average inductor cur-rent. Asmaller iLresults in lower peak and rms inductor currents and a lowerrms capacitor current but requires a larger inductor.The inductor wire must be rated at the rms current, and the core should notsaturate for peak inductor current. The capacitor must be selected to limit the out-put ripple to the design speciÞcations, to withstand peak output voltage, and tocarry the required rms current.The switch (usually a MOSFETwith a low RDSon) and diode (or secondMOSFETfor synchronous rectiÞcation) must withstand maximum voltage stresswhen off and maximum current when on. The temperature ratings must not beexceeded, often requiring a heat sink.Assuming ideal switches and an ideal inductor in the initial design is usuallyreasonable. However, the ESR of the capacitor should be included because it typi-cally gives a more signiÞcant output voltage ripple than the ideal device andgreatly inßuences the choice of capacitor size.Buck Converter Design 1Design a buck converter to produce an output voltage of 18 Vacross a 10-load resistor.The output voltage ripple must not exceed 0.5 percent. The dc supply is 48 V. Design forcontinuous inductor current. Specify the duty ratio, the switching frequency, the values ofthe inductor and capacitor, the peak voltage rating of each device, and the rms current inthe inductor and capacitor. Assume ideal components.EXAMPLE 6-2S1S2+-Figure 6-7Asynchronous buck converter. TheMOSFETS2carries the inductor current when S1isoff to provide a lower voltage drop than a diode.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 208
6.4Design Considerations209■SolutionUsing the buck converter circuit in Fig. 6-3a, the duty ratio for continuous-current oper-ation is determined from Eq. (6-9):The switching frequency and inductor size must be selected for continuous-current oper-ation. Let the switching frequency arbitrarily be 40 kHz, which is well above the audiorange and is low enough to keep switching losses small. The minimum inductor size isdetermined from Eq. (6-14).Let the inductor be 25 percent larger than the minimum to ensure that inductor current iscontinuous.Average inductor current and the change in current are determined from Eqs. (6-10)and (6-17).The maximum and minimum inductor currents are determined from Eqs. (6-11) and (6-12).The inductor must be rated for rms current, which is computed as in Chap. 2 (see Exam-ple 2-8). For the offset triangular wave,The capacitor is selected using Eq. (6-20).Peak capacitor current is iL/2 1.44 A, and rms capacitor current for the triangular wave-form is 1.44/0.83 A. The maximum voltage across the switch and diode is Vs, or48 V.The inductor voltage when the switch is closed is VsVo48 18 30 V. Theinductor voltage when the switch is open is Vo18 V. Therefore, the inductor must with-stand 30 V. The capacitor must be rated for the 18-Voutput.13C1D8L(Vo>Vo)f210.3758(97.5)(10)6(0.005)(40,000)2100 FIL,rmsCI2L¢iL>213≤2C(1.8)2a1.4413b21.98 AI minILiL21.81.440.36 AI maxILiL21.81.443.24 AiLaVsVoLbDT481897.5(10)6(0.375)a140,000b2.88 AILVoR18101.8 AL1.25L min (1.25)(78 H)97.5HL min (1D)(R)2f(10.375)(10)2(40,000)78HDVoVs18480.375har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 209
210CHAPTER 6DC-DC ConvertersBuck Converter Design 2Power supplies for telecommunications applications may require high currents at lowvoltages. Design a buck converter that has an input voltage of 3.3 Vand an output volt-age of 1.2 V. The output current varies between 4 and 6 A. The output voltage ripple mustnot exceed 2 percent. Specify the inductor value such that the peak-to-peak variation ininductor current does not exceed 40 percent of the average value. Determine the requiredrms current rating of the inductor and of the capacitor. Determine the maximum equiva-lent series resistance of the capacitor.■SolutionBecause of the low voltage and high output current in this application, the synchronous rec-tiÞcation buck converter of Fig. 6-7is used. The duty ratio is determined from Eq. (6-9).The switching frequency and inductor size must be selected for continuous-currentoperation. Let the switching frequency arbitrarily be 500 kHz to give a good tradeoffbetween small component size and low switching losses.The average inductor current is the same as the output current. Analyzing the circuitfor an output current of 4 A,Using Eq. (6-16),Analyzing the circuit for an output current of 6 A,resulting inSince 0.636 H would be too small for the 4-Aoutput, use L0.955 H, which wouldbe rounded to 1 H.Inductor rms current is determined fromIL,rmsCI2LaiL>213b2LaVsVoiLfbD3.31.2(2.4)(500,000) (0.364)0.636 HiL(40%)(6)2.4 AILIo6ALaVsVoiLfbD3.31.2(1.6)(500,000) (0.364)0.955 HiL(40%)(4)1.6 AILIo4 ADVoVs1.23.30.364EXAMPLE 6-3har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 210
6.5The Boost Converter211(see Chap. 2). From Eq. (6-15), the variation in inductor current is 1.6 Afor each outputcurrent. Using the 6-Aoutput current, the inductor must be rated for an rms current ofNote that the average inductor current would be a good approximation to the rms currentsince the variation is relatively small.Using L1 H in Eq. (6-20), the minimum capacitance is determined asThe allowable output voltage ripple of 2 percent is (0.02)(1.2) 24 mV. The maximumESR is computed from Eq. (6-23).orAt this point, the designer would search manufacturerÕs speciÞcations for a capaci-tor having 15-mESR. The capacitor may have to be much larger than the calculatedvalue of 0.16 F to meet the ESR requirement. Peak capacitor current is iL/2 0.8 A,and rms capacitor current for the triangular waveform is 0.8/0.46 A.6.5THE BOOSTCONVERTERThe boost converter is shown in Fig. 6-8. This is another switching converter thatoperates by periodically opening and closing an electronic switch. It is called aboost converter because the output voltage is larger than the input.Voltage and Current RelationshipsThe analysis assumes the following:1.Steady-state conditions exist.2.The switching period is T, and the switch is closed for time DTand open for(1D)T.3.The inductor current is continuous (always positive).4.The capacitor is very large, and the output voltage is held constant at voltage Vo.5.The components are ideal.The analysis proceeds by examining the inductor voltage and current for theswitch closed and again for the switch open.13rCVoiC24 mV1.6 A15 mÆVoLrCiCrCiLC1D8L(Vo>Vo)f210.3648(1)(10)6 (0.02)(500,000)20.16 FIL, rmsC62a0.813b26.02 Ahar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 211
212CHAPTER 6DC-DC ConvertersAnalysis forthe Switch ClosedWhen the switch is closed, the diode is reverse-biased. KirchhoffÕs voltage law around the path containing the source, inductor,and closed switch is(6-24)The rate of change of current is a constant, so the current increases linearly whilethe switch is closed, as shown in Fig. 6-9b. The change in inductor current iscomputed fromSolving for iLfor the switch closed,(6-25)(iL)closedVsDTL iLtiLDTVsL vLVsL diLdt or diLdtVsL Figure 6-8The boost converter. (a) Circuit; (b) Equivalent circuit for the switch closed; (c) Equivalent circuit for the switch open.(a)(b)(c)iLvL = Vs Vo-++-Vs+-iLvL = VS – VoVo-++-Vs+-iDiLiCvLVo-++-Vs+-har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 212
6.5The Boost Converter213Analysis forthe Switch OpenWhen the switch is opened, the inductor currentcannot change instantaneously, so the diode becomes forward-biased to provide apath for inductor current. Assuming that the output voltage Vois a constant, thevoltage across the inductor isThe rate of change of inductor current is a constant, so the current must changelinearly while the switch is open. The change in inductor current while the switchis open isSolving for iL,(6-26)(iL)open(VsVo)(1D)TL iLtiL(1D)TVsVoLdiLdtVsVoLvLVsVoL diLdtΔiLΔQvLiDiCImaxIminVsDTClosed(a)(b)(c)(d)OpenTtDTDTDTTTtTttVs − VoiLImaxIminVoR−Figure 6-9Boost converter waveforms. (a) Inductor voltage; (b) Inductor current; (c) Diodecurrent; (d) Capacitor current.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 213
214CHAPTER 6DC-DC ConvertersFor steady-state operation, the net change in inductor current must be zero. UsingEqs. (6-25) and (6-26),Solving for Vo,(6-27)Also, the average inductor voltage must be zero for periodic operation. Express-ing the average inductor voltage over one switching period,Solving for Voyields the same result as in Eq. (6-27).Equation (6-27) shows that if the switch is always open and Dis zero, the out-put voltage is the same as the input. As the duty ratio is increased, the denominatorof Eq. (6-27) becomes smaller, resulting in a larger output voltage. The boost con-verter produces an output voltage that is greater than or equal to the input voltage.However, the output voltage cannot be less than the input, as was the case with thebuck converter.As the duty ratio of the switch approaches 1, the output voltage goes toinÞnity according to Eq. (6-27). However, Eq. (6-27) is based on ideal compo-nents.Real components that have losses will prevent such an occurrence, asshown later in this section. Figure 6-9shows the voltage and current waveformsfor the boost converter.The average current in the inductor is determined by recognizing that theaverage power supplied by the source must be the same as the average powerabsorbed by the load resistor. Output power isand input power is VsIsVsIL. Equating input and output powers and usingEq. (6-27),By solving for average inductor current and making various substitutions, ILcanbe expressed asVsILV2oR[Vs>(1D)]2RV2s(1D)2RPoV2oRVoIoVLVsD(VsVo)(1D)0VoVs1DVs(D1D)Vo(1D)0VsDTL(VsVo)(1D)TL0(iL)closed(iL)open0har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 214
6.5The Boost Converter215(6-28)Maximum and minimum inductor currents are determined by using the averagevalue and the change in current from Eq. (6-25).(6-29)(6-30)Equation (6-27) was developed with the assumption that the inductor currentis continuous, meaning that it is always positive. Acondition necessary for con-tinuous inductor current is for Iminto be positive. Therefore, the boundary be-tween continuous and discontinuous inductor current is determined fromorThe minimum combination of inductance and switching frequency for continu-ous current in the boost converter is therefore(6-31)or(6-32)Aboost converter designed for continuous-current operation will have an induc-tor value greater than Lmin.From a design perspective, it is useful to express Lin terms of a desired iL,(6-33)Output Voltage RippleThe preceding equations were developed on the assumption that the output volt-age was a constant, implying an inÞnite capacitance. In practice, a Þnite capaci-tance will result in some ßuctuation in output voltage, or ripple.The peak-to-peak output voltage ripple can be calculated from the capacitorcurrent waveform, shown in Fig. 6-9d. The change in capacitor charge can becalculated fromLVsDTiLVsDiLf LminD(1D)2R2f(Lf)minD(1D)2R2Vs(1D)2RVsDT2LVsD2Lf Imin0Vs(1D)2RVsDT2LIminILiL2Vs(1D)2RVsDT2LI max ILiL2Vs(1D)2RVsDT2LILVs(1D)2RV2oVsRVoIoVshar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 215
216CHAPTER 6DC-DC ConvertersAn expression for ripple voltage is thenor(6-34)where fis the switching frequency. Alternatively, expressing capacitance interms of output voltage ripple yields(6-35)As with the buck converter, equivalent series resistance of the capacitor cancontribute signiÞcantly to the output voltage ripple. The peak-to-peak variation incapacitor current (Fig. 6-9) is the same as the maximum current in the inductor.The voltage ripple due to the ESR is(6-36)Boost Converter Design 1Design a boost converter that will have an output of 30 Vfrom a 12-Vsource. Design forcontinuous inductor current and an output ripple voltage of less than one percent. Theload is a resistance of 50 . Assume ideal components for this design.■SolutionFirst, determine the duty ratio from Eq. (6-27),If the switching frequency is selected at 25 kHz to be above the audio range, then the min-imum inductance for continuous current is determined from Eq. (6-32).To provide a margin to ensure continuous current, let L120 H. Note that Land fareselected somewhat arbitrarily and that other combinations will also give continuous current.Using Eqs. (6-28) and (6-25),ILVs(1D)2(R)12(10.6)2(50)1.5 ALminD(1D)2(R)2f0.6(10.6)2(50)2(25,000)96 HD1VsVo112300.6Vo,ESRiCrCIL,maxrC CDR(Vo>Vo)f VoVoDRCf VoVoDTRCVoDRCfƒQƒaVoRbDTCVoEXAMPLE 6-4har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 216
6.5The Boost Converter217The minimum capacitance required to limit the output ripple voltage to 1 percent isdetermined from Eq. (6-35).Boost Converter Design 2Aboost converter is required to have an output voltage of 8 Vand supply a load currentof 1 A. The input voltage varies from 2.7 to 4.2 V. Acontrol circuit adjusts the duty ratioto keep the output voltage constant. Select the switching frequency. Determine a value forthe inductor such that the variation in inductor current is no more than 40 percent ofthe average inductor current for all operating conditions. Determine a value of an idealcapacitor such that the output voltage ripple is no more than 2 percent. Determine themaximum capacitor equivalent series resistance for a 2 percent ripple.■SolutionSomewhat arbitrarily, choose 200 kHz for the switching frequency. The circuit must be ana-lyzed for both input voltage extremes to determine the worst-case condition. For Vs2.7 V,the duty ratio is determined from Eq. (6-27).Average inductor current is determined from Eq. (6-28).The variation in inductor current to meet the 40 percent specification is then iL0.4(2.96) 1.19 A. The inductance is then determined from Eq. (6-33).Repeating the calculations for Vs4.2V,The variation in inductor current for this case is iL0.4(1.90) 0.762 A, andILVoIoVs8(1)4.21.90 AD1VsVo14.280.475LVsDiLf2.7(0.663)1.19(200,000)7.5 HILVoIoVs8(1)2.72.96 A D1VsVo12.780.663C DR(Vo>Vo)f0.6(50)(0.01)(25,000)48 FI min 1.51.20.3AI max 1.51.22.7 AiL2VsDT2L(12)(0.6)(2)(120)(10)6(25,000)1.2 AEXAMPLE 6-5har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 217
218CHAPTER 6DC-DC ConvertersThe inductor must be 13.1 H to satisfy the speciÞcations for the total range of inputvoltages.Equation (6-35), using the maximum value of D, gives the minimum capacitance asThe maximum ESR is determined from Eq. (6-36), using the maximum peak-to-peakvariation in capacitor current. The peak-to-peak variation in capacitor current is the same asmaximum inductor current. The average inductor current varies from 2.96 Aat Vs2.7 Vto 1.90 Aat Vs4.2 V. The variation in inductor current is 0.762 Afor Vs4.2 A, but itmust be recalculated for Vs2.7 Vusing the 13.1-H value selected, yieldingMaximum inductor current for each case is then computed asThis shows that the largest peak-to-peak current variation in the capacitor will be 3.30 A. Theoutput voltage ripple due to the capacitor ESR must be no more than (0.02)(8) 0.16 V.Using Eq. (6-36),which givesIn practice, a capacitor that has an ESR of 48 mor less could have a capacitance valuemuch larger than the 20.7 F calculated.InductorResistanceInductors should be designed to have small resistance to minimize power lossand maximize efÞciency. The existence of a small inductor resistance does notsubstantially change the analysis of the buck converter as presented previously inthis chapter. However, inductor resistance affects performance of the boost con-verter, especially at high duty ratios.rC0.16V3.3A48 mÆVo,ESRiCrCIL,maxrC3.3rC0.16 VIL,max,4.2VILiL21.900.76222.28 AIL, max, 2.7VILiL22.960.68323.30 AiLVsDLf2.7(0.663)13.1(10)6(200,000)0.683 ACDR(Vo>Vo)fD(Vo>Io)(Vo>Vo)f0.663(8>1)(0.02)(200,000)20.7 F LVsDiLf4.2(0.475)0.762(200,000)13.1 Hhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 218
6.5The Boost Converter219For the boost converter, recall that the output voltage for the ideal case is(6-37)To investigate the effect of inductor resistance on the output voltage, assume thatthe inductor current is approximately constant. The source current is the same asthe inductor current, and average diode current is the same as average load cur-rent. The power supplied by the source must be the same as the power absorbedby the load and the inductor resistance, neglecting other losses.(6-38)where rLis the series resistance of the inductor. The diode current is equal to theinductor current when the switch is off and is zero when the switch is on. There-fore, the average diode current is(6-39)Substituting for IDinto Eq. (6-38),which becomes(6-40)In terms of Vofrom Eq. (6-39), ILis(6-41)Substituting for ILinto Eq. (6-40),Solving for Vo,(6-42)The preceding equation is similar to that for an ideal converter but includes a cor-rection factor to account for the inductor resistance. Figure 6-10ashows the outputvoltage of the boost converter with and without inductor resistance.The inductor resistance also has an effect on the power efÞciency of con-verters. EfÞciency is the ratio of output power to output power plus losses. Forthe boost converterVoaVs1Dba11rL>[R(1D)2]bVsVorLR(1D)Vo(1D)ILID1DVo>R1D VsVo(1D)ILrLVsILVoIL(1D)I2LrLIDIL(1D)PsPoPrLVsILVoIDI2LrLVoVs1D har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 219
220CHAPTER 6DC-DC Converters(6-43)Using Eq. (6-41) for IL,(6-44)As the duty ratio increases, the efÞciency of the boost converter decreases, asindicated in Fig. 6-10b.hV2o>RV2o>R(Vo>R)2>(1D)rL11rL3R(1D)24hPoPoPlossV2o>RV2o>RI2LrL 10864200.20.40.60.81.0Vo/Vs vs. DVo/VsIdealNonidealD(a)(b)0.20.40.60.81.00.20.40.60.81.00IdealEfficiencyEfficiency vs. DDNonidealFigure 6-10Boost converter for a nonideal inductor.(a) Output voltage; (b) Boost converter efÞciency.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 220
6.6The Buck-Boost Converter2216.6THE BUCK-BOOSTCONVERTERAnother basic switched-mode converter is the buck-boost converter shown inFig. 6-11. The output voltage of the buck-boost converter can be either higher orlower than the input voltage.Voltage and Current RelationshipsAssumptions made about the operation of the converter are as follows:1.The circuit is operating in the steady state.2.The inductor current is continuous.3.The capacitor is large enough to assume a constant output voltage.4.The switch is closed for time DTand open for (1D)T.5.The components are ideal.(a)iDiLiCVo-+(b)iLVo-+(c)Vo-+vL = Vo+-vL = Vs+-vL +-Vs+-Vs+-Vs+-Figure 6-11Buck-boost converter. (a) Circuit;(b) Equivalent circuit for the switch closed; (c) Equivalent circuit for the switch open.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 221
222CHAPTER 6DC-DC ConvertersAnalysis forthe Switch ClosedWhen the switch is closed, the voltage acrossthe inductor isThe rate of change of inductor current is a constant, indicating a linearly increas-ing inductor current. The preceding equation can be expressed asSolving for iLwhen the switch is closed gives(6-45)Analysis forthe Switch OpenWhen the switch is open, the current in theinductor cannot change instantaneously, resulting in a forward-biased diodeand current into the resistor and capacitor. In this condition, the voltage acrossthe inductor isAgain, the rate of change of inductor current is constant, and the change in current isSolving for iL,(6-46)For steady-state operation, the net change in inductor current must be zero overone period. Using Eqs. (6-45) and (6-46),Solving for Vo,(6-47)VoVsaD1DbVsDTLVo(1D)TL0(iL)closed(iL)open0(iL)openVo(1D)TLiLtiL(1D)TVoLdiLdtVoLvLVoL diLdt(iL)closedVsDTLiLtiLDTVsLdiLdtVsLvLVsL diLdthar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 222
6.6The Buck-Boost Converter223The required duty ratio for speciÞed input and output voltages can be expressed as(6-48)The average inductor voltage is zero for periodic operation, resulting inSolving for Voyields the same result as Eq. (6-47).Equation (6-47) shows that the output voltage has opposite polarity from thesource voltage. Output voltage magnitude of the buck-boost converter can be lessthan that of the source or greater than the source, depending on the duty ratio of theswitch.If D0.5, the output voltage is larger than the input; and if D0.5, the out-put is smaller than the input. Therefore, this circuit combines the capabilities of thebuck and boost converters. Polarity reversal on the output may be a disadvantage insome applications, however. Voltage and current waveforms are shown in Fig. 6-12.Note that the source is never connected directly to the load in the buck-boostconverter. Energy is stored in the inductor when the switch is closed and trans-ferred to the load when the switch is open. Hence, the buck-boost converter isalso referred to as anindirectconverter.Power absorbed by the load must be the same as that supplied by the source,whereVLVsDVo(1D)0D|Vo|Vs|Vo|Figure 6-12Buck-boost converter waveforms. (a) Inductor current; (b) Inductor voltage; (c) Diodecurrent; (d) Capacitor current.iLvLVsVoImaxIminDTClosedOpenTttΔiL(a)(b)har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 223
224CHAPTER 6DC-DC ConvertersAverage source current is related to average inductor current byresulting inSubstituting for Vousing Eq. (6-47) and solving for IL, we Þnd(6-49)Maximum and minimum inductor currents are determined using Eqs. (6-45) and(6-49).(6-50)(6-51)IminILiL2VsDR(1D)2VsDT2LImaxILiL2VsDR(1D)2VsDT2LILV2oVsRDPoVsDVsDR(1D)2 V2oRVsILDIsILDV2oRVsIsPsVsIsPoV2oRFigure 6-12(continued)iDiCID=−VoRDTTtt(c)(d)ΔQhar80679_ch06_196-264.qxd 12/16/09 12:53 PM Page 224
6.6The Buck-Boost Converter225EXAMPLE 6-6For continuous current, the inductor current must remain positive. To deter-mine the boundary between continuous and discontinuous current, Iminis set tozero in Eq. (6-51), resulting in(6-52)or(6-53)where fis the switching frequency.Output Voltage RippleThe output voltage ripple for the buck-boost converter is computed from thecapacitor current waveform of Fig. 6-12d.Solving for Vo,or(6-54)As is the case with other converters, the equivalent series resistance of thecapacitor can contribute signiÞcantly to the output ripple voltage. The peak-to-peak variation in capacitor current is the same as the maximum inductor current.Using the capacitor model shown in Fig. 6-6, where IL,maxis determined fromEq. (6-50),(6-55)Buck-Boost ConverterThe buck-boost circuit of Fig. 6-11has these parameters:Vs24 VD0.4R5 L20 HC80 Ff100 kHzVo,ESRiCrCIL,maxrCVoVoDRCfVoVoDTRCVoDRCfƒQƒaVoRbDTCVoLmin(1D)2R2f(Lf)min(1D)2R2har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 225
226CHAPTER 6DC-DC ConvertersDetermine the output voltage, inductor current average, maximum and minimum values,and the output voltage ripple.■SolutionOutput voltage is determined from Eq. (6-47).Inductor current is described by Eqs. (6-49) to (6-51).Continuous current is veriÞed by Imin0.Output voltage ripple is determined from Eq. (6-54).6.7THE«CUK CONVERTERThe«Cuk switching topology is shown in Fig. 6-13a.Output voltage magnitudecan be either larger or smaller than that of the input, and there is a polarity rever-sal on the output.The inductor on the input acts as a Þlter for the dc supply to prevent largeharmonic content. Unlike the previous converter topologies where energy trans-fer is associated with the inductor, energy transfer for the «C«uk converter dependson the capacitor C1.The analysis begins with these assumptions:1.Both inductors are very large and the currents in them are constant.2.Both capacitors are very large and the voltages across them are constant.3.The circuit is operating in steady state, meaning that voltage and currentwaveforms are periodic.4.For a duty ratio of D, the switch is closed for time DTand open for (1D)T.5.The switch and the diode are ideal.VoVoDRCf0.4(5)(80)(10)6 (100,000)0.011%IL, min ILiL25.334.822.93 AIL, max ILiL25.334.827.33 AiLVsDTL24(0.4)20(10)6 (100,000)4.8 AILVsDR(1D)224(0.4)5(10.4)25.33 AVoVsaD1Db24a0.410.4b16 Vhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 226
6.7The«Cuk Converter227The average voltage across C1is computed from KirchhoffÕs voltage law aroundthe outermost loop. The average voltage across the inductors is zero for steady-state operation, resulting inVC1VsVo(a)iL2VC1iC1iL1L1L2C2C1RVo++-Vo+-Vo+–(b)iL2iC1 = -iL2iL1L1L2C2C1R(c)(d)iL2iC1 = iL1iL1L1L2C2C1RClosedOpenIC1IL1-IL2DTTtVs+-Vs+-Vs+-Figure 6-13The «Cuk converter. (a) Circuit; (b) Equivalentcircuit for the switch closed; (c) Equivalent circuit for the switchopen; (d) Current in L1for a large inductance.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 227
228CHAPTER 6DC-DC ConvertersWith the switch closed, the diode is off and the current in capacitor C1is(6-56)With the switch open, the currents in L1and L2force the diode on. The current incapacitor C1is(6-57)The power absorbed by the load is equal to the power supplied by the source:(6-58)For periodic operation, the average capacitor current is zero. With the switch onfor time DTand off for (1D)T,Substituting using Eqs. (6-56) and (6-57),or(6-59)Next, the average power supplied by the source must be the same as theaverage power absorbed by the load,(6-60)Combining Eqs. (6-59) and (6-60), the relationship between the output and inputvoltages is(6-61)The negative sign indicates a polarity reversal between output and input.Note that the components on the output (L2, C2, and R) are in the same con-Þguration as the buck converter and that the inductor current has the same formas for the buck converter. Therefore, the ripple, or variation in output voltage, isthe same as for the buck converter:(6-62)The output ripple voltage will be affected by the equivalence series resistance ofthe capacitor as it was in the convertors discussed previously.VoVo1D8L2C2f2VoVsaD1DbIL1IL2VoVsVsIL1VoIL2PsPoIL1IL2D1DIL2DTIL1(1D)T03(iC1)closed4DT3(iC1)open4(1D)T0VoIL2VsIL1(iC1)openIL1(iC1)closedIL2 har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 228
6.7The«Cuk Converter229The ripple in C1can be estimated by computing the change in vC1in the inter-val when the switch is open and the currents iL1and iC1are the same. Assuming thecurrent in L1to be constant at a level IL1and using Eqs. (6-60) and (6-61), we haveor(6-63)The ßuctuations in inductor currents can be computed by examining the in-ductor voltages while the switch is closed. The voltage across L1with the switchclosed is(6-64)In the time interval DTwhen the switch is closed, the change in inductor cur-rent isor(6-65)For inductor L2, the voltage across it when the switch is closed is(6-66)The change in iL2is then(6-67)For continuous current in the inductors, the average current must be greaterthan one-half the change in current. Minimum inductor sizes for continuous cur-rent are(6-68)L2,min(1D)R2fL1,min(1D)2R2DfiL2VsDTL2VsDL2fvL2Vo(VsVo)VsL2diL2dt iL1VsDTL1VsDL1fiL1DTVsL1vL1VsL1 diL1dtvC1LVoDRC1fvC1L1C13TDTIL1d(t)IL1C1(1D)TVsRC1faD21Dbhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 229
230CHAPTER 6DC-DC ConvertersC«uk Converter DesignAC«uk converter has an input of 12 Vand is to have an output of 18 Vsupplying a 40-Wload. Select the duty ratio, the switching frequency, the inductor sizes such that the change ininductor currents is no more than 10 percent of the average inductor current, the output ripplevoltage is no more than 1 percent, and the ripple voltage across C1is no more than 5 percent.■SolutionThe duty ratio is obtained from Eq. (6-61),orNext, the switching frequency needs to be selected. Higher switching frequencies resultin smaller current variations in the inductors. Let f50 kHz. The average inductor cur-rents are determined from the power and voltage speciÞcations.The change in inductor currents is computed from Eqs. (6-65) and (6-67).The 10 percent limit in changes in inductor currents requiresFrom Eq. (6-62), the output ripple speciÞcation requiresAverage voltage across C1is VsVo12 (18) 30 V, so the maximum change invC1is (30)(0.05) 1.5 V.The equivalent load resistance isNow C1is computed from the ripple speciÞcation and Eq. (6-63).C1 VoDRfvC1(18)(0.6)(8.1)(50,000)(1.5)17.8 FRV2oP(18)2408.1 ÆC2 1D(Vo>Vo)8L2f210.6(0.01)(8)(649)(10)6(50,000)23.08 F L1 VsDfiL1(12)(0.6)(50,000)(0.333)432 HL2 VsDfiL2(12)(0.6)(50,000)(0.222)649 HiLVsDLfIL2PoVo40 W18 V2.22 AIL1PsVs40 W12 V3.33 AD0.6VoVsD1D18121.5EXAMPLE 6-7har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 230
6.8The Single-Ended Primary Inductance Converter (SEPIC)2316.8THE SINGLE-ENDED PRIMARYINDUCTANCECONVERTER (SEPIC)Aconverter similar to the «Cuk is the single-ended primary inductance converter(SEPIC), as shown in Fig. 6-14. The SEPIC can produce an output voltage thatis either greater or less than the input but with no polarity reversal.To derive the relationship between input and output voltages, these initialassumptions are made:1.Both inductors are very large and the currents in them are constant.2.Both capacitors are very large and the voltages across them are constant.3.The circuit is operating in the steady state, meaning that voltage and currentwaveforms are periodic.4.For a duty ratio of D, the switch is closed for time DTand open for (1 D)T.5.The switch and the diode are ideal.(b)(a)iL1L1L1VsVsVsL1L2RRiL2iC1iC2iDvL2+-vL1+-vC1+-Vo+-+-iL1iC1iC2vL1+-Vo+-+-iL2vL2+-vC1+-(c)iL1 = iC1 C1iC2vL1isw+-Vo+-+-iL2vL2+-vC1+-C2C1C1C2C2Figure 6-14(a) SEPIC circuit; (b) Circuit with the switchclosed and the diode off; (c) Circuit with the switch open andthe diode on.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 231
232CHAPTER 6DC-DC ConvertersThe inductor current and capacitor voltage restrictions will be removed later to investigate the ßuctuations in currents and voltages. The inductor currents areassumed to be continuous in this analysis. Other observations are that the aver-age inductor voltages are zero and that the average capacitor currents are zero forsteady-state operation.KirchhoffÕs voltage law around the path containing Vs, L1, C1, and L2givesUsing the average of these voltages,showing that the average voltage across the capacitor C1is(6-69)When the switch is closed, the diode is off, and the circuit is as shown in Fig. 6-14b.The voltage across L1for the interval DTis(6-70)When the switch is open, the diode is on, and the circuit is as shown in Fig. 6-14c.KirchhoffÕs voltage law around the outermost path gives(6-71)Assuming that the voltage across C1remains constant at its average value of Vs[Eq. (6-69)],(6-72)or(6-73)for the interval (1 D)T. Since the average voltage across an inductor is zero forperiodic operation, Eqs. (6-70) and (6-73) are combined to getwhere Dis the duty ratio of the switch. The result is(6-74)which can be expressed as(6-75)DVoVoVsVoVsaD1DbVs(DT)Vo(1D)T0(vL1, sw closed)(DT)(vL1, sw open)(1D)T0vL1VoVsvL1VsVo0VsvL1vC1Vo0vL1VsVC1VsVs0VC100VsvL1vC1vL20har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 232
6.8The Single-Ended Primary Inductance Converter (SEPIC)233This result is similar to that of the buck-boost and«Cuk converter equations, withthe important distinction that there is no polarity reversal between input and out-put voltages. The ability to have an output voltage greater or less than the inputwith no polarity reversal makes this converter suitable for many applications.Assuming no losses in the converter, the power supplied by the source is thesame as the power absorbed by the load.Power supplied by the dc source is voltage times the average current, and thesource current is the same as the current in L1.Output power can be expressed asresulting inSolving for average inductor current, which is also the average source current,(6-76)The variation in iL1when the switch is closed is found from(6-77)Solving for iL1,(6-78)For L2, the average current is determined from KirchhoffÕs current law at thenode where C1, L2, and the diode are connected.Diode current iswhich makesThe average current in each capacitor is zero, so the average current in L2is(6-79)IL2IoiL2iC2IoiC1iDiC2IoiL2iDiC1iL1VsDTL1VsDL1f vL1VsL1adiL1dtbL1aiL1tbL1aiL1DTbIL1IsVoIoVsV2oVsRVsIL1VoIoPoVoIo PsVsIsVsIL1PsPohar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 233
234CHAPTER 6DC-DC ConvertersThe variation in iL2is determined from the circuit when the switch is closed.Using KirchhoffÕs voltage law around the path of the closed switch, C1, and L2with the voltage across C1assumed to be a constant Vs, givesSolving for iL2(6-80)Applications of KirchhoffÕs current law show that the diode and switch cur-rents are(6-81)Current waveforms are shown in Fig. 6-15.KirchhoffÕs voltage law applied to the circuit of Fig. 6-14c, assuming novoltage ripple across the capacitors, shows that the voltage across the switchwhen it is open is Vs+ Vo. From Fig. 6-14b, the maximum reverse bias voltageacross the diode when it is off is also Vs+ Vo.The output stage consisting of the diode, C2, and the load resistor is the sameas in the boost converter, so the output ripple voltage is(6-82)Solving for C2,(6-83)The voltage variation in C1is determined form the circuit with the switchclosed (Fig. 6-14b). Capacitor current iC1is the opposite of iL2, which has previ-ously been determined to have an average value of Io. From the deÞnition ofcapacitance and considering the magnitude of charge,VC1QC1CIotCIoDTCC2DR(Vo>Vo)fVoVC2VoDRC2fiswbiL1iL20 when switch is closedwhen switch is openiDb0iL1iL2 when switch is closedwhen switch is openiL2VsDTL2VsDL2f vL2vC1VsL2adiL2dtbL2aiL2tbL2aiL2DTbhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 234
6.8The Single-Ended Primary Inductance Converter (SEPIC)235Replacing Iowith Vo/R,(6-84)Solving for C1,(6-85)The effect of equivalent series resistance of the capacitors on voltage variation isusually signiÞcant, and the treatment is the same as with the converters discussedpreviously.C1DR(VC1>Vo)fVC1VoDRC1fDiL1(a)(b)(c)(d)(e)(f)iL1000–Io00VoIoVsDiL2iL2iC1iL2iL1iC2iDisw0IoiL1 + iL2 – ioiC1 + iL2iL1 + iC1 Figure 6-15Currents in the SEPIC converter. (a) L1; (b) L2; (c) C1; (d) C2; (e) switch; (f) diode.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 235
236CHAPTER 6DC-DC ConvertersSEPIC CircuitThe SEPIC circuit of Fig. 6-14ahas the following parameters:Vs9 VD0.4f100 kHzL1L290 HC1C280 FIo2 ADetermine the output voltage; the average, maximum, and minimum inductor currents; andthe variation in voltage across each capacitor.■SolutionThe output voltage is determined from Eq. (6-74).The average current in L1is determined from Eq. (6-76).From Eq. (6-78)Maximum and minimum currents in L1are thenFor the current in L2, the average is the same as the output current Io2 A. The variationin IL2is determined from Eq. (6-80)resulting in maximum and minimum current magnitudes ofIL2,min20.421.8 AIL2,max20.422.2 AiL2VsDL2f9(0.4)90(10)6(100,000)0.4 AIL1,minIL1iL121.330.421.13 AIL1,maxIL1iL121.330.421.53 AiL1VsDL1f9(0.4)90(10)6(100,000)0.4 AIL1VoIoVs6(2)91.33 AVoVsaD1Db9a0.410.4b6 V EXAMPLE 6-8har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 236
6.9Interleaved Converters237Using an equivalent load resistance of 6 V/2 A3 , the ripple voltages in the capaci-tors are determined from Eqs. (6-82) and (6-84).In Example 6-8, the values of L1and L2are equal, which is not a require-ment. However, when they are equal, the rates of change in the inductor currentsare identical [Eqs. (6-78) and (6-80)]. The two inductors may then be wound onthe same core, making a 1:1 transformer. Figure 6-16shows an alternative repre-sentation of the SEPIC converter.VC1VoDRC1f6(0.4)(3)80(10)6(100,000)0.1 VVoVC2VoDRC2f6(0.4)(3)80(10)6(100,000)0.1 VL2 = L1L1C1VsC2R1:1+-Figure 6-16ASEPIC circuit using mutuallycoupled inductors.6.9INTERLEAVED CONVERTERSInterleaving, also called multiphasing, is a technique that is useful for reducingthe size of Þlter components. An interleaved buck converter is shown in Fig. 6-17a.This is equivalent to a parallel combination of two sets of switches, diodes, and in-ductors connected to a common Þlter capacitor and load. The switches are operated180out of phase, producing inductor currents that are also 180out of phase. Thecurrent entering the capacitor and load resistance is the sum of the inductor cur-rents, which has a smaller peak-to-peak variation and a frequency twice as large asindividual inductor currents. This results in a smaller peak-to-peak variation in ca-pacitor current than would be achieved with a single buck converter, requiring lesscapacitance for the same output ripple voltage. The variation in current comingfrom the source is also reduced. Figure 6-17bshows the current waveforms.The output voltage is obtained by taking KirchhoffÕs voltage law aroundeither path containing the voltage source, a switch, an inductor, and the outputvoltage. The voltage across the inductor is VsVowith the switch closed and har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 237
238CHAPTER 6DC-DC Convertersis Vowith the switch open. These are the same as for the buck converter of Fig. 6-3adiscussed previously, resulting inwhere D is the duty ratio of each switch.Each inductor supplies one-half of the load current and output power, sothe average inductor current is one-half of what it would be for a single buckconverter.More than two converters can be interleaved. The phase shift betweenswitch closing is 360/n, where nis the number of converters in the parallel con-Þguration. Interleaving can be done with the other converters in this chapter andwith the converters that are described in Chap. 7. Figure 6-18shows an inter-leaved boost converter.VoVsDFigure 6-17(a) An interleaved buck converter; (b) The switching scheme andcurrent waveforms.S2S1ClosedClosedOpenOpeniL1iL1 + iL2iL2VsL1L2S1S2Vo+-(b)(a)+-har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 238
6.10Nonideal Switches and Converter Performance2396.10NONIDEALSWITCHES AND CONVERTERPERFORMANCESwitch Voltage DropsAll the preceding calculations were made with the assumption that the switcheswere ideal. Voltage drops across conducting transistors and diodes may have asigniÞcant effect on converter performance, particularly when the input andoutput voltages are low. Design of dc-dc converters must account for nonidealcomponents. The buck converter is used to illustrate the effects of switch volt-age drops.Referring again to the analysis of the buck converter of Fig. 6-3a, the input-output voltage relationship was determined using the inductor voltage and cur-rent. With nonzero voltage drops across conducting switches, the voltage acrossthe inductor with the switch closed becomes(6-86)where VQis the voltage across the conducting switch. With the switch open, thevoltage across the diode is VDand the voltage across the inductor is(6-87)The average voltage across the inductor is zero for the switching period.Solving for Vo,(6-88)which is lower than VoVsDfor the ideal case.VoVsDVQDVD(1D)VL(VsVoVQ)D(VoVD)(1D)0vLVoVDvLVsVoVQFigure 6-18An interleaved boost converter.S1VsL1L2S2Vo++−−har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 239
240CHAPTER 6DC-DC ConvertersSwitching LossesIn addition to the on-state voltage drops and associated power losses of theswitches, other losses occur in the switches as they turn on and off. Figure 6-19aillustrates switch on-off transitions. For this case, it is assumed that the changesin voltage and current are linear and that the timing sequence is as shown. Theinstantaneous power dissipated in the switch is shown in Fig. 6-19a. Anotherpossible switch on-off transition is shown in Fig. 6-12b. In this case, the volt-age and current transitions do not occur simultaneously. This may be closer toactual switching situations, and switching power loss is larger for this case.(See Chap. 10for additional information.)The energy loss in one switching transition is the area under the powercurve. Since the average power is energy divided by the period, higher switch-ing frequencies result in higher switching losses. One way to reduce switchinglosses is to modify the circuit to make switching occur at zero voltage and/orzero current. This is the approach of the resonant converter, which is discussedin Chap. 9.Figure 6-19Switch voltage, current, andinstantaneous power. (a) Simultaneous voltage and current transition; (b) Worst-case transition.i(t)i(t)p(t)p(t)(a)(b)v(t)v(t)har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 240
6.11Discontinuous-Current Operation2416.11DISCONTINUOUS-CURRENTOPERATIONContinuous current in the inductor was an important assumption in the previousanalyses for dc-dc converters. Recall that continuous current means that the cur-rent in the inductor remains positive for the entire switching period. Continuouscurrent is not a necessary condition for a converter to operate, but a differentanalysis is required for the discontinuous-current case.Buck Converterwith Discontinuous CurrentFigure 6-20shows the inductor and source currents for discontinuous-currentoperation for the buck converter of Fig 6-3a. The relationship between output andinput voltages is determined by Þrst recognizing that the average inductor voltageis zero for periodic operation. From the inductor voltage shown in Fig. 6-20c,which is rearranged to get(6-89)(VsVo)DVoD1(VsVo)DTVoD1T0Figure 6-20Buck converter discontinuous current. (a) Inductor current; (b) Source current; (c) Inductor voltage.(a)(b)(c)D1TDTiLImaxTtisImaxDTTtD1TvLVs – Vo-VoDTTthar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 241
242CHAPTER 6DC-DC Converters(6-90)Next, the average inductor current equals the average resistor current because theaverage capacitor current is zero. With the output voltage assumed constant,Computing the average inductor current from Fig. 6-20a,which results in(6-91)Since the current starts at zero, the maximum current is the same as the changein current over the time that the switch is closed. With the switch closed, the volt-age across the inductor iswhich results in(6-92)Solving for Imaxand using Eq. (6-89) for (VsVo)D,(6-93)Substituting for Imaxin Eq. (6-91),(6-94)which givesSolving for D1,(6-95)D1D2D28L>RT2D21DD12LRT012Imax(DD1)12aVoD1TLb(DD1)VoRImaxiLaVsVoLbDTVoD1TLdiLdtVsVoLiLtiLDTImaxDTvLVsVo12Imax(DD1)VoRIL1Ta12ImaxDT12 ImaxD1Tb 12Imax(DD1)ILIRVoRVoVsaDDD1bhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 242
6.11Discontinuous-Current Operation243Substituting for D1in Eq. (6-90),(6-96)The boundary between continuous and discontinuous current occurs whenD11 D. Recall that another condition that occurs at the boundary betweencontinuous and discontinuous current is Imin0 in Eq. (6-12).Buck Converter with Discontinuous CurrentFor the buck converter of Fig. 6-3a,Vs24 VL200 HR20 C1000 Ff10 kHzswitching frequencyD0.4(a) Show that the inductor current is discontinuous, (b) Determine the output voltage Vo.■Solution(a)For discontinuous current, D11 D,and D1is calculated from Eq. (6-95).Comparing D1to 1 D, 0.29 (1 0.4) shows that the inductor current is discontin-uous. Alternatively, the minimum inductor current computed from Eq. (6-12) is Imin0.96 A. Since negative inductor current is not possible, inductor current must bediscontinuous.(b)Since D1is calculated and discontinuous current is veriÞed, the output voltage can becomputed from Eq. (6-96).Figure 6-21shows the relationship between output voltage and duty ratio forthe buck converter of Example 6-9. All parameters except Dare those of Exam-ple 6-9. Note the linear relationship between input and output for continuous cur-rent and the nonlinear relationship for discontinuous current. For a given dutyratio, the output voltage is greater for discontinuous-current operation than itwould be if current were continuous.VoVsaDDD1b20a0.40.40.29b13.9 V12a0.4A0.428(200)(10)6(10,000)20b0.29D1D2D28L>RT2VoVsaDDD1bVsc2DD1D28L>RTdEXAMPLE 6-9har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 243
244CHAPTER 6DC-DC ConvertersBoost Converterwith Discontinuous CurrentThe boost converter will also operate for discontinuous inductor current. In somecases, the discontinuous-current mode is desirable for control reasons in the caseof a regulated output. The relationship between output and input voltages is de-termined from two relationships:1.The average inductor voltage is zero.2.The average current in the diode is the same as the load current.The inductor and diode currents for discontinuous current have the basic wave-forms as shown in Fig. 6-22aand c. When the switch is on, the voltage acrossthe inductor is Vs. When the switch is off and the inductor current is positive,the inductor voltage is VsVo. The inductor current decreases until it reacheszero and is prevented from going negative by the diode. With the switch openand the diode off, the inductor current is zero. The average voltage across theinductor iswhich results in(6-97)The average diode current (Fig. 6-22c) is(6-98)ID1Ta12ImaxD1Tb12ImaxD1VoVsaDD1D1bVsDT(VsVo)D1T0Figure 6-21Voversus duty ratio for the buck converter ofExample 6-9.Continuous25201510Vo500.10.20.30.40.50.60.70.80.91DDiscontinuoushar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 244
6.11Discontinuous-Current Operation245Current Imaxis the same as the change in inductor current when the switch isclosed.(6-99)Substituting for Imaxin Eq. (6-98) and setting the result equal to the load current,(6-100)Solving for D1,(6-101)Substituting the preceding expression for D1into Eq. (6-97) results in the qua-dratic equationD1aVoVsba2LRDTbID12aVsDTLbD1VoRImaxiLVsDTLD1TDTiLImaxT(a)tΔILvLVsVs − Vo(b)tDTD1TiDImax(c)tD1TFigure 6-22Discontinuous current in the boost converter. (a) Inductor current; (b) Inductor voltage; (c) Diode current.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 245
246CHAPTER 6DC-DC ConvertersSolving for Vo/Vs,(6-102)The boundary between continuous and discontinuous current occurs when D11 D. Another condition at the boundary is when Iminin Eq. (6-30) is zero.Whether the boost converter is operating in the continuous or discontinuousmode depends on the combination of circuit parameters, including the duty ratio.As the duty ratio for a given boost converter is varied, the converter may go intoand out of the discontinuous mode. Figure 6-23shows the output voltage for aboost converter as the duty ratio is varied.Boost Converter with Discontinuous CurrentThe boost converter of Fig. 6-8ahas parametersVs20 VD0.6L100 HR50 C100 Ff15 kHz(a) Verify that the inductor current is discontinuous, (b) determine the output voltage, and(c) determine the maximum inductor current.VoVs12a1B12D2RTLbaVoVsb2VoVsD2RT2L0Continuous400300vo20010000.20.4D0.60.81.0DiscontinuousCurrentFigure 6-23Output voltage of boost converter.EXAMPLE 6-10har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 246
6.12Switched-Capacitor Converters247■Solution(a)First assume that the inductor current is continuous and compute the minimum fromEq. (6-30), resulting in Imin1.5 A. Negative inductor current is not possible, in-dicating discontinuous current.(b)Equation (6-102) gives the output voltageNote that a boost converter with the same duty ratio operating with continuous cur-rent would have an output of 50 V.(c)The maximum inductor current is determined from Eq. (6-99).6.12SWITCHED-CAPACITOR CONVERTERSIn switched-capacitor converters, capacitors are charged in one circuit conÞgura-tion and then reconnected in a different conÞguration, producing an output voltagedifferent from the input. Switched-capacitor converters do not require an inductorand are also known as inductorless convertersor charge pumps.Switched-capacitorconverters are useful for applications that require small currents, usually lessthan 100 MA. Applications include use in RS-232 data signals that require bothpositive and negative voltages for logic levels; in ßash memory circuits, wherelarge voltages are needed to erase stored information; and in drivers for LEDsand LCD displays.The basic types of switched-capacitor converters are the step-up (boost), theinverting, and the step-down (buck) circuits. The following discussion intro-duces the concepts of switched-capacitor converters.The Step-Up Switched-CapacitorConverterAcommon application of a switched-capacitor converter is the step-up (boost)converter. The basic principle is shown in Fig. 6-24a. Acapacitor is Þrst con-nected across the source to charge it to Vs. The charged capacitor is then con-nected in series with the source, producing an output voltage of 2Vs.Aswitching scheme to accomplish this is shown in Fig. 6-24b. The switchpair labeled 1 is closed and opened in a phase sequence opposite to that of switchpair 2. Switch pair 1 closes to charge the capacitor and then opens. Switch pair 2then closes to produce an output of 2Vs.The switches can be implemented with transistors, or they can be imple-mented with transistors and diodes, as shown in Fig. 6-24c. Transistor M1isturned on, and C1is charged to Vsthrough D1. Next, M1is turned off and M2isturned on. KirchhoffÕs voltage law around the path of the source, the chargedI max VsDLf(20)(0.6)100(10)6(15,000)8 AVoVs2a1B12D2RLfb202B1B12(0.6)2(50)100(10)6(15,000)R60 Vhar80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 247
248CHAPTER 6DC-DC Converterscapacitor C1, and Voshows that Vo2Vs. The capacitor C2on the output isrequired to sustain the output voltage and to supply load current when C1is dis-connected from the load. With C2included, it will take several switching cyclesto charge it and achieve the Þnal output voltage. With the resistor connected, cur-rent will ßow from the capacitors, but the output voltage will be largely unaffectedif the switching frequency is sufÞciently high and capacitor charges are replenishedin short time intervals. The output will be less than 2Vsfor real devicesbecause ofvoltage drops in the circuit.Converters can be made to step up the input voltage to values greater than2Vs. In Fig. 6-25a, two capacitors are charged and then reconnected to create a(a)VsVsab+-VsVs2Vsab++–(c)VsVo = 2VsD1D2C1M1M2C2Rab+-(b)Vs1122ab+-+-+-+-Figure 6-24Aswitched-capacitor step-up converter. (a) Acapacitor ischarged and then reconnected to produce a voltage of twice that of thesource; (b) Aswitch arrangement; (c) An implementation using transistorsand diodes and showing a second capacitor C2to sustain the output voltageduring switching.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 248
6.12Switched-Capacitor Converters249voltage of 3Vs. Aswitching arrangement to implement this circuit is shown inFig. 6-25b. Switch sets 1 and 2 open and close alternately. The circuit includesan output capacitor C3to sustain the voltage across the load during the switch-ing cycle.The Inverting Switched-CapacitorConverterThe inverting switched-capacitor converter is useful for producing a negativevoltage from a single voltage source. For example, 5 Vcan be made from a 5-Vsource, thereby creating a +/5-Vsupply. The basic concept is shown inFig. 6-26a. Acapacitor is charged to the source voltage and then connected to theoutput with opposite polarity.Aswitching scheme to accomplish this is shown in Fig. 6-26b. Switch pairs 1and 2 open and close in opposite phase sequence. Switch pair 1 closes to charge thecapacitor and then opens. Switch pair 2 then closes to produce an output of Vs.Aswitch conÞguration to implement the inverting circuit is shown in Fig. 6-26c.An output capacitor C2is included to sustain the output and supply current to theload during the switching cycle. Transistor M1is turned on, charging C1to Vsthrough D1. Transistor M1is turned off and M2is turned on, charging C2with aVsVsVsVscdab+-(a)cdVsab+-Vs+-3Vs+-(b)11122adcb21Vo = 3Vs C3+-+-+-+-Figure 6-25Astep-up switched-capacitor converter to produce 3 times the sourcevoltage. (a) Each capacitor is charged to Vsand reconnected to produce an output of3Vs; (b) Aswitch arrangement also shows an output capacitor to sustain the outputvoltage during switching.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 249
250CHAPTER 6DC-DC Converterspolarity that is positive on the bottom. After several switching cycles, the outputvoltage is Vs.The Step-Down Switched-CapacitorConverterAstep-down (buck) switched-capacitor converter is shown in Fig. 6-27. InFig. 6-27a, two capacitors of equal value are connected in series, resulting in avoltage of Vs/2 across each. The capacitors are then reconnected in parallel, mak-ing the output voltage Vs/2. Aswitching scheme to accomplish this is shown inFig. 6-27b. Switch pairs 1 and 2 open and close in opposite phase sequence. Withthe resistor connected, current will ßow from the capacitors, but the output voltagewill be unaffected if the switching frequency is sufÞciently high and capacitorcharges are replenished in short time intervals.Aswitch configuration to implement the inverting circuit is shown inFig. 6-27c. Transistor M1is turned on, and both capacitors charge through D1.Figure 6-26The inverting switched-capacitor converter. (a) Thecapacitor is charged to Vsand then reconnected to produce an output ofVs; (b) Aswitch arrangement; (c) An implementation using transistorsand diodes and showing a second capacitor to sustain the output voltageduring switching.(a)(b)VsVsVsVsab+-VsVsba+- +-(c)Vo = -VsVo = -Vs+-D2D1C1M1M2C2R1122ab+-+-+-+-har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 250
6.13PSpice Simulation of DC-DC Converters251Transistor M1is turned off, and M2is turned on, connecting the capacitors inparallel through D2. And D2is forward-biased as the capacitors discharge intothe load resistor.6.13PSPICE SIMULATION OFDC-DC CONVERTERSThe circuit model to be used for PSpice simulation of the dc-dc converters dis-cussed in this chapter depends on the ultimate goal of the simulation. To predict thebehavior of a circuit with the goal of producing the periodic voltage and currentwaveforms requires a circuit model that includes a switch. Avoltage-controlledswitch is convenient for this application. If the circuit includes an ideal diode andlossless inductors and capacitors, the simulation results will be Þrst-order approxi-mations of circuit behavior, much the same as the analytical work done previouslyin this chapter. By including parasitic elements and using nonideal switchingdevices in the circuit model, the simulation will be useful to investigate how a realcircuit is expected to depart from the ideal.Another simulation goal may be to predict the dynamic behavior of a dc-dcconverter for changes in the source voltage or load current. Adisadvantage ofFigure 6-27The step-down switched-capacitor converter.(a) The capacitors are in series and each is charged to Vs/2,followed by the capacitors in parallel, with the outputvoltage at Vs/2; (b) Aswitch arrangement; (c) Animplementation using transistors and diodes.(a)Vs/2Vs/2abcd+-+-VsVs/2abcd+-Vs/2+–(b)1122acdbVo = Vs/2+-(c)VsVsVsD2D1M1RM2+-+-+-+-har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 251
252CHAPTER 6DC-DC Convertersusing the cycle-to-cycle switched model is that the time for overall circuit tran-sients may be orders of magnitude larger than the switching period, thereby mak-ing the program execution time quite long. Acircuit model that does not includethe cycle-by-cycle details but does simulate the large-scale dynamic behavior byusing averaging techniques may be preferred. PSpice simulations for both cycle-to-cycle and large-scale dynamic behavior are discussed in this section.ASwitched PSpice ModelAvoltage-controlled switch is a simple way to model a transistor switch thatwould actually be used in a physical converter. The voltage-controlled switch hasan on resistance that could be selected to match the transistorÕs, or the on resis-tance could be chosen negligibly small to simulate an ideal switch. Apulse volt-age source acts as the control for the switch.When periodic closing and opening of the switch in a dc-dc converter begins,a transient response precedes the steady-state voltages and currents described ear-lier in this chapter. The following example illustrates a PSpice simulation for abuck converter using idealized models for circuit components.Buck Converter Simulation Using Idealized ComponentsUse PSpice to verify the buck converter design in Example 6-3.The buck converter has the following parameters:Vs3.3 VL1 HC667 Fwith an ESR of 15 mR0.3 for a load current of 4 AD0.364for an output of 1.2 VSwitching frequency 500 kHz■SolutionAPSpice model for the buck converter is shown in Fig. 6-28. Avoltage-controlled switch(Sbreak) is used for the switching transistor, with the on resistance Ronset to 1 mtoapproximate an ideal device. An ideal diode is simulated by letting the diode parameter n(the emission coefÞcient in the diode equation) be 0.001. The switch is controlled by apulse voltage source. The parameter statements Þle facilitates modiÞcation of the circuitÞle for other buck converters. Initial conditions for the inductor current and capacitorvoltage are assumed to be zero to demonstrate the transient behavior of the circuit.Figure 6-29ashows the Probe output for inductor current and capacitor voltage.Note that there is a transient response of the circuit before the steady-state periodic con-dition is reached. From the steady-state portion of the Probe output shown in Fig. 6-29b,the maximum and minimum values of the output voltage are 1.213 and 1.1911 V, respec-tively, for a peak-to-peak variation of about 22 mV, agreeing well with the 24-mVdesignobjective. The maximum and minimum inductor currents are about 4.77 and 3.24 A,agreeing well with the 4.8- and 3.2-Adesign objectives.EXAMPLE 6-11har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 252
6.13PSpice Simulation of DC-DC Converters253V1 = 0V2 = 5TD = 0TR = 1nTF = 1nPW = {Duty/Freq}PER = {1/Freq}VcontrolInputBUCK CONVERTERIdeal switch and diodeVs3.3L11u21667uC115mResrRL0.3DbreakD1vxS1OutputSbreak−++−+−+PARAMETERS:Duty = 0.364Freq = 500k .model Dbreak D n=0.001.model Sbreak VSWITCH Roff =1e6 Ron=0.001 Voff=0.0 Von=1.0Figure 6-28PSpice circuit for the buck converter.(a)302010BUCK TRANSIENTS AT START UPOUTPUT VOLTAGETimeINDUCTOR CURRENT00 s0.2 ms0.4 ms0.6 ms0.8 ms1.0 msV(OUTPUT) I (L1)Figure 6-29Probe output for Example 6-11 (a) showing the transient at start-up and (b) insteady state.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 253
254CHAPTER 6DC-DC ConvertersAn Averaged Circuit ModelPSpice simulation of the dc-dc buck converter in Example 6-11 includes both thelarge scale transient behavior and the cycle-to-cycle waveforms of voltage andcurrent. If the goal of a simulation is to determine the large-scale transient behav-ior, the cycle-to-cycle response merely adds to the execution time of the program.Amore time-efÞcient way to simulate the transient behavior of dc-dc convertersis to use a circuit model that produces the averagevalues of voltages and currentsonly, rather than including the detailed variations around the averages. In general,transient behavior for dc-dc converters can be predicted by analyzing linearnetworks, with the response equal to the average value of the switching wave-forms. The discussion that follows is focused on the buck converter operating inthe continuous-current mode.The transient behavior of the average output voltage can be described usinglinear circuit analysis. The input vxto the RLCcircuit of the buck converter ofFig. 6-3ahas an average value of VxVsD. The response of the RLCcircuit to astep input voltage of vx(t) (VsD)u(t) represents the average of the output voltageand current waveforms when the converter is turned on. This represents the samelarge-scale transient that was present in the PSpice simulation shown in Fig. 6-29a.For complete simulation of the large-scale behavior of a dc-dc converter, itis desirable to include the proper voltage and current relationships between thesource and the load. Taking the buck converter as an example, the relationshipbetween average voltage and current at the input and output for continuousinductor current is given byFigure 6-29(continued)(b)OUTPUT VOLTAGETimeINDUCTOR CURRENT5.0 AV(OUTPUT)I (L1)2.5 A0 A(982.730u, 4.7721)(988.000u, 3.2438)SEL>>1.225 V1.200 V1.175 V1.150 V0.980 ms0.985 ms0.990 ms0.995 ms1.000 ms1.250 V(982.730u, 1.2130)(988.000u, 1.1911)har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 254
6.13PSpice Simulation of DC-DC Converters255(6-103)Since VoVsDand Io Is/D, the switch in a model for computing average voltageand current is the same as a ÒtransformerÓ which has a turns ratio of 1:D. Circuitmodels for a buck converter using a 1:Dtransformer and a PSpice circuit for imple-menting the averaged model are shown in Fig. 6-30. The circuit symbol for thetransformer indicates that the model is valid for both ac and dc signals.The following example illustrates the use of the PSpice model to simulatethe response of average voltage and current for a buck converter.Averaged Buck ConverterUse the averaged circuit of Fig. 6-30cto simulate the buck converter having parametersVoVsIsIoD(a)(c)(b)1 : DVs+-VsVapaDVappiC0 VDiC++–++–Vs+-Figure 6-30(a) Buck converter with switch;(b) Circuit model for averaged buckconverter; (c) PSpice circuit.EXAMPLE 6-12har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 255
256CHAPTER 6DC-DC ConvertersVs10 VD0.2L400 HC400 FR2 f5 kHzUse initial conditions of zero for inductor current and capacitor voltage.■SolutionThe PSpice implementation of the averaged model is shown in Fig. 6-31a. The simulationresults from both a switched model and for the averaged model are shown in Fig. 6-31b.Note that the switched model shows the cycle-to-cycle variation, while the average modelshows only the averaged values.Figure 6-31(a) PSpice implementation of the averaged buck converter model; (b) Probeoutput for both the switched model and the averaged model.(a)(b)SWITCHED MODELOUTPUT VOLTAGEINDUCTOR CURRENT2.04.00AVERAGED MODELOUTPUT VOLTAGEINDUCTOR CURRENT2.04.000 sSEL >>2.0 ms4.0 msTime6.0 ms8.0 msI (L1)V(Output_Avg)I (L2)V(Output_Switched)A10FCBuck ConverterAveraged ModelESet gain = Duty ratiofor E and F400u400u2120++–+-P{{har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 256
6.13PSpice Simulation of DC-DC Converters257The averaged model can be quite useful in investigating the dynamic behav-ior of the converter when it is subjected to changes in operating parameters. Suchan analysis is essential when the output is regulated through a feedback loopwhich is designed to keep the output at a set level by adjusting the duty ratio ofthe switch to accommodate variations in the source or the load. Closed-loop re-sponse is discussed in Chap. 7 on dc power supplies.The following example illustrates the use of the averaged circuit model tosimulate a step change in load resistance.Step Change in LoadUse the averaged buck converter model to determine the dynamic response when the loadresistance is changed. The circuit parameters areVs50 VL1 mHwith a series resistance of 0.4 C100 Fwith an equivalent series resistance of 0.5 R4 ,stepped to 2 and back to 4 D0.4Switching frequency 5 kHz■SolutionStep changes in load are achieved by switching a second 4-resistor across the output at6 ms and disconnecting it at 16 ms. The averaged model shows the transients associatedwith output voltage and inductor current (Fig. 6-32b). Also shown for comparison are theresults of a different simulation using a switch, showing the cycle-to-cycle variations involtage and current.EXAMPLE 6-13(a)10FBuck ConverterAveraged ModelESet gain = Duty ratiofor E1 and F11m100u440.5120++–++–+TD = 6mTF = 1nPW = 10mPER = 20mV1 = 0TR = 1nV2 = 5+-{{Figure 6-32(a) PSpice implementation of the averaged model with a switched load; (b) Probe results for both the switched model and the averaged model.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 257
258CHAPTER 6DC-DC Converters+−+−Dvapcp(a)DiCiC0 V(b)+−apc(d)+−apc(c)+−apc(e)+−apcaFigure 6-33Averaged switchmodel in dc-dcconverters. (a) PSpiceaveraged model forswitch and diode; (b) Buck equivalent;(c) Boost equivalent;(d) Buck-boostequivalent; (e)«Cukequivalent.SWITCHED MODELOUTPUT VOLTAGEINDUCTOR CURRENT2.55.00AVERAGED MODELOUTPUT VOLTAGEINDUCTOR CURRENT2.55.000 sSEL >>5 ms10 msTime(b)15 ms20 msV(Output_Avg)I (L1)I (L2)V(Output_Switched)Figure 6-32(continued)har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 258
6.15Bibliography259The averaged switch model can be used to simulate the other dc-dc convert-ers discussed in this chapter. Figure 6-33shows how the average switch model isused in the boost, buck-boost, and«Cuk converters for continuous-current opera-tion. The designation of the switch terminals a, p, and crepresents active, pas-sive, and common terminals.6.14Summary¥Aswitched-mode dc-dc converter is much more efÞcient than a linear converterbecause of reduced losses in the electronic switch.¥Abuck converter has an output voltage less than the input.¥Aboost converter has an output voltage greater than the input.¥Buck-boost and«Cuk converters can have output voltages greater than or less thanthe input, but there is a polarity reversal.¥ASEPIC (single-ended primary-inductor converter) can have an output voltagegreater than or less than the input with no polarity reversal.¥Output voltage is generally reduced from the theoretical value when switch dropsand inductor resistances are included in the analysis.¥Capacitor equivalent series resistance (ESR) may produce an output voltage ripplemuch greater than that of the capacitance alone.¥Interleaved converters have parallel switch/inductor paths to reduce the currentvariation in the output capacitor.¥Discontinuous-current modes for dc-dc converters are possible and sometimesdesirable, but input-output relationships are different from those for thecontinuous-current modes.¥Switched-capacitor converters charge capacitors in one conÞguration and then useswitches to reconnect the capacitors to produce an output voltage different from theinput.¥PSpice can be used to simulate dc-dc converters by using a voltage-controlledswitch or by using an averaged circuit model.6.15BibliographyS. Ang and A. Oliva, Power-Switching Converters, 2d ed., Taylor & Francis, BocaRaton, Fla., 2005.C. Basso, Switch-Mode Power Supplies,McGraw-Hill, New York, 2008.B. K. Bose, Power Electronics and Motor Drives: Advances and Trends,Elsevier/Academic Press, Boston, 2006.R. W. Erickson and D. Maksimovi«c, Fundamentals of Power Electronics, 2d ed.,Kluwer Academic, Boston, 2001.W. Gu, ÒDesigning a SEPIC Converter,Ó National Semiconductor Application Note1484, 2007, http://www.national.com/an/AN/AN-1484.pdf.P. T. Krein, Elements of Power Electronics, Oxford University Press, New York, 1998.D. Maksimovi«c, and S. Dhar, ÒSwitched-Capacitor DC-DC Converters for Low-PowerOn-Chip Applications,Ó IEEE Annual Power Electronics Specialists Conference,vol. 1, pp. 54Ð59, 1999.R. D. Middlebrook and, S.«Cuk, Advances in Switched-Mode Power Conversion, vols. Iand II, TESLAco, Pasadena, Calif., 1981.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters,Applications, and Design,3d ed., Wiley, New York, 2003.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 259
260CHAPTER 6DC-DC ConvertersA. I. Pressman, K. Billings, and T. Morey, Switching Power Supply Design, McGraw-Hill, New York, 2009.M. H. Rashid, Power Electronics: Circuits, Devices, and Systems,3d ed., Prentice-Hall,Upper Saddle River, N.J., 2004.ÒSEPIC Equations and Component Ratings,Ó MAXIM Application Note 1051, 2002,http://www.maxim-ic.com/an1051.V. Vorperian, ÒSimpliÞed Analysis of PWM Converters Using Model of PWM SwitchÓ,IEEE Transactions on Aerospace and Electronic Systems, May 1990.ProblemsLinearConverters6-1.What is the relationship between Vo/Vsand efÞciency for the linear converterdescribed in Sec. 6.1?6-2.Adc power supply must step down a 100-V. source to 30 V. The output power is 100 W. (a) Determine the efÞciency of the linear converter of Fig. 6-1when it isused for this application. (b) How much energy is lost in the transistor in 1 yr? (c) Using the electric rate in your area, what is the cost of the energy loss for 1 yr?Basic Switched Converter6-3.The basic dc-dc converter of Fig. 6-2ahas a source of 100 Vand a loadresistance of 10 . The duty ratio of the switch is D0.6, and the switchingfrequency is 1 kHz. Determine (a) the average voltage across the load, (b) therms voltage across the load, and (c) the average power absorbed by the load. (d) What would happen if the switching frequency were increased to 2 kHz?Buck Converter6-4.The buck converter of Fig. 6-3ahas the following parameters: Vs24 V, D0.65,L25 H, C15 F, and R10 . The switching frequency is 100 kHz.Determine (a) the output voltage, (b) the maximum and minimum inductor currents,and (c) the output voltage ripple.6-5.The buck converter of Fig. 6-3ahas the following parameters: Vs15 V, D0.6,L10 H, C50 F, and R5 . The switching frequency is 150 kHz.Determine (a) the output voltage, (b) the maximum and minimum inductorcurrents, and (c) the output voltage ripple.6-6.The buck converter of Fig. 6-3ahas an input of 50 Vand an output of 25 V. Theswitching frequency is 100 kHz, and the output power to a load resistor is 125 W.(a) Determine the duty ratio. (b) Determine the value of inductance to limit thepeak inductor current to 6.25 A. (c) Determine the value of capacitance to limitthe output voltage ripple to 0.5 percent.6-7.Abuck converter has an input of 6 Vand an output of 1.5 V. The load resistor is 3 , the switching frequency is 400 kHz, L5 H, and C10 F. (a) Determine the duty ratio. (b) Determine the average, peak, and rms inductorcurrents. (c) Determine the average source current. (d) Determine the peak andaverage diode current.6-8.The buck converter of Fig. 6-3ahas Vs30 V, Vo20 V, and a switchingfrequency of 40 kHz. The output power is 25 W. Determine the size of the inductorsuch that the minimum inductor current is 25 percent of the average inductor current.har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 260
Problems2616-9.Abuck converter has an input voltage that varies between 50 and 60 Vand a loadthat varies between 75 and 125 W. The output voltage is 20 V. For a switchingfrequency of 100 kHz, determine the minimum inductance to provide forcontinuous current for every operating possibility.6-10.Abuck converter has an input voltage that varies between 10 and 15 Vand a loadcurrent that varies between 0.5 Aand 1.0 A. The output voltage is 5 V. For aswitching frequency of 200 kHz, determine the minimum inductance to providefor continuous current for every operating possibility.6-11.Design a buck converter such that the output voltage is 15 Vwhen the input is 48V.The load is 8 . Design for continuous inductor current. The output voltageripple must be no greater than 0.5 percent. Specify the switching frequency andthe value of each of the components. Assume ideal components.6-12.Specify the voltage and current ratings for each of the components in the designof Prob. 6-11.6-13.Design a buck converter to produce an output of 15 Vfrom a 24-Vsource. Theload is 2 A. Design for continuous inductor current. Specify the switchingfrequency and the values of each of the components. Assume ideal components.6-14.Design a buck converter that has an output of 12 Vfrom an input of 18 V. Theoutput power is 10 W. The output voltage ripple must be no more than 100 mVp-p. Specify the duty ratio, switching frequency, and inductor and capacitorvalues. Design for continuous inductor current. Assume ideal components.6-15.The voltage Vxin Fig. 6-3afor the buck converter with continuous inductorcurrent is the pulsed waveform of Fig. 6-2c. The Fourier series for this waveformhas a dc term of VsD. The ac terms have a fundamental frequency equal to theswitching frequency and amplitudes given byUsing ac circuit analysis, determine the amplitude of the Þrst ac term of theFourier series for voltage across the load for the buck converter in Example 6-1.Compare your result with the peak-to-peak voltage ripple determined in theexample. Comment on your results.6-16.(a) If the equivalent series resistance of the capacitor in the buck converter inExample 6-2 is 0.5 , recompute the output voltage ripple. (b) Recompute therequired capacitance to limit the output voltage ripple to 0.5 percent if the ESRof the capacitor is given by rC50(10)6/C, where Cis in farads.Boost Converter6-17.The boost converter of Fig. 6-8has parameter Vs20 V, D0.6, R12.5 ,L10 H, C40 F, and the switching frequency is 200 kHz. (a) Determinethe output voltage. (b) Determine the average, maximum, and minimum inductorcurrents. (c) Determine the output voltage ripple. (d) Determine the averagecurrent in the diode. Assume ideal components.6-18.For the boost converter in Prob. 6-17, sketch the inductor and capacitor currents.Determine the rms values of these currents.6-19.Aboost converter has an input of 5 Vand an output of 25 Wat 15 V. Theminimum inductor current must be no less than 50 percent of the average. TheVn22Vsn21 cos (2nD) n1, 2, 3, . . .har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 261
262CHAPTER 6DC-DC Convertersoutput voltage ripple must be less than 1 percent. The switching frequency is300 kHz. Determine the duty ratio, minimum inductor value, and minimumcapacitor value.6-20.Design a boost converter to provide an output of 18 Vfrom a 12-Vsource. Theload is 20 W. The output voltage ripple must be less than 0.5 percent. Specify theduty ratio, the switching frequency, the inductor size and rms current rating, andthe capacitor size and rms current rating. Design for continuous current. Assumeideal components.6-21.The ripple of the output voltage of the boost converter was determined assumingthat the capacitor current was constant when the diode was off. In reality, thecurrent is a decaying exponential with a time constant RC. Using the capacitanceand resistance values in Example 6-4, determine the change in output voltagewhile the switch is closed by evaluating the voltage decay in the RCcircuit.Compare it to that determined from Eq. (6-34).6-22.For the boost converter with a nonideal inductor, produce a family of curves ofVo/Vssimilar to Fig. 6-10afor rL/R0.1, 0.3, 0.5, and 0.7.Buck-boost Converter6-23.The buck-boost converter of Fig. 6-11has parameters Vs12 V, D0.6, R10 ,L10 H, C20 F, and a switching frequency of 200 kHz. Determine (a) the output voltage, (b) the average, maximum, and minimum inductorcurrents, and (c) the output voltage ripple.6-24.Sketch the inductor and capacitor currents for the buck-boost converter inProb. 6-23. Determine the rms values of these currents.6-25.The buck-boost converter of Fig. 6-11has Vs24 V, Vo36 V, and a loadresistance of 10 . If the switching frequency is 100 kHz, (a) determine the induc-tance such that the minimum current is 40 percent of the average and (b) determinethe capacitance required to limit the output voltage ripple to 0.5 percent.6-26.Design a buck-boost converter to supply a load of 75 Wat 50 Vfrom a 40-Vsource. The output ripple must be no more than 1 percent. Specify the duty ratio,switching frequency, inductor size, and capacitor size.6-27.Design a dc-dc converter to produce a 15-Voutput from a source that variesfrom12 to 18 V. The load is a 15-resistor.6-28.Design a buck-boost converter that has a source that varies from 10 to 14 V. Theoutput is regulated at 12 V. The load varies from 10 to 15 W. The outputvoltage ripple must be less than 1 percent for any operating condition. Determinethe range of the duty ratio of the switch. Specify values of the inductor andcapacitor, and explain how you made your design decisions.«Cuk Converter6-29.The«Cuk converter of Fig. 6-13ahas parameters Vs12 V, D0.6, L1200 H,L2100 H, C1C22 F, and R12 , and the switching frequency is250 kHz. Determine (a) the output voltage, (b) the average and the peak-to-peakvariation of the currents in L1and L2, and (c) the peak-to-peak variation in thecapacitor voltages.6-30.The«Cuk converter of Fig. 6-13ahas an input of 20 Vand supplies an output of1.0 Aat 10 V. The switching frequency is 100 kHz. Determine the values of L1har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 262
Problems263and L2such that the peak-to-peak variation in inductor currents is less than 10 percent of the average.6-31.Design a «Cuk converter that has a in input of 25 Vand an output of 30 V. Theload is 60 W. Specify the duty ratio, switching frequency, inductor values, andcapacitor values. The maximum change in inductor currents must be 20 percentof the average currents. The ripple voltage across C1must be less than 5 percent,and the output ripple voltage must be less than 1 percent.SEPIC Circuit6-32.The SEPIC circuit of Fig. 6-14ahas Vs5 V, Vo12 V, C1C250 µF,L110 H, and L220 H. The load resistor is 4 . Sketch the currents inL1and L2, indicating average, maximum, and minimum values. The switchingfrequency is 100 kHz.6-33.The SEPIC circuit of Fig. 6-14ahas Vs3.3 V, D0.7, L14 H, and L210 H. The load resistor is 5 . The switching frequency is 300 kHz. (a) Determinethe maximum and minimum values of the currents in L1and L2. (b) Determinethe variation in voltage across each capacitor.6-34.The relationship between input and output voltages for the SEPIC circuit ofFig. 6-14aexpressed in Eq. (6-74) was developed using the average voltageacross L1. Derive the relationship using the average voltage across L2.6-35.ASEPIC circuit has an input voltage of 15 Vand is to have an output of 6 V. Theload resistance is 2 , and the switching frequency is 250 kHz. Determine valuesof L1and L2such that the variation in inductor current is 40 percent of theaverage value. Determine values of C1and C2such that the variation in capacitorvoltage is 2 percent.6-36.ASEPIC circuit has an input voltage of 9 Vand is to have an output of 2.7 V.The output current is 1 A, and the switching frequency is 300 kHz. Determinevalues of L1and L2such that the variation in inductor current is 40 percent of theaverage value. Determine values of C1and C2such that the variation in capacitorvoltage is 2 percent.Nonideal Effects6-37.The boost converter of Example 6-4 has a capacitor with an equivalent seriesresistance of 0.6 . All other parameters are unchanged. Determine the outputvoltage ripple.6-38.Equation (6-88) expresses the output voltage of a buck converter in terms ofinput, duty ratio, and voltage drops across the nonideal switch and diode. Derivean expression for the output voltage of a buck-boost converter for a nonidealswitch and diode.Discontinuous Current6-39.The buck converter of Example 6-2 was designed for a 10-load. (a) What isthe limitation on the load resistance for continuous-current operation? (b) Whatwould be the range of output voltage for a load resistance range of 5 to 20 ? (c) Redesign the converter so inductor current remains continuous for a loadresistance range of 5 to 20 .har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 263
264CHAPTER 6DC-DC Converters6-40.The boost converter of Example 6-4 was designed for a 50-load. (a) What isthe limitation on the load resistance for continuous-current operation? (b) Whatwould be the range of output voltage for a load resistance range of 25 to 100 ?(c) Redesign the converter so inductor current remains continuous for a loadresistance range of 25 to 100 .6-41.Section 6.11 describes the buck and boost converters for discontinuous-currentoperation. Derive an expression for the output voltage of a buck-boost converterwhen operating in the discontinuous-current mode.Switched-capacitorConverters6-42.Capacitors C1and C2in Fig. P6-42 are equal in value. In the Þrst part of theswitching cycle, the switches labeled 1 are closed while the switches labeled 2are open. In the second part of the cycle, switches 1 are opened and then switches2 are closed. Determine the output voltage Voat the end of the switching cycle.Note: Athird capacitor would be placed from Voto ground to sustain the outputvoltage during subsequent switching cycles.PSpice6-43.Simulate the buck converter of Example 6-11, but use the IRF150 MOSFETfrom the PSpice device library for the switch. Use an idealized gate drive circuitof a pulsed voltage source and small resistance. Use the default model for thediode. Use Probe to graph p(t) versus.tfor the switch for steady-state conditions.Determine the average power loss in the switch.6-44.Simulate the buck converter of Example 6-1 using PSpice. (a) Use an idealswitch and ideal diode. Determine the output ripple voltage. Compare yourPSpice results with the analytic results in Example 6-1. (b) Determine the steady-state output voltage and voltage ripple using a switch with an on resistance of 2 and the default diode model.6-45.Show that the equivalent circuits for the PSpice averaged models in Fig. 6-33satisfy the average voltage and current input-output relationships for each of theconverters.1112C1C2222VsVo+-FigureP6-42har80679_ch06_196-264.qxd 12/16/09 12:29 PM Page 264
CHAPTER7265DC PowerSupplies7.1INTRODUCTIONAbasic disadvantage of the dc-dc converters discussed in Chap. 6is the elec-trical connection between the input and the output. If the input supply isgrounded, that same ground will be present on the output. Away to isolate theoutput from the input electrically is with a transformer. If the dc-dc converterhas a first stage that rectifies an ac power source to dc, a transformer could beused on the ac side. However, not all applications require ac to dc conversionas a first stage. Moreover, a transformer operating at a low frequency (50 or60 Hz) requires a large magnetic core and is therefore relatively large, heavy,and expensive.Amore efficient method of providing electrical isolation between inputand output of a dc-dc converter is to use a transformer in the switchingscheme. The switching frequency is much greater than the ac power-sourcefrequency, enabling the transformer to be small. Additionally, the transformerturns ratio provides increased design flexibility in the overall relationshipbetween the input and the output of the converter. With the use of multipletransformer windings, switching converters can be designed to provide multi-ple output voltages.7.2TRANSFORMER MODELSTransformers have two basic functions: to provide electrical isolation and to stepup or step down time-varying voltages and currents. Atwo-winding transformerhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 265
266CHAPTER 7DC Power Suppliesis depicted in Fig. 7-1a. An idealized model for the transformer, as shown in Fig. 7-1b, has input-output relationships(7-1)The dot convention is used to indicate relative polarity between the twowindings. When the voltage at the dotted terminal on one winding is positive, thevoltage at the dotted terminal on the other winding is also positive. When currententers the dotted terminal on one winding, current leaves the dotted terminal onthe other winding.Amore complete transformer model is shown in Fig. 7-1c. Resistors r1and r2represent resistances of the conductors, L1and L2represent leakageinductances of the windings, Lmrepresents magnetizing inductance, and rmrepresents core loss. The ideal transformer is incorporated into this model to represent the voltage and current transformation between primary and secondary.In some applications in this chapter, the ideal transformer representation issufÞcient for preliminary investigation of a circuit. The ideal model assumes thatthe series resistances and inductances are zero and that the shunt elements areinÞnite. Asomewhat better approximation for power supply applications includesthe magnetizing inductance Lm, as shown in Fig. 7-1d. The value of Lmis animportant design parameter for the ßyback converter.i1i2N2N1v1v2N1N2i1i1i2i2+−v2+−v2+−v1+−v1N1N2(b)i1i2+−v2+−v1N1N2LmN1N1N2N2r2r1rmL2LmL1(d)(c)(a)Figure 7-1(a) Transformer; (b) Ideal model; (c) Complete model; (d) Model used for most powerelectronics circuits.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 266
7.3The Flyback Converter267The leakage inductances L1and L2are usually not crucial to the generaloperation of the power electronics circuits described in this chapter, but they areimportant when considering switching transients. Note that in ac power systemapplications, the leakage inductance is normally the important analysis anddesign parameter.For periodic voltage and current operation for a transformer circuit, themagnetic flux in the core must return to its starting value at the end of eachswitching period. Otherwise, flux will increase in the core and eventuallycause saturation. Asaturated core cannot support a voltage across a trans-former winding, and this will lead to device currents that are beyond thedesign limits of the circuit.7.3THE FLYBACK CONVERTERContinuous-Current ModeAdc-dc converter that provides isolation between input and output is the ßybackcircuit of Fig. 7-2a. In a Þrst analysis, Fig. 7-2buses the transformer modelwhich includes the magnetizing inductance Lm, as in Fig. 7-1d. The effects of+−Vo+−Vs(a)isi1i2iDiLmLmiRiC+−Vo−+v2++ vD −−v1VsN1N2(b)+−vSW+−TransformerCRFigure 7-2(a) Flyback converter; (b) Equivalent circuit using a transformer model that includes the magnetizing inductance; (c) Circuit for the switch on; (d) Circuit for the switch off.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 267
268CHAPTER 7DC Power Supplieslosses and leakage inductances are important when considering switch perfor-mance and protection, but the overall operation of the circuit is best understoodwith this simpliÞed transformer model. Note the polarity of the transformerwindings in Fig. 7-2.Additional assumptions for the analysis are made:1.The output capacitor is very large, resulting in a constant output voltage Vo.2.The circuit is operating in the steady state, implying that all voltages andcurrents are periodic, beginning and ending at the same points over oneswitching period.3.The duty ratio of the switch is D, being closed for time DTand open for (1 D)T.4.The switch and diode are ideal.The basic operation of the ßyback converter is similar to that of the buck-boost converter described in Chap. 6. Energy is stored in Lmwhen the switch isclosed and is then transferred to the load when the switch is open. The circuit isanalyzed for both switch positions to determine the relationship between inputand output.Analysis forthe Switch ClosedOn the source side of the transformer (Fig. 7-2c),Solving for the change in current in the transformer magnetizing inductance,(7-2)(iLm)closedVsDTLmdiLmdtiLmtiLmDTVsLmv1VsLm diLmdt++−−(c)(d)0is = iLmiDiLm+−v1 = VsVsN1VoN20+−iLm+−v1 = −Vov2 = −VsVsN1N2+−N1N2vSW = Vs + VoN1N2+−Figure 7-2(continued)har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 268
7.3The Flyback Converter269On the load side of the transformer,Since the diode is off, i20, which means that i10. So while the switch isclosed, current is increasing linearly in the magnetizing inductance Lm, andthere is no current in the windings of the ideal transformer in the model.Remember that in the actual transformer, this means that the current isincreasing linearly in the physical primary winding, and no current exists inthe secondary winding.Analysis forthe Switch OpenWhen the switch opens (Fig. 7-2d), the currentcannot change instantaneously in the inductance Lm, so the conduction path mustbe through the primary turns of the ideal transformer. The current iLmenters theundotted terminal of the primary and must exit the undotted terminal of the sec-ondary. This is allowable since the diode current is positive. Assuming that theoutput voltage remains constant at Vo, the transformer secondary voltage v2becomes Vo. The secondary voltage transforms back to the primary, establish-ing the voltage across LmatVoltages and currents for an open switch areSolving for the change in transformer magnetizing inductance with the switchopen,(7-3)(iLm)openVo(1D)TLm aN1N2b diLmdtiLmtiLm(1D)TVoLmaN1N2bLm diLmdtv1VoaN1N2bv1v2aN1N2bVoaN1N2bv2Vov1VoaN1N2bi10i20vDVoVsaN2N1b 0v2v1aN2N1bVsaN2N1bhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 269
270CHAPTER 7DC Power SuppliesSince the net change in inductor current must be zero over one period forsteady-state operation, Eqs. (7-2) and (7-3) showSolving for Vo,(7-4)Note that the relation between input and output for the ßyback converter is sim-ilar to that of the buck-boost converter but includes the additional term for thetransformer ratio.Other currents and voltages of interest while the switch is open are(7-5)Note that vsw, the voltage across the open switch, is greater than the source volt-age. If the output voltage is the same as the input and the turns ratio is 1, forexample, the voltage across the switch will be twice the source voltage. Circuitcurrents are shown in Fig. 7-3.The power absorbed by the load resistor must be the same as that suppliedby the source for the ideal case, resulting inor(7-6)The average source current Isis related to the average of the magnetizing induc-tance current ILmby(7-7)Is(ILm)DTTILmDVsIsV2oRPsPoiCiDiRiLmaN1N2bVoRiRVoRvswVsv1VsVoaN1N2biDi1aN1N2biLmaN1N2b VoVsaD1DbaN2N1b Vs DTLmVo(1D)TLmaN1N2b0 (iLm)closed(iLm)open0har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 270
7.3The Flyback Converter271iLmΔiLmDTTttttt(a)isDTT(b)iDDTT(c)(d)iCVoR−(e)Vsv1N1N2−VoFigure 7-3Flyback converter current and voltage waveforms.(a) Magnetizing inductance current; (b) Source current; (c) Diodecurrent; (d) Capacitor current; (e) Transformer primary voltage.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 271
272CHAPTER 7DC Power SuppliesSubstituting for Isin Eq. (7-6) and solving for ILm,(7-8)Using Eq. (7-4) for Vs, the average inductor current is also expressed as(7-9)The maximum and minimum values of inductor current are obtained from Eqs. (7-9) and (7-2).(7-10)(7-11)Continuous-current operation requires that ILm,min0 in Eq. (7-11). At theboundary between continuous and discontinuous current,where fis the switching frequency. Solving for the minimum value of Lmthat willallow continuous current,(7-12)In a ßyback converter design, Lmis selected to be larger than Lm,minto ensure continuous current operation. Aconvenient expression relating inductance andcurrent variation is found from Eq. (7-2).(7-13)LmVs DTiLmVs DiLm f (Lm)min(1D)2R2f aN1N2b2 VsD(1D)2RaN2N1b2VsDT2LmVsD2Lm f ILm, min 0 VsD(1D)2R aN2N1b2VsDT2LmILm, min ILmiLm2 VsD(1D)2RaN2N1b2VsDT2LmILm, maxILmiLm2ILmVs D(1D)2RaN2N1b2Vo(1D)RaN2N1bILmV2oVs DRVs ILmDV2oRhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 272
7.3The Flyback Converter273The output configuration for the flyback converter is the same as for the buck-boost converter, so the output ripple voltages for the two converters are alsothe same.(7-14)As with the converters described in Chap. 6, the equivalent series resistance ofthe capacitor can contribute signiÞcantly to the output voltage ripple. The peak-to-peak variation in capacitor current is the same as the maximum current in the diodeand the transformer secondary. Using Eq. (7-5), the voltage ripple due to the ESR is(7-15)Vo, ESRiCrCILm, maxaN1N2brC VoVoDRCf EXAMPLE 7-1Flyback ConverterAßyback converter of Fig. 7-2has the following circuit parameters:Vs24 VN1/N23.0Lm500 HR5 C200 Ff40 kHzVo5 VDetermine (a) the required duty ratio D; (b) the average, maximum, and minimum valuesfor the current in Lm; and (c) the output voltage ripple. Assume that all components are ideal.■Solution(a)Rearranging Eq. (7-4) yields(b)Average current in Lmis determined from Eq. (7-8).The change in iLmcan be calculated from Eq. (7-2).iLmVs DLm f(24)(0.385)500 (10)6(40,000)460 mAILmV2oVsDR52(24)(0.385)(5)540 mAD1(Vs>Vo)(N2>N1)11(24>5)(1>3)10.385VoVsaD1DbaN2N1bhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 273
274CHAPTER 7DC Power SuppliesMaximum and minimum inductor currents can be computed fromEquations (7-10) and (7-11), which are derived from the above computation, couldalso be used directly to obtain the maximum and minimum currents. Note that apositive ILm,minveriÞes continuous current in Lm.(c)Output voltage ripple is computed from Eq. (7-14).VoVoDRCf0.385(5)3200(10)64(40,000)0.00960.96%ILm, minILmiLm25404602310 mAILm, maxILmiLm25404602770 mAEXAMPLE 7-2Flyback Converter Design, Continuous-Current ModeDesign a converter to produce an output voltage of 36 Vfrom a 3.3-Vsource. The outputcurrent is 0.1 A. Design for an output ripple voltage of 2 percent. Include ESR whenchoosing a capacitor. Assume for this problem that the ESR is related to the capacitorvalue by rC105/C.■SolutionConsidering a boost converter for this application and calculating the required duty ratiofrom Eq. (6-27),The result of a high duty ratio will likely be that the converter will not function as desiredbecause of losses in the circuit (Fig. 6-10). Therefore, a boost converter would not be agood choice. Aßyback converter is much better suited for this application.As a somewhat arbitrary design decision, start by letting the duty ratio be 0.4. FromEq. (7-4), the transformer turns ratio is calculated to beRounding, let N2/N116. Recalculating the duty ratio using a turns ratio of 16 gives D0.405.To determine Lm, first compute the average current in Lmfrom Eq. (7-9), using IoVo/R.ILmVo(1D)RaN2N1bIo1DaN2N1ba0.110.405b162.69 AaN2N1bVoVsa1DDb363.3a10.40.4b16.36D1VsVo13.3360.908har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 274
7.3The Flyback Converter275Let the current variation in Lmbe 40 percent of the average current: iLm0.4(2.69) 1.08 A.As another somewhat arbitrary choice, let the switching frequency be 100 kHz. Using Eq. (7-13),Maximum and minimum currents in Lmare found from Eqs. (7-10) and (7-11) as 3.23 and2.15 A, respectively.The output voltage ripple is to be limited to 2 percent, which is 0.02(36) 0.72 V.Assume that the primary cause of the voltage ripple will be the voltage drop across theequivalent series resistance iCrC. The peak-to-peak variation in capacitor current is thesame as in the diode and the transformer secondary and is related to current in LmbyUsing Eq. (7-15),Using the relationship between ESR and capacitance given in this problem,The ripple voltage due to the capacitance only is obtained from Eq. (7-14) asshowing that the assumption that the voltage ripple is primarily due to the ESR was cor-rect. Astandard value of 3.3 F would be a good choice. Note that the designer shouldconsult manufacturersÕspeciÞcations for ESR when selecting a capacitor.The turns ratio of the transformer, current variation, and switching frequency wereselected somewhat arbitrarily, and many other combinations are suitable.Discontinuous-Current Mode in the Flyback ConverterFor the discontinuous-current mode for the ßyback converter, the current in the transformer increases linearly when the switch is closed, just as it did for the continuous-current mode. However, when the switch is open, the current in thetransformer magnetizing inductance decreases to zero before the start of the nextswitching cycle, as shown in Fig. 7-4. While the switch is closed, the increase ininductor current is described by Eq. (7-2). Since the current starts at zero, themaximum value is also determined from Eq. (7-2).(7-16)ILm, maxVsDTLm VoVoDRCf0.405(36 V>0.1 A)32.8(10)64(100,000)0.0040.04%C105rC1053.562.8 FrCVo, ESRiC0.72 V0.202 A3.56 ÆiCILm, maxaN1N2b(3.23 A)a116b0.202 ALmVs DiLm f3.3(0.405)1.08(100,000)12.4 Hhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 275
276CHAPTER 7DC Power SuppliesThe output voltage for discontinuous-current operation can be determinedby analyzing the power relationships in the circuit. If the components are ideal,the power supplied by the dc source is the same as the power absorbed by theload resistor. Power supplied by the source is the dc voltage times average sourcecurrent, and load power is Vo2/R:(7-17)Average source current is the area under the triangular waveform of Fig. 7-4bdivided by the period, resulting in(7-18)Equating source power and load power [Eq. (7-17)],(7-19)Solving for Vofor discontinuous-current operation in the ßyback converter,(7-20) VoVsDATR2LmVsDAR2Lmf V2sD2T2LmV2oR Isa12baVsDTLmb(DT)a1TbVsD2T2Lm PsPoVs IsV2oRiLmDTTttisDTTFigure 7-4Discontinuous current for the ßyback converter.EXAMPLE 7-3Flyback Converter, Discontinuous CurrentFor the ßyback converter in Example 7-1, the load resistance is increased from 5 to 20 with all other parameters remaining unchanged. Show that the magnetizing inductancecurrent is discontinuous, and determine the output voltage.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 276
7.4The Forward Converter277■SolutionUsing Lm500 H, f40 kHz, N1/N23, D0.385, and R20 , the minimuminductor current from Eq. (7-11) is calculated asSince negative current in Lmis not possible, iLmmust be discontinuous. Equivalently, theminimum inductance for continuous current can be calculated from Eq. (7-12).which is more than the 500 H speciÞed, also indicating discontinuous current.Using Eq. (7-20),For the current in Lmin the discontinuous-current mode, the output voltage is no longer 5 Vbut increases to 6.53 V. Note that for any load that causes the current to be continu-ous, the output would remain at 5 V.Summary of Flyback ConverterOperationWhen the switch is closed in the ßyback converter of Fig. 7-2a, the source volt-age is across the transformer magnetizing inductance Lmand causes iLmtoincrease linearly. Also while the switch is closed, the diode on the output isreverse-biased, and load current is supplied by the output capacitor. When theswitch is open, energy stored in the magnetizing inductance is transferredthrough the transformer to the output, forward-biasing the diode and supplyingcurrent to the load and to the output capacitor. The input-output voltage relation-ship in the continuous-current mode of operation is like that of the buck-boostdc-dc converter but includes a factor for the turns ratio.7.4THE FORWARD CONVERTERThe forward converter, shown in Fig. 7-5a, is another magnetically coupled dc-dc converter. The switching period is T, the switch is closed for time DTandopen for (1 D)T. Steady-state operation is assumed for the analysis of the cir-cuit, and the current in inductance Lxis assumed to be continuous.The transformer has three windings: windings 1 and 2 transfer energy fromthe source to the load when the switch is closed; winding 3 is used to provide apath for the magnetizing current when the switch is open and to reduce the mag-netizing current to zero before the start of each switching period. The transformerVoVsDAR2Lm f(24)(0.385)A202(500)(10)6(40,000)6.53 V (Lm) min (1D)2R2faN1N2b2(10.385)2202(40,000) (3)2850 H (24)(0.385)(10.385)2(20)a13b2(24)(0.385)2(500)(10)6(40,000)95 mAILm, minVsD(1D)2RaN2N1b2VsDT2Lmhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 277
D3v3vD3N1N3i3isi1iLmLm+++—v1+-vSWVs+-N2D2D1i2v2+-vxVoVovLxiLxLx+++—CRN1N3i1iLm+-v1 = Vs+-VsN2v2 = Vs = vx+-vLxiLx++–RN2N1N1N3i3iLm+-VsN2vx = 0VovLxiLx+++—(a)(b)(c)Figure 7-5(a) Forward dc-dc converter; (b) Circuit for switch closed; (c) Circuit for switchopen.278har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 278
7.4The Forward Converter279is modeled as three ideal windings with a magnetizing inductance Lm, which isplaced across winding 1. Leakage inductance and losses are not included in thissimpliÞed transformer model.For the forward converter, energy is transferred from the source to the loadwhile the switch is closed. Recall that for the ßyback converter, energy wasstored in Lmwhen the switch was closed and transferred to the load when theswitch was open. In the forward converter, Lmis not a parameter that is includedin the input-output relationship and is generally made large.Analysis forthe Switch ClosedThe equivalent circuit for the forward con-verter with the switch closed is shown in Fig. 7-5b. Closing the switch estab-lishes the voltage across transformer winding 1, resulting in(7-21)The voltage across D3isshowing that D3is off. Apositive v2forward-biases D1and reverse-biases D2.The relationship between input and output voltages can be determined byexamining the current in inductor Lx. Assuming the output is held at a constant Vo,(7-22)The voltage across the magnetizing inductance Lmis also Vs, resulting in(7-23)Equations (7-22) and (7-23) show that the current is increasing linearly in bothLxand Lmwhile the switch is closed. The current in the switch and in the physi-cal transformer primary is(7-24)Analysis forthe Switch OpenFigure 7-5cshows the circuit with the switchopen. The currents in Lxand Lmdo not change instantaneously when the switchiswi1iLmiLmVsDTLm (iLx)closedcVsaN2N1bVodDTLx diLxdtVs(N2>N1)VoLxiLxtiLxDT vLxv2VoVsaN2N1bVoLx diLxdtVD3Vsv3 0v3v1aN3N1bVsaN3N1bv2v1aN2N1bVsaN2N1bv1Vshar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 279
280CHAPTER 7DC Power Suppliesis opened. Continuity of iLmestablishes i1iLm. Looking at the transformationfrom winding 1 to 2, current out of the dotted terminal on 1 would establish cur-rent into the dotted terminal on 2, but diode D1prevents current in that direction.For the transformation from winding 1 to 3, current out of the dotted termi-nal of winding 1 forces current into the dotted terminal of winding 3. Diode D3is then forward-biased to provide a path for winding 3 current, which must goback to the source.When D3is on, the voltage across winding 3 is established atWith v3established, v1and v2become(7-25)With D1off and positive current in Lx, D2must be on. With D2on, the voltageacross Lxisresulting in(7-26)Therefore, the inductor current decreases linearly when the switch is open.For steady-state operation, the net change in inductor current over oneperiod must be zero. From Eq. (7-22) and (7-26),Solving for Vo,(7-27)Note that the relationship between input and output voltage is similar to that forthe buck dc-dc converter except for the added term for the turns ratio. Current inLxmust be continuous for Eq. (7-27) to be valid. VoVsDaN2N1b cVsaN2N1bVod DTLxVo(1D)TLx0(iLx)closed(iLx)open0(iLx)openVo(1D)TLx diLxdtVoLiLxtiLx(1D)TvLxVoLx diLxdtv2v3aN2N3bVsaN2N3bv1v3aN1N3bVsaN1N3bv3Vs har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 280
7.4The Forward Converter281Meanwhile, the voltage across Lmis v1, which is negative, resulting in(7-28)The current in Lmshould return to zero before the start of the next periodto reset the transformer core (return the magnetic ßux to zero). When theswitch opens, Eq. (7-28) shows that iLmdecreases linearly. Since D3will pre-vent iLmfrom going negative, Eq. (7-28) is valid as long as iLmis positive.FromEq. (7-28),(7-29)For iLmto return to zero after the switch is opened, the decrease in current mustequal the increase in current given by Eq. (7-22). Letting Txbe the time for iLmto decrease from the peak back to zero,(7-30)Solving for Tx,(7-31)The time at which the current iLmreaches zero t0, is(7-32)Because the current must reach zero before the start of the next period,s(7-33)For example, if the ratio N3/N11 (a common practice), then the duty ratio Dmust be less than 0.5.The voltage across the open switch is Vsv1, resulting in(7-34)vswLVsv1VsaVs N1N3bVsa1N1N3bVs for DT t t0for t0 t T t0 TDT a1N3N1b T D a1N3N1b 1t0DTTxDTDT aN3N1bDT a1N3N1bTxDT aN3N1biLmTxVsDTLmVsLm aN1N3biLmtVsLm aN1N3bdiLmdtVsLmaN1N3bvLmv1VsaN1N3bLm diLmdthar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 281
282CHAPTER 7DC Power SuppliesForward converter current and voltage waveforms are shown in Fig. (7-6).The circuit conÞguration on the output of the forward converter is the sameas that for the buck converter, so the output voltage ripple based on an idealcapacitance is also the same.iLxΔiLxDTTiLmΔiLmΔTxDTTt0i1i2DTTt0i3N2N1VsDTTvxFigure 7-6Current and voltage waveforms for the forward converter.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 282
7.4The Forward Converter283(7-35)The equivalent series resistance of the capacitor often dominates the output volt-age ripple. The peak-to-peak voltage variation due to the ESR is(7-36)where Eq. (7-26) is used for iLx.Summary of Forward ConverterOperationWhen the switch is closed, energy is transferred from the source to the loadthrough the transformer. The voltage on the transformer secondary is a pulsedwaveform, and the output is analyzed like that of the buck dc-dc converter.Energy stored in the magnetizing inductance while the switch is closed can bereturned to the input source via a third transformer winding while the switchis open.Vo, ESRiCrCiLxrCcVo (1D)Lx fdrC VoVo1D8Lx Cf2 EXAMPLE 7-4Forward ConverterThe forward converter of Fig. 7-5ahas the following parameters:Vs48 VR10 Lx0.4 mH,Lm5 mHC100 Ff35 kHzN1/N21.5,N1/N31D0.4(a) Determine the output voltage, the maximum and minimum currents in Lx, and the out-put voltage ripple. (b) Determine the peak current in the transformer primary winding.Verify that the magnetizing current is reset to zero during each switching period. Assumeall components are ideal.■Solution(a)The output voltage is determined from Eq. (7-27).Average current in Lxis the same as the current in the load.ILxVoR12.8101.28 AVoVsDaN2N1b48(0.4)a11.5b12.8 Vhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 283
284CHAPTER 7DC Power SuppliesThe change in iLxis determined from Eq. (7-22) or (7-26). Using Eq. (7-26),Maximum and minimum currents in Lxare then(b)Current in the primary winding of the transformer is the sum of the reßected currentfrom the secondary and the magnetizing currents. The peak secondary current is thesame as ILx,max. The peak magnetizing current is obtained from Eq. (7-23).The peak current in the transformer primary is thereforeThe time for the magnetizing current to return to zero after the switch is opened isdetermined from Eq. (7-31).Since the switch is closed for DT11.4 s, the time at which the magnetizing currentreaches zero is 22.8 s [Eq. (7-32)], which is less than the switching period of 28.6 s.TxDT aN3N1b0.4(1)35,00011.4 sImaxILx, maxaN2N1bILm, max1.56a11.5b0.111.15 AILm, maxiLmVsDTLm48(0.4)5(10)3(35,000)0.11 AILx, maxILxiLx21.280.5521.56 AILx, minILxiLx21.280.5521.01 AiLxVo(1D)Lx f12.8(10.4)0.4(10)3(35,000)0.55 AEXAMPLE 7-5Forward Converter DesignDesign a forward converter such that the output is 5 Vwhen the input is 170 V. The output current is 5 A. The output voltage ripple must not exceed 1 percent. Choose thetransformer turns ratio, duty ratio, and switching frequency. Choose Lxsuch that the cur-rent in it is continuous. Include the ESR when choosing a capacitor. For this problem, userC105/C.■SolutionLet the turns ratio N1/N31. This results in a maximum duty ratio of 0.5 for the switch.For margin, let D0.35. From Eq. (7-27),Rounding, let N1/N212. Recalculating Dfor N1/N212 yieldsDVoVsaN1N2ba5170b(12)0.353N1N2VsDVo170 (0.35)511.9har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 284
7.5The Double-Ended (Two-Switch) Forward Converter285The inductor Lxand the capacitor are selected using the same design criteria as discussedfor the buck converter in Chap. 6. For this design, let f300 kHz. The average currentin Lxis 5 A, the same as average current in the load since the average current in the capac-itor is zero. Let the variation in inductor current be 2 A, which is 40 percent of the aver-age value. From Eq. (7-26),Astandard value of 5.6 H is suitable for this design and would result in a slightlysmaller iLx.For a 1 percent output voltage ripple,The capacitor size is determined by assuming that the voltage ripple is produced primar-ily by the equivalent series resistance, orThe designer would now search for a capacitor having a 25-mor lower ESR. Using rC105/Cgiven in this problem,Astandard value of 470 F is suitable.7.5THE DOUBLE-ENDED (TWO-SWITCH)FORWARD CONVERTERThe forward converter discussed in Sec. 7.4 has a single transistor switch and isreferred to as a single-ended converter. The double-ended (two-switch) forwardconverter shown in Fig. 7-7is a variation of the forward converter. In this circuit,the switching transistors are turned on and off simultaneously. When theswitches are on, the voltage across the primary transformer winding is Vs. Thevoltage across the secondary winding is positive, and energy is transferred to the load, as it was for the forward converter discussed in Sec. 7.4. Also when theswitches are on, the current in the magnetizing inductance is increasing. Whenthe switches turn off, diode D1prevents iLmfrom ßowing in the secondary (andhence primary) winding of the transformer and forces the magnetizing current toßow in diodes D3and D4and back to the source. This establishes the primaryvoltage at Vs, causing a linear decrease in magnetizing current. If the duty ratioof the switches is less than 0.5, the transformer core resets (the magnetic ßuxreturns to zero) during every cycle.C1050.025400 FrC0.05 V2 A0.025 Æ25 mÆVoLVo, ESRiCrC(2 A)(rC)0.05 Vvo (0.01)(5)0.05 VLxVo(1D)TiLxVo(1D)0.4ILx f5(10.353)0.4(5)(300,000)5.39 Hhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 285
286CHAPTER 7DC Power SuppliesThe output voltage is the same as for the single-ended forward converter[Eq. (7-27)]. An advantage of the double-ended forward converter is that the voltage across an off transistor is Vsrather than Vs(1 + N1/N3) as it was forthe single-ended forward converter. This is an important feature for high-voltageapplications.(a)(b)+−VsiLm0VoiLx+−+−00(c)iLmN1+−VsVsVoN2iLx++−−+−RCiLxN2N1VsVoLxD1D2vLx++−−RC+−VsD4D3iLmLmN1N2Figure 7-7(a) Double-ended forward converter; (b) Circuit for the switchesclosed; (c) Circuit for the switches open.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 286
7.6The Push-Pull Converter2877.6THE PUSH-PULLCONVERTERAnother dc-dc converter that has transformer isolation is the push-pull convertershown in Fig. 7-8a. As with the forward converter, the transformer magnetizinginductance is not a design parameter. The transformer is assumed to be ideal for(d)(c)ΔiLxiLxDTT2T+ DTT2vx(b)DTTT2+ DTT2OnSw1Sw2(a)VovS2S2P2P1Np : NsS1Sw1Sw2vx+−vLxD1D2+++−−vP2+−vS1+−vSW+−vP1+−−RC+−VsiLxLxFigure 7-8(a) Push-pull converter; (b) Switching sequence; (c) Voltage vx;(d) Current in Lx.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 287
288CHAPTER 7DC Power Suppliesthis analysis. Switches Sw1and Sw2turn on and off with the switching sequenceshown in Fig. 7-8b. Analysis proceeds by analyzing the circuit with either switchclosed and then with both switches open.Switch Sw1ClosedClosing Sw1establishes the voltage across primary wind-ing P1at(7-37)The voltage across P1is transformed to the three other windings, resulting in(7-38)Diode D1is forward-biased, D2is reverse-biased, and(7-39)Assuming a constant output voltage Vo, the voltage across Lxis a constant, result-ing in a linearly increasing current in Lx. In the interval when Sw1is closed, thechange in current in Lxis iLxtiLxDTVs(NS>NP)VoLxvLxvxVoVsaNSNPbVovxvS2VsaNSNPb vS1VsaNSNPb vS2VsaNSNPb vP2VsvSw22VsvP1Vs (7-40)(iLx)closedcVs(NS>NP)VoLxdDTSwitch Sw2ClosedClosing Sw2establishes the voltage across primary windingP2at(7-41)The voltage across P2is transformed to the three other windings, resulting in(7-42)vP1VsvS1VsaNSNPbvS2VsaNSNPbvS12VsvP2Vs har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 288
7.6The Push-Pull Converter289Diode D2is forward-biased, D1is reverse-biased, and(7-43)which is a positive pulse. The current in Lxincreases linearly while Sw2is closed,and Eq. (7-40) applies.Both Switches OpenWith both switches open, the current in each of the primary windings is zero. The current in the Þlter inductor Lxmust maintain con-tinuity, resulting in both D1and D2becoming forward-biased. Inductor currentdivides evenly between the transformer secondary windings. The voltage acrosseach secondary winding is zero, and(7-44)The voltage across Lxis Vo, resulting in a linearly decreasing current in Lx. Thechange in current while both switches are open isSolving for iLx,(7-45)Since the net change in inductor current over one period must be zero for steady-state operation,(7-46)Solving for Vo,(7-47)where Dis the duty ratio of eachswitch. The above analysis assumes continuouscurrent in the inductor. Note that the result is similar to that for the buck con-verter, discussed in Chap. 6. Ripple voltage on the output is derived in a mannersimilar to the buck converter. The output ripple for the push-pull converter is(7-48) VoVo12D32LxCf2 Vo2VsaNSNPbD cVs(NS>NP)VoLxdDTaVoLxba12DbT0(iLx)closed(iLx)open0(iLx)openaVoLxba12DbT iLxtiLxT>2DTVoLxvx0vLxvxVoVovLxvxVoVsaNSNPbVovxvS2VsaNSNPbhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 289
290CHAPTER 7DC Power SuppliesAs with the other converters analyzed previously, the equivalent series resistanceof the capacitor is usually responsible for most of the voltage output ripple. Recognizing that iCiLxand using Eq. (7-45),(7-49)The preceding analysis neglected the magnetizing inductance of the trans-former. If Lmwere included in the equivalent circuit, iLmwould increase linearlywhen Sw1was closed, circulate while both Sw1and Sw2were open, and decreaselinearly when Sw2was closed. Because Sw1and Sw2are closed for equal inter-vals, the net change in iLmis zero, and the transformer core is reset during eachperiod in the ideal case. In actual applications of the push-pull converter, controltechniques are used to ensure that the core is reset.Summary of Push-Pull OperationPulses of opposite polarity are produced on the primary and secondary windingsof the transformer by switching Sw1and Sw2(Fig. 7-8). The diodes on the sec-ondary rectify the pulse waveform and produce a waveform vxat the input of thelow-pass Þlter, as shown in Fig. 7-8c. The output is analyzed like that of the buckconverter discussed in Chap. 6.Vo, ESRiCrCiLx rCBVoA12DBLx fRrCEXAMPLE 7-6Push-Pull ConverterApush-pull converter has the following parameters:Vs30 VNP/NS2D0.3Lx0.5 mHR6 C50 Ff10 kHzDetermine Vo, the maximum and minimum values of iLx, and the output ripple voltage.Assume all components are ideal.■SolutionUsing Eq. (7-47), the output voltage isAverage inductor current is the same as average load current,ILxVoR961.5 AVo2VsaNSNPbD(2)(30)a12b(0.3)9.0 Vhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 290
7.7Full-Bridge and Half-Bridge DC-DC Converters291The change in iLxis determined from Eq. (7-45).resulting in maximum and minimum currents ofOutput voltage ripple is determined from Eq. (7-48).7.7FULL-BRIDGE AND HALF-BRIDGE DC-DC CONVERTERSThe full-bridge and half-bridge converters shown in Figs. 7-9 and 7-10 are simi-lar in operation to the push-pull converter. Assuming that the transformer isideal, the full-bridge converter of Fig. 7-9ahas switch pairs (Sw1, Sw2) and (Sw3,Sw4) alternate closing. When Sw1and Sw2are closed, the voltage across thetransformer primary is Vs. When Sw3and Sw4are closed, the transformer pri-mary voltage is Vs. For an ideal transformer, having all switches open willmake vp0. With a proper switching sequence, the voltage vpacross the trans-former primary is the alternating pulse waveform shown in Fig. 7-9c. Diodes D1and D2on the transformer secondary rectify this waveform to produce the volt-age vxas shown in Fig. 7-9d. This vxis identical to the vxshown in Fig. 7-8cforthe push-pull converter. Hence the output of the full-bridge converter is analyzedas for the push-pull converter, resulting in(7-50)where Dis the duty ratio of eachswitch pair.Note that the maximum voltage across an open switch for the full-bridgeconverter is Vs, rather than 2Vsas for the push-pull and single-ended forwardconverters. Reduced voltage stress across an open switch is important whenthe input voltage is high, giving the full-bridge converter an advantage.The half-bridge converter of Fig. 7-10ahas capacitors C1and C2which arelarge and equal in value. The input voltage is equally divided between the Vo2VsaNSVPbD 0.0050.5%VoVo12D32f2LxC12(0.3)32(10,000)2(0.5)(10)3(50)(10)6ILx, maxILxiLx21.68 AILx, minILxiLx21.32 AiLxVoA12DBTLx9 (0.50.3)0.5(10)3(10,000)0.36 Ahar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 291
(a)VoNSNSvx+−D1D2+−RCLxNPSw4Sw1Sw3Sw2vP+−+−Vs(b)T2+ DTT2T2+ DTT2DTTClosedSw1, Sw2Sw3, Sw4vPVs−Vs(c)(d)DTTvxNSNPVsFigure 7-9(a) Full-bridge converter; (b) Switching sequence; (c) Voltageon the transformer primary; (d) Voltage vx.292har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 292
(a)VoNSNSvx+−D1D2+−RCLxNPC2C1Sw1Sw2vP++−−+−VsVs2+−Vs2(b)T2+ DTT2DTTClosedSw1Sw2vP−(c)(d)DTT2T+ DTT2vxNSNPVs2Vs2Vs2Figure 7-10(a) Half-bridge converter; (b) Switching sequence; (c) Voltageon the transformer primary; (d) Voltage vx.293har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 293
294CHAPTER 7DC Power Suppliescapacitors. Switches Sw1and Sw2close with the sequence shown, producingan alternating voltage pulse vPon the transformer primary. The rectiÞed sec-ondary voltage vxhas the waveform shown in Fig. 7-10d. Voltage vxis the sameform as for the push-pull and the full-bridge converters, but the amplitude isone-half the value. The relationship between the input and output voltages forthe half-bridge converter is(7-51)where Dis the duty ratio of eachswitch. The voltage across an open switch forthe half-bridge converter is Vs.7.8CURRENT-FED CONVERTERSThe converters described thus far in this chapter are called voltage-fed con-verters. Another method of controlling output is to establish a constant sourcecurrent and use the switches to direct the current. Current control has advan-tages over voltage control for some converters. Acircuit that operates byswitching current rather than voltage is called a current-fed converter. Figure 7-11shows a circuit that is a modification of the push-pull converter.The inductor Lxhas been moved from the output side of the transformer to theinput side. Alarge inductor in this position establishes a nearly constantsource current. Switch Sw1directs the current through winding P1, and switchSw2directs the current through winding P2. With both switches closed, thecurrent divides evenly between the windings. At least one switch must beclosed to provide a current path.The switching sequence and waveforms are shown in Fig. 7-11. The follow-ing analysis assumes that Lxis large and the current in it is a constant ILx. Thetransformer is assumed to be ideal.Sw1Closed and Sw2OpenThe inductor current ILxßows through primarywinding P1and through D1on the secondary when switch 1 is closed and switch 2is open. D1is on, D2is off, and the following equations apply:(7-52)vSw2vP1vP22VoaNPNSb vLxVsvP1VsVoaNPNSb vP1VoaNPNSb iD1ILxaNPNSb VoVsaNSNPbD har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 294
VoP2P1N1NP : NSvSw2vSw1+−D1D2vP2vLxLxiLx+−+−++−−vP1+−RC+−VsixiD1iD2S1DTTS2(a)(b)(c)TiD1iD2ixvLx(1 − D)T(1 − D)TClosedFigure 7-11(a) Acurrent-fed converter; (b) Switching sequence; (c) Current andvoltage waveforms.295har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 295
296CHAPTER 7DC Power SuppliesSw1Open and Sw2ClosedWith switch 1 open and switch 2 closed, ILxßowsthrough primary winding P2and through D2on the secondary. D1is off and D2ison, and the following equations apply:(7-53)Both Sw1and Sw2ClosedWith both switches closed, ILxdivides evenly be-tween the two primary windings, and both D1and D2are off. The voltage on eachprimary winding is zero:Inductor Lxthen has the source voltage across it:(7-54)The average voltage across Lxmust be zero for steady-state operation. Duringone switching period, vLxVsVo(NP/NS) for two intervals of (1 D)Twhenonly one switch is closed, and vLxVsfor the remaining time, which is T2(1 D)T(2D 1)T. The average inductor voltage is thus expressed as(7-55)Solving for Vo,(7-56)where Dis the duty ratio of eachswitch. This result is similar to that of the boostconverter. Note that the duty ratio of each switch must be greater than 0.5 to pre-vent an open circuit in the path of the inductor current. VoVs2(1D)aNSNPb VLxVs(2D1)TcVsVoaNPNSbd2(1D)T0vLxVsvP1vP20 vSw1vP1vP22VoaNPNSb vLxVsVoaNPNSb vP2VoaNPNSb iD2ILxaNPNSbEXAMPLE 7-7Current-Fed ConverterThe current-fed converter of Fig. 7-11has an input inductor Lxthat is large enough toassume that the source current is essentially constant. The source voltage is 30 V, and thehar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 296
7.9Multiple Outputs297load resistor is 6 . The duty ratio of each switch is 0.7, and the transformer has a turnsratio of NP/NS2. Determine (a) the output voltage, (b) the current in Lx, and (c) the maximum voltage across each switch.■Solution(a)The output voltage is determined by using Eq. (7-56).(b)To determine ILx, recognize that the power delivered to the load must be the same asthat supplied by the source in the ideal case:which can be expressed asSolving for ILx,(c)The maximum voltage across each switch is determined from Eqs. (7-52) and (7-53).7.9MULTIPLE OUTPUTSThe dc power supply circuits discussed thus far in this chapter have only oneoutput voltage. With additional transformer windings, multiple outputs are possible. Flyback and forward converters with two outputs are shown inFig. 7-12.Multiple outputs are useful when different output voltages are necessary.The duty ratio of the switch and the turns ratio of the primary to the specificsecondary winding determine the output/input voltage ratio. An example is asingle converter with three windings on the output producing voltages of 12,5, and 5 Vwith respect to a common ground on the output side. Multipleoutputs are possible with all the dc power supply topologies discussed in thischapter. Note, however, that only one of the outputs can be regulated with afeedback control loop. Other outputs will follow according to the duty ratioand the load.Vsw, max2VoaNPNSb2(25)(2)100 VILxV2oVsR25230(6)3.47 AILxVsV2oR PsPoVoVs2(1D) aNSNPb302(10.7) a12b25 Vhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 297
298CHAPTER 7DC Power Supplies7.10CONVERTER SELECTIONIn theory, any power supply circuit can be designed for any application, depend-ing on how much the designer is willing to spend for components and controlcircuitry. In practice, some circuits are much more suited to particular applica-tions than others.The ßyback converter, having a low parts count, is a simple circuit to implementand is very popular for low-power applications. The main disadvantages are that theFigure 7-12(a) Flyback and (b) forward converters with two outputs.LmVo1+−+−Vs+−VsVo2+−Vo1+−Vo2+−(a)(b)har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 298
7.11Power Factor Correction299transformer core must be made large as power requirements increase, and the voltagestress across the switch is high (2Vs). Typical applications can go up to about 150 W,but the ßyback converter is used most often for an output power of 10 Wor less.The forward converter is a popular circuit for low and medium power levels,up to about 500 W. It has one transistor as does the ßyback, but it requires asmaller transformer core. Disadvantages are high voltage stress for the transistorand the extra cost of the Þlter inductor. The double-ended forward converter canbe used to reduce the switch voltage stress, but the drive circuit for one of thetransistors must be ßoating with respect to ground.The push-pull converter is used for medium to high power requirements,typically up to 1000 W. Advantages include transistor drive circuits that have acommon point and a relatively small transformer core because it is excited in bothdirections. Disadvantages include a high voltage stress for the transistors andpotential core saturation problems caused by a dc imbalance in nonideal circuits.The half-bridge converter is also used for medium power requirements, up toabout 500 W, and has some of the same advantages as the push-pull. The voltagestress on the switches is limited to Vs.The full-bridge converter is often the circuit of choice for high-power appli-cations, up to about 2000 W. The voltage stress on the transistors is limited to Vs.Extra transistors and ßoating drive circuits are disadvantages.Amethod of reducing switching losses is to use a resonant converter topol-ogy. Resonant converters switch at voltage or current zeros, thus reducing theswitch power loss, enabling high switching frequencies and reduced componentsizes. Resonant converters are discussed in Chap. 9.7.11POWER FACTOR CORRECTIONPower supplies often have an ac source as the input, and the Þrst stage is a full-wave rectiÞer that converts the ac input to a dc voltage. Figure 7-13, as discussedin Chap. 4, is one such arrangement. The diodes conduct for only a small amountof time during each cycle, resulting in currents that are highly nonsinusoidal. Theresult is a large total harmonic distortion (THD) of current coming from the acisvo+−vsis(a)Figure 7-13(a) Fullwave rectiÞer and (b) voltage and current waveforms. Thesource current is highly nonsinusoidal becausethe diodes conduct for a short time interval.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 299
300CHAPTER 7DC Power Suppliesvovsisis(b)Figure 7-13(continued)Figure 7-14(a) ArectiÞer circuit used to produce ahigh power factor and low THD; (b) Current in theinductor for continuous-current mode (CCM)operation; (c) Current from the ac source.isVo+−vsiLiLvs.kis(a)(b)(c)har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 300
7.12PSpice Simulation of DC Power Supplies301source. Alarge THD corresponds to a low power factor (see Chap. 2). The resis-tor represents any load on the output, which may be a dc-dc converter.Away to improve the power factor (and reduce the THD) is with a powerfactor correction circuit, as shown in Fig. 7-14a. Aboost converter is used tomake the current in the inductor approximate a sinusoid. When the switch isclosed, the inductor current increases. When the switch is open, the inductor cur-rent decreases. By using appropriate switching intervals, the inductor current canbe made to follow the sinusoidal shape of the full-wave rectiÞed input voltage.The voltage on the output of the diode bridge is a full-wave rectiÞed sinusoid.The current in the inductor is of the general form as shown in Fig. 7-14b, and theresulting current from the ac source is shown in Fig. 7-14c. This current is pre-dominantly at the same frequency and phase angle as the voltage, making thepower factor quite high and the THD quite low. This type of switching scheme iscalled continuous-current mode (CCM) power factor correction (PFC). In anactual implementation, the switching frequency would be much greater than isshown in the Þgure.Another type of switching scheme produces a current like that shown in Fig. 7-15. In this scheme, the inductor current varies between zero and a peak that follows a sinusoidal shape. This type of switching scheme is called discontinuous-current mode (DCM) power factor correction. DCM is used withlow-power circuits, while CCM is more suitable for high-power applications.In both the CCM and DCM schemes, the output of the power factor correc-tion (PFC) stage is a large dc voltage, usually on the order of 400 V. The outputof the PFC stage will go to a dc-dc converter. For example, a forward convertercan be used to step down the 400-Voutput of the PFC stage to 5 V.Other converter topologies in addition to the boost converter can be used forpower factor correction. The SEPIC and «Cuk converters are well suited for thispurpose.7.12PSPICE SIMULATION OFDC POWER SUPPLIESPSpice simulations of the magnetically coupled dc-dc converters discussed inthis chapter are similar to those of the dc-dc converters of Chap. 6. For initialinvestigation, the switches can be implemented with voltage-controlled switchesiLvs.kFigure 7-15Discontinuous-current mode(DCM) power factor correction.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 301
302CHAPTER 7DC Power Suppliesrather than with transistors, simplifying the switching and allowing examinationof the overall circuit behavior.Transformers can be modeled in PSpice as two or more inductances withideal coupling. Since inductance is proportional to the square of the turns in awinding, the transformer turns ratio is(7-57)For the ßyback converter, let L1Lmand determine L2from Eq. (7-57). Forother converters where Lmis not a design parameter, let L1be any large valueand determine L2accordingly. For two-winding transformers, the part XFRM_LINEAR can serve as a template.Figures 7-16and 7-17show circuits for the ßyback and forward convertertopologies. The ßyback simulation uses the XFRM_LINEAR part, and the forwardsimulation uses mutually coupled inductors. The switches and diodes are ideal-ized by setting Ron0.01 for the switches and n0.01 for the diodes. Just aswith the dc-dc converters in Chap. 6, transient voltages and currents precede thesteady-state waveforms that were presented in the earlier discussion of the con-verters in this chapter.7.13POWER SUPPLYCONTROLIn ideal switching dc-dc converters, the output voltage is a function of the inputvoltage and duty ratio. In real circuits with nonideal components, the output isalso a function of the load current because of resistances in the components. Apower supply output is regulated by modulating the duty ratio to compensate forvariations in the input or load. Afeedback control system for power supply con-trol compares output voltage to a reference and converts the error to a duty ratio.N1N2AL1L2 V1 = 0V2 = 5TD = 0TR = 1nTF = 1nPW = {Duty/Freq}PER = {1/Freq}PARAMETERS:Duty = 0.385Freq = 40kN1overN2 = 3Lm = 500uV20Ron=0.01.model Dbreak D n=0.01200uCR5OutputN1N2Vs24controlTX1FLYBACK CONVERTER++++−−−−(a)(b)Figure 7-16(a) The ßyback converter circuit for simulation; (b) Probe output showingthe transient and steady-state output voltage.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 302
7.13Power Supply Control303The buck converter operating in the continuous-current mode is used toillustrate the basics of power supply control. Figure 7-18ashows the converterand feedback loop consisting of1.The switch, including the diode and drive circuit2.The output Þlter3.Acompensated error ampliÞer4.Apulse-width modulating circuit that converts the output of the compensatederror ampliÞer to a duty ratio to drive the switchThe regulated converter is represented by the closed-loop system of Fig. 7-18b.Control Loop StabilityPerformance and stability of the control loop for regulating the output voltage fora converter can be determined from the open-loop characteristics:1.The gain at low frequencies should be large so the steady-state errorbetween the output and the reference signal is small.2.The gain at the converterÕs switching frequency should be small.V1 = 0V2 = 5TD = 0TR = 1nTF = 1nPW = {Duty/Freq}PER = {1/Freq}PARAMETERS:Freq = 200kDuty = 0.3N1overN2 = 2N1overN3 = 1Lm = 1mcontrolVcontrolFORWARD CONVERTER++L1L3111222primaryVs100+−D3SwitchS1{Lm}{Ls}{Lt}secondary12L2D1D2LxOutputR110C120u80uvxK_LinearCOUPLING = .999K+−−−Figure 7-17The forward converter circuit for simulation.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 303
304CHAPTER 7DC Power Supplies3.The open-loop phase shift at the crossover frequency (the frequency wherethe open-loop gain is unity) must lag by less than 180. If the phase lagwere 180(or 180), negative feedback provides a shift of another 180,resulting in a total of 360(or zero). Again of magnitude 1 and phase of360around the loop make the loop unstable. The open-loop phase shiftless than 180at crossover is called the phase margin. Aphase margin ofat least 45is a commonly used criterion for stability. Figure 7-19illustrates the concept of phase margin. Note that phase margin is the anglebetween the phase shift and zero when the 180phase angle of the invertingoperational ampliÞer is included, which is convenient for use with PSpiceanalysis.The transfer function of each block of the system in Fig. 7-18bmust be devel-oped to describe the control properties.Small-Signal AnalysisControl loop analysis is based on the dynamic behavior of voltages, currents, andswitching, unlike the steady-state analysis where the averaged circuit quantitiesare constants. Dynamic behavior can be described in terms of small-signal CompensatedErrorAmplifierPWMSwitchFilter andLoadVsVrefvcVsdvod+−(b)(a)VS+−VrefVo+−DriverPWMSwitchFilter and Load+−Figure 7-18(a) Buck converter with feedback; (b) Control representation.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 304
7.13Power Supply Control305variations around a steady-state operating point. Output voltage, duty ratio,inductor current, source voltage, and other quantities are represented as(7-58)In these equations, the steady-state or dc term is represented by the uppercase let-ters, the ~ (tilde) quantity represents the ac term or small-signal perturbation, andthe sum is the total quantity, represented by the lowercase letters.Switch TransferFunctionFor control purposes, the average values of voltages and currents are of greaterinterest than the instantaneous values that occur during the switching period.Equivalent representations of the switch in a buck converter are shown in Fig. 7-20.The relationship between input and output for the switch for a time-varying dutyratio is represented by the ideal transformation of 1 : dshown in Fig. 7-20b. Here,drepresents a time-varying duty ratio consisting of a dc (constant) component Dplus a small-signal componentd~.(7-59) dDd~vsVsv~siLILi~L dDd~voVov~oGain0 dBPhaseGainPhase MarginPhase0°−180°Gain0 dBPhaseGainPhase MarginPhase0°−180°Figure 7-19Phase margin. (a) In classical control theory,the phase margin is the angle difference between 180and the open-loop phase angle at the crossover frequency,where the open-loop gain magnitude is 0 dB; (b) The phasemargin is between zero and the phase angle when the 180phase angle of the inverting operational ampliÞer isincluded, which is convenient for PSpice simulation.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 305
306CHAPTER 7DC Power SuppliesAn alternative representation of the switch shown in Fig. 7-20cseparates thesteady-state and small-signal components. The transformer secondary voltage vxis related to the source voltage by(7-60)Neglecting the product of the small-signal terms,(7-61)Similarly, the current on the source side of the transformer is related to thesecondary current by(7-62)The circuit of Fig. 7-20c, with the transformer ratio Þxed at Dand the small-signal terms included with the dependent sources, satisÞes the voltage and cur-rent requirements of the switch expressed in Eqs. (7-61) and (7-62).FilterTransferFunctionThe input to the buck converter Þlter is the switch output, which is vxvsdonan averaged circuit basis in the continuous current mode. The RLCÞlter of thebuck converter has a transfer function developed from a straightforward applica-tion of circuit analysis in the sdomain. From Fig. 7-21a, the transfer function ofthe Þlter with the load resistor is(7-63)or(7-64)vo(s)d(s)VsLC3s2s(1>RC)1>LC4vo(s)vx(s)vo(s)Vsd(s)1LC3s2s(1>RC)1>LC4isiLd(ILi~L)(Dd~)iLDILd~vxVsDv~sDVsd~vsDVsd~VsDv~sDVsd~v~sd~vxvsd(Vsv~s)(Dd~)Figure 7-20Switch models. (a) Switch and diode; (b) Model representing the transformation ofaverage voltage and average current; (c) Model that separates steady-state and small-signalcomponents.VsiLdILd+−Vs+−Vsd++−+−−vx+−iL1 : d1 : D~VsD~d(a)(b)(c)har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 306
7.13Power Supply Control307The above transfer function is based on ideal Þlter components. An equivalentseries resistance (ESR) of rCfor a nonideal capacitor in Fig. 7-21bresults in a Þl-ter transfer function of(7-65)Since rCRin practical circuits, the transfer function becomes approximately(7-66)The numerator of Eq. (7-66) shows that the ESR of the capacitor produces azero in the transfer function, which may be important in determining systemstability.Ageneral technique for establishing the switch and Þlter transfer function isstate-space averaging. Adevelopment of this method is shown in App. B.Pulse-Width Modulation TransferFunctionThe pulse-width modulation (PWM) circuit converts the output from the com-pensated error ampliÞer to a duty ratio. The error ampliÞer output voltage vciscompared to a sawtooth waveform with amplitude Vp, as shown in Fig. 7-22. Theoutput of the PWM circuit is high while vcis larger than the sawtooth and is zerowhen vcis less than the sawtooth. If the output voltage falls below the reference,the error between the converter output and the reference signal increases, caus-ing vcto increase and the duty ratio to increase. Conversely, a rise in output volt-age reduces the duty ratio. Atransfer function for the PWM process is derivedfrom the linear relation(7-67)dvcVp vo(s)d(s)LVsLCc1srCRs2s(1>RCrC>L)1>LCd vo(s)d(s)VsLCc1srCRs2(1rC>R)s(1>RCrC>L)1>LCd(a)vo(s)vx(s)sL+−+−R1sC(b)vo(s)vx(s)sL+−+−R1sCrCFigure 7-21Circuits for deriving the Þlter transferfunction (a) with an ideal capacitor and (b) with the ESR of the capacitor.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 307
308CHAPTER 7DC Power SuppliesThe transfer function of the PWM circuit is therefore(7-68)Type 2 ErrorAmpliÞerwith CompensationThe error ampliÞer compares the converter output voltage with a reference volt-age to produce an error signal that is used to adjust the duty ratio of the switch.Compensation associated with the ampliÞer determines control loop perfor-mance and provides for a stable control system.The transfer function of the compensated error ampliÞer should give a totalloop characteristic consistent with the stability criteria described previously.Namely, the ampliÞer should have a high gain at low frequencies, a low gain athigh frequencies, and an appropriate phase shift at the crossover frequency.An amplifier that suits this purpose for many applications is shown in Fig. 7-23a. This is commonly referer to as a type 2 compensated error ampliÞer.(Atype 1 ampliÞer is a simple integrator with one resistor on the input and onecapacitor as feedback.). The ampliÞer is analyzed for the small-signal transferfunction, so the dc reference voltage Vrefhas no effect on the small-signal portionof the analysis. Furthermore, a resistor can be placed between the inverting inputterminal and ground to act as a voltage divider to adjust the converter outputvoltage, and that resistor will have no effect on the small-signal analysis becausethe small-signal voltage at the noninverting terminal, and therefore at the invert-ing terminal, is zero.The small-signal transfer function (with dc terms set to zero) of the ampliÞeris expressed in terms of input and feedback impedances Ziand Zf, where(7-69)ZiR1ZfaR21sC1b|| 1sC2(R21>sC1)(1>sC2)R21>sC11>sC2 d(s)vc(s)1Vp vcvpFigure 7-22The PWM process. The output is high whenvcfrom the compensated error ampliÞer is higher than thesawtooth waveform.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 308
7.13Power Supply Control309The gain function G(s) is expressed as the ratio of the compensated error ampli-Þer small-signal output to the input, which is the converter output .(7-70)Rearranging terms and assuming C2C1,(7-71)The above transfer function has a pole at the origin and a zero and pole at(7-72)(7-73)The frequency response of this ampliÞer has the form shown in Fig. 7-23b.The values of R1, R2, C1, and C2are chosen to make the overall control systemhave the desired attributes.The combined frequency response of the transfer functions of the PWM cir-cuit, the switch, and the output Þlter of a converter is shown in Fig. 7-24. TheESR of the Þlter capacitor puts a zero at 1/rcC. Asimulation program suchas PSpice is useful to determine the frequency response. Otherwise, the transferfunction may be evaluated with sj.pC1C2R2C1C2L1R2C2 z1R2C1 G(s)v~c(s)v~o(s)s1>R2C2R1C2s3s(C1C2)>R2C1C24Ls1>R2C1R1C2s(s1>R2C2) G(s)v~c(s)v~o(s)ZfZi(R21>sC1)(1>sC2)R1(R21>sC11>sC2)v~ov~cVc/VoωzωpvovcVref+−C2C1R2R1R2R1(a)(b)Figure 7-23(a) Type 2 compensated error ampliÞer; (b) Frequency response.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 309
310CHAPTER 7DC Power SuppliesAType 2 AmpliÞer Control Loop for a Buck ConverterThe source voltage for a buck converter is Vs6 V, and the output voltage is to be regu-lated at 3.3 V. The load resistance is 2 , L100 H with negligible internal resistance,and C75 F with an ESR of 0.4 . The PWM circuit has a sawtooth voltage with peakvalue Vp1.5 V. Atype 2 compensated error ampliÞer has R11 k, R22.54 k, C148.2 nF, and C21.66 nF. The switching frequency is 50 kHz. Use PSpice to deter-mine the crossover frequency and the phase margin.Compensated Error Amplifier0 dBFilterFilter & PWMOverall GainFigure 7-24The control loop transfer functionfrequency response.EXAMPLE 7-8IN + OUT+V(%IN+, %IN-)/(Vp)IN – OUT- C2R1+-GAIN = 2E5Loop1.66nC11KPWMC1Np75uC2100uL0.4211LFILTERRloadR248.2n2.54K0pAmpPARAMETERS:Vp = 1.50.1VsACMAG = 6VBUCK CONVERTER OPEN LOOPTYPE 2- +(a)Figure 7-25(a) PSpice circuit for simulating the open-loop response of a buck converter; (b) Probe output for Example 7-8 showing a crossover frequency of 6.83 kHz and a phase marginof approximately 45.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 310
7.13Power Supply Control3112001000-100100 Hz1.0 KHz10 KHz100 KHzPhase Margin(6.8303K, 45.285)(6.8303K, 37.039m)Gain, dBPhase AngleFrequencyvdb (loop) vp (loop) 0(b)Figure 7-25(continued).■SolutionAPSpice circuit for the Þlter, compensated error ampliÞer, and PWM converter is shownin Fig. 7-25a. The input voltage source is the ac source Vac, the PWM function of 1/Vpisimplemented with the dependent source EVALUE, and the ideal op-amp is implementedwith a high-gain voltage-controlled voltage source.The Probe output shown in Fig. 7-25breveals the crossover frequency to be 6.83 kHz.The phase margin is the angle greater than zero (or 360) because the operational ampli-Þer contains the inversion (180) for negative feedback (Fig. 7-19a). The Probe outputshows the phase margin to be slightly larger than 45. The gain is low, 23.8 dB, at the50-kHz switching frequency. Therefore, this circuit meets the criteria for a stable controlsystem.Design of a Type 2 Compensated ErrorAmpliÞerThe midfrequency gain and the location of the pole and zero of the transfer func-tion of the compensated error ampliÞer must be selected to provide the desiredtotal open-loop crossover frequency and phase margin required for stability.The transfer function of the compensated error ampliÞer in Eq. (7-71) can beexpressed for sjas(7-74)G(j)v~c(j)v~o(j)jzR1C2j(jp)har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 311
312CHAPTER 7DC Power SuppliesFor the middle frequencies, zp, resulting in(7-75)The phase angle compof the compensated error ampliÞer transfer function of Eq. (7-74) is(7-76)The 180is from the negative sign, and the 90is from the pole at the origin.Note that in this development the inverting ampliÞer phase shift of 180isincluded in Eq. (7-76). In some developments of this method, the invertingampliÞer phase shift is omitted at this point and then included later.The following is a design procedure for the type 2 compensated error ampliÞer.1.Choose the desired crossover frequency of the total open-loop transferfunction. This is usually around an order of magnitude less than theconverter switching frequency. Some designers go as high as 25 percent ofthe switching frequency.2.Determine the transfer function and frequency response of all elements inthe control circuit except for the compensated error ampliÞer.3.Determine the midfrequency gain of the compensated error ampliÞerrequired to achieve the overall desired crossover frequency. This establishesthe R2/R1ratio as in Eq. (7-75).4.Choose the desired phase margin needed to ensure stability, typically greaterthan 45. Having established R1and R2for the midfrequency gain, the poleand zero, pand z, are determined by C1and C2. The phase angle compofthe compensated error ampliÞer at the crossover frequency cois(7-77)Aprocedure for selecting the pole and zero frequencies is the Kfactormethod [see Venable (1983) and Basso (2008) in the Bibliography]. Using the Kfactor method, the value of Kis determined as follows:Let the zero and pole of the transfer function be at(7-78)and(7-79)pKcozcoKcomp270¡tan1acozbtan1acopb 270¡tan1azbtan1apbcomp180¡tan1azb90¡tan1apbG(j)v~c(j)v~o(j)LjR1C2jp1R1C2(1>R2C2)R2R1har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 312
7.13Power Supply Control313Then(7-80)The phase angle of the compensated error ampliÞer at crossover in Eq. (7-77) isthen(7-81)Using the trigonometric identity(7-82)gives(7-83)Equation (7-81) becomes(7-84)Solving for K,(7-85)The angle compis the desired phase angle of the compensated error ampliÞer atthe crossover frequency. From Eq. (7-84), the phase angle of the compensatederror ampliÞer can range from 0 to 180for 0 Kq.The required phase angle of the compensated error ampliÞer to obtain thedesired phase margin is determined, establishing the value of K. If the desiredcrossover frequency cois known, then zand pare obtained from Eqs. (7-78)and (7-79). Then C1and C2are determined from Eqs. (7-71) and (7-72).(7-86)(7-87)C21KcoR21K2fcoR2p1R2C2KcoC1KcoR2K2fcoR2z1R2C1coK Ktanacomp2b comp270¡tan1(K)tan1a1Kb2tan1(K)360¡2tan1(K)tan1a1Kb90¡tan1(K)tan1(x)tan1a1xb90¡comp270¡tan1Ktan1a1Kb Kcozpco har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 313
314CHAPTER 7DC Power SuppliesDesign of a Type 2 Compensated Error AmpliÞerFor a buck converter shown in Fig. 7-26a,Vs10 Vwith an output of 5 Vf100 kHzL100 Hwith a series resistance of 0.1 C100 Fwith an equivalent series resistance of 0.5 R5 Vp3 Vin PWM circuitDesign a type 2 compensated error ampliÞer that results in a stable control system.■Solution1.The crossover frequency of the total open-loop transfer function (the frequencywhere the gain is 1, or 0 dB) should be well below the switching frequency. Let fco10 kHz.2.APSpice simulation of the frequency response of the Þlter with load resistor (Fig. 7-26b) shows that the converter (Vsand the Þlter) gain at 10 kHz is 2.24 dBand the phase angle is 101.The PWM converter has a gain of 1/Vp1/3 9.5 dB. The combined gain of the Þlter and PWM converter is then 2.24 dB 9.54 dB 11.78 dB.EXAMPLE 7-9Figure 7-26(a) Buck converter circuit; (b) The ac circuitfor determining the frequency response of the converter.(a)(b)12100.5100u100u0.15100uH100uF510V+−+−0.10.5har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 314
7.13Power Supply Control3153.The compensated error ampliÞer should therefore have a gain of +11.78 dB at 10 kHzto make the loop gain 0 dB. Converting the gain in decibels to a ratio of vo/vi,Using Eq. (7-75), the magnitude of the midfrequency gain isLetting R11 k, R2is then 3.88 k.4.The phase angle of the compensated error ampliÞer at crossover must be adequateto give a phase margin of at least 45. The required phase angle of the ampliÞer isAKfactor of 3.27 is obtained from Eq. (7-85).Using Eq. (7-86) to get C1,Using Eq. (7-87) to get C2,APSpice simulation of the control loop gives a crossover frequency of 9.41 kHzand a phase margin of 46, verifying the design.PSpice Simulation of Feedback ControlSimulation is a valuable tool in the design and veriÞcation of a closed-loop con-trol system for dc power supplies. Figure 7.27ashows a PSpice implementationusing idealized switches and ETABLE sources for the op-amp and for the com-parator in the PWM function. The input is 6 V, and the output is to be regulatedat 3.3 V. The phase margin of this circuit is 45when the load is 2 , and slightlygreater than 45when the load changes to 2||4 . The switching frequency is100 kHz. Astep change in load occurs at t1.5 ms. If the circuit were unregu-lated, the output voltage would change as the load current changed because ofthe inductor resistance. The control circuit adjusts the duty ratio to compensatefor changes in operating conditions.C21K2fcoR213.27(2)(10,000)(3880)1.25 nFC1K2fcoR23.272(10,000)(3880)13.4 nFKtanacomp2btana146¡2btan(73¡)3.27compphase marginconverter45¡(101¡)146¡R2R13.88v~cv~o1011.78/203.8811.78 dB20logav~cv~obhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 315
316CHAPTER 7DC Power Supplies1.0 ms1.5 ms2.0 ms2.5 ms3.0 msV (OUTPUT) I(L1)Time02.55.0Output VoltageInductor CurrentLoad Step ChangeBUCK CONVERTER WITH TYPE2 COMPENSATIONinputoutputVsrL12L1R1S1Sbreak0IdealSwitchesD1Dbreak0.5rC2Rload2TCLOSE = 1.5mVref3.3Verror13.4nC1R2C21.5n3.88k1kCo100u0.1100uStep change in load at t = 1.5msPWN ComparatorControlPARAMETERS:Freq = 100kVp = 1.5VrampTD = 0TF = 1nPW = 1nPER = {1/(Freq)}V1 = 0TR = (1/Freq-2n)V2 = {Vp}ETABLEV(%IN+, %IN-)ETABLEV(%IN+, %IN-)EcompOUT+ IN+OUT- IN-IN+ OUT+IN- OUT-0P AMP212vx++(a)(b)+-+-+-6V00RloadFigure 7-27(a) PSpice circuit for a regulated buck converter; (b) Output voltage and inductor current for astep change in load.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 316
7.13Power Supply Control317Figure 7-27bshows the output voltage and inductor current, verifying thatthe control circuit is stable.Type 3 ErrorAmpliÞerwith CompensationThe type 2 compensation circuit described previously is sometimes not capableof providing sufÞcient phase angle difference to meet the stability criterion of a45phase margin. Another compensation circuit, known as the type 3 ampliÞer,is shown in Fig. 7-28a. The type 3 ampliÞer provides an additional phase angleboost compared to the type 2 circuit and is used when an adequate phase marginis not achievable using the type 2 ampliÞer.The small-signal transfer function is expressed in terms of input and feed-back impedances Ziand Zf,(7-88)G(s)v~c(s)v~o(s)ZfZi(R21>sC1)||1>sC2R1||(R31>sC3)Figure 7-28(a) Type 3 compensated error ampliÞer; (b) Bode magnitude plot.(b)ωωp1 = 0ωz1ωz2ωp1ωp2vcvo(a)vovCVref+−C2C1R2R3C3R1+−har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 317
318CHAPTER 7DC Power Suppliesresulting in(7-89)The reference voltage Vrefis purely dc and has no effect on the small-signal trans-fer function. AssumingC2C1and R3R1,(7-90)An inspection of the transfer function of Eq. (7-90) shows that there are twozeros and three poles, including the pole at the origin. Aparticular placement of thepoles and zeros produces the Bode plot of the transfer function shown in Fig. 7-28b.(7-91)The zeros and poles of the transfer function are(7-92)The phase angle of the compensated error ampliÞer is(7-93)The 180is from the negative sign, and the 90is from the pole at the origin.Design of a Type 3 Compensated ErrorAmpliÞerThe Kfactor method can be used for the type 3 ampliÞer in a similar way as itwas used in the type 2 circuit. Using the Kfactor method, the zeros are placed atthe same frequency to form a double zero, and the second and third poles areplaced at the same frequency to form a double pole:(7-94)zz1z2pp2p3 270¡ tan 1az1b tan 1az2b tan 1ap2b tan 1ap3bcomp180¡ tan 1az1b tan 1az2b90¡tan 1ap2btan 1ap3bz11R2C2z21(R1R3)C3L1R1C3p10p2C1C2R2C1C2L1R2C2p31R3C3G(j)1R3C2 (jz1)(jz2)j(jp2)(jp3) G(s)L1R3C2 (s1>R2C1)(s1>R1C3)s(s1>R2C2)(s1>R3C3)G(s)R1R3R1R3C3 As1R2C1BAs1(R1R3)C3BsAsC1C2R2C1C2BAs1R3C3Bhar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 318
7.13Power Supply Control319The Þrst pole remains at the origin.The double zeros and poles are placed at frequencies(7-95)The ampliÞer transfer function from Eq. (7-91) can then be written as(7-96)At the crossover frequency co, the gain is(7-97)The phase angle of the ampliÞer at the crossover frequency is then(7-98)Using Eq. (7-95) for zand p,(7-99)resulting in(7-100)By using the identity(7-101)making(7-102)Eq. (7-100) becomes(7-103)comp450¡4tan12K90¡4tan11Kcomp270¡23tan11K(90¡tan11K)4tan1a11Kb90¡tan1A1KBtan1(x)tan1a1xb90¡ 270¡2ctan12Ktan1a11Kbdcomp270¡2 tan12K2 tan1a11Kbcomp270¡2tan1acoco>1Kb2tan1acoco1Kbcomp270¡2tan1acozb2tan1acopbG(jco)1R3C2 (jcoz)2jco(jcop)2G(j)1R3C2 (jz)2j(jp)2 zco1Kpco1Khar80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 319
320CHAPTER 7DC Power SuppliesSolving for K,(7-104)From Eq. (7-103), the maximum angle of the compensated error ampliÞer is270. Recall that the maximum phase angle of the type 2 ampliÞer is 180.The phase angle of the compensated error ampliÞer is(7-105)The minimum phase margin is usually 45, and the phase angle of the converterat the desired crossover frequency can be determined from a PSpice simulation.At the crossover frequency co,(7-106)Using Eqs. (7-95) and (7-92),(7-107)(7-108)Equation (7-106) becomes(7-109)In the design of a type 3 compensated error ampliÞer, Þrst choose R1andthen compute R2from Eq. (7-109). Other component values can then be deter-mined from(7-110)and(7-111)pco1K1R2C21R3C3zco1K1R2C11R1C3G(jco)1R3C2 jco(p)21R3C2 j1K>R1C31>R2C2R3C3j1K R2R1 p1R2C21R3C3 Q p21R2C2R3C3 co2Kz2KR1C3 L1R3C2 (jco)2jco(p)21R3C2 jco(p)2G(jco)1R3C2 (jcoz)2jco(jcop)2compphase marginconverter Ktanacomp90¡4b2 har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 320
7.13Power Supply Control321The resulting equations are(7-112)R31co1KC312fco1KC3C31KcoR11K2fcoR1C21coR21K12fcoR21KC11KcoR21K2fcoR2R2ƒG(jco)ƒR11KEXAMPLE 7-10Design of a Type 3 Compensated Error AmpliÞerFor the buck converter shown in Fig.7-29a,Vs10 Vwith an output of 5 Vf100 kHzL 100 Hwith a series resistance of 0.1 C100 Fwith an equivalent series resistance of 0.1 R5 Vp3 Vin PWM circuitDesign a type 3 compensated error ampliÞer that results in a stable control system.Design for a crossover frequency of 10 kHz and a phase margin of 45. Note that all para-meters are the same as in Example 7-8 except that the ESR of the capacitor is muchsmaller.■SolutionAPSpice ac frequency sweep shows that the output voltage is 10.5 dB at 10 kHz andthe phase angle is 144. The PWM circuit produces an additional gain of 9.5 dB.Therefore, the compensating error ampliÞer must have a gain of 10.5 + 9.5 20 dB at 10 kHz. Again of 20 dB corresponds to a gain of 10.The required phase angle of the ampliÞer is determined from Eq. (7-105),Solving for Kin Eq. (7-104) yields.Kctana189¡90¡4bd23tan(69.75¡)427.35compphase marginconverter45¡(144¡)189¡har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 321
322CHAPTER 7DC Power SuppliesLetting R11 k, the other component values are computed from Eq. (7-112).APSpice simulation of the converter, compensated error ampliÞer, and PWM circuitgives a crossover frequency of 10 kHz with a phase margin of 49.Note that attempting to use a type 2 compensated error ampliÞer for this circuit isunsuccessful because the required phase angle at the crossover frequency is greater than180. Comparing this converter with that of Example 7-8, the ESR of the capacitor hereis smaller. Low capacitor ESR values often necessitate use of the type 3 rather than thetype 2 circuit.R312fco1KC312(10,000)17.35(43.1)(10)9136 ÆC31K2fcoR117.352(10,000)(1000)43.1 nFC212fcoR21K12(10,000)(3700)17.351.58 nFC11K2fcoR217.352(10,000)(3700)11.6 nFR2ƒG(jco)ƒR11K10(1000)17.353.7 kÆ(a)100uH100uF510V+-0.10.1-+(b)120.1100u100u0.15L1rLR110V10FILTERrCCoFigure 7-29(a) Buck converter circuit; (b) The ac circuitused to determine the frequency response.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 322
7.15The AC Line Filter323Manual Placement of Poles and Zeros in the Type 3 AmpliÞerAs an alternative to the Kfactor method described previously, some designersplace the poles and zeros of the type 3 ampliÞer at speciÞed frequencies. In plac-ing the poles and zeros, a frequency of particular interest is the resonant fre-quency of the LCÞlter in the converter. Neglecting any resistance in the inductorand capacitor,(7-113)The Þrst zero is commonly placed at 50 to 100 percent of fLC, the second zero isplaced at fLC, the second pole is placed at the ESR zero in the Þlter transfer func-tion (1/rCC), and the third pole is placed at one-half the switching frequency.Table 7-1indicates placement of the type 3 error ampliÞer poles and zeros.7.14PWM CONTROLCIRCUITSThe major elements of the feedback control of dc power supplies are available ina single integrated circuit (IC). The National Semiconductor LM2743 is oneexample of an integrated circuit for dc power supply control. The IC contains theerror ampliÞer op-amp, PWM circuit, and driver circuits for the MOSFETs in adc-dc converter using synchronous rectiÞcation. The block diagram of the IC isshown in Fig. 7-30a, and a typical application is shown in Fig. 7-30b.7.15THE AC LINE FILTERInmany dc power supply applications, the power source is the ac power system. Thevoltage and current from the ac system are often contaminated by high-frequencyelectrical noise. An ac line Þlter suppresses conductive radio-frequency interfer-ence (RFI) noise from entering or leaving the power supply.LC11LC fLC121LCTable 7-1Type 3 Compensating error ampliÞer zeros and poles and frequency placementZero orPoleExpressionPlacementFirst zero50% to 100% of LCSecond zeroAt LCFirst poleÑSecond poleAt the ESR zero 1/rCCThird poleAt one-half the switching frequency, 2fsw/2p31R3C3p2C1C2R2C1C2L1R2C2p10z21(R1R3)C3L1R1C3z11R2C2har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 323
(b)+CSSRFADJCCCRCCRPULL-UPD1CBOOTQ1L1RCSVCC = 3.3VCC1RC2CC3RFB1VOUT = 1.2V@4ACO 1,2CIN1,2VIN = 3.3 VRFB2RC1CC2VCCSDPWGDFREQSS/TRACKSGNDEAOLM2743HGBOOTISENLGPGNDPGNDFBFREQSDPGNDPGNDSGNDVDCBOOTHGLGISEN40 μA10 μA90 μAIUMPWMCLOCK & RAMPSHUT DOWNLOGICUVLOSYNCHRONOUSDRIVER LOGIC10DELAYSSDONEOVUVPWGDSS/TRACKREFEAVREF = 0.6 VSolt StartComparatorLogic0.85 V2 V0.134 V0.71 VPWM LOGICFEEAO−+(a)−+Figure 7-30(a) The National Semiconductor LM2743 block diagram; (b) An application in a buck converter circuit(with permission from National Semiconductor Corporation1).1Copyright ©2003 National Semiconductor Corporation, 2900 Semiconductor Drive, Santa Clara, CA95051. All rights reserved,http://www.national.com.324har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 324
7.16The Complete DC Power Supply325Asingle-phase ac input to a power supply has a line (or phase) wire, a neu-tral wire, and a ground wire. Common-mode noise consists of currents in theline and neutral conductors that are in phase and return through the ground path.Differential-mode noise consists of high-frequency currents that are 180out ofphase in the line and neutral conductors, which means that current enters fromthe line and returns in the neutral.Atypical ac line Þlter circuit is shown in Fig. 7-31. The Þrst stage is a common-mode Þlter, consisting of a transformer with adjacent polarity markings and acapacitor connected from each line to ground. The capacitors in this stage arereferred to as the Y capacitors. The second stage of the Þlter, consisting of atransformer with opposite polarity markings and a single capacitor connectedacross the ac lines, removes differential-mode noise from the ac signal. Thecapacitor in this stage is referred to as the X capacitor.7.16THE COMPLETE DC POWER SUPPLYAcomplete dc power supply consists of an input ac line Þlter, a power factor cor-rection stage, and a dc-dc converter, as illustrated in the block diagram of Fig. 7-32.The power factor correction stage is discussed in Sec. 7.11, and the dc-dc con-verter could be any of the converters discussed in this chapter or in Chap. 6.Low-power applications such as cell phone chargers can be implementedwith a topology like that shown in Fig. 7-33. Afull-wave rectiÞer with a capaci-tor Þlter (Chap. 4) produces a dc voltage from the ac line voltage source, and aßyback dc-dc converter reduces the dc voltage to the appropriate level for theapplication. An optically coupled feedback loop preserves electrical isolationbetween the source and the load, and a control circuit adjusts the duty ratio of theswitch for a regulated output. Integrated-circuit packages include the controlFigure 7-31Atypical ac line Þlter.Common-mode filterDifferential-mode filterGroundNeutralLineY capacitorsX capacitorAC SourceAC Line FilterRectifier withPower FactorCorrectionDC-DC Converter(e.g., Forward)with ControlDC OutputFigure 7-32Acomplete power supply when the source is the ac power system.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 325
326CHAPTER 7DC Power Suppliesfunction and the switching transistor. Some such integrated circuits can be pow-ered directly from the high-voltage output of the rectiÞer, and others requireanother winding on the ßyback converter to produce the IC supply voltage. Thistype of power supply is often called an off-line converter.7.17BibliographyS. Ang and A. Oliva, Power-Switching Converters, 2d ed., Taylor & Francis, BocaRaton, Fla., 2005.C. Basso, Switch-Mode Power Supplies,McGraw-Hill, New York, 2008.B. K. Bose, Power Electronics and Motor Drives: Advances and Trends,Elsevier/Academic Press, Boston, 2006.M. Day, ÒOptimizing Low-Power DC/DC DesignsÑExternal versus InternalCompensation,Ó Texas Instruments, Incorporated, 2004.R. W. Erickson and D. Maksimovi«c, Fundamentals of Power Electronics, 2d ed., KluwerAcademic, 2001.A. J. Forsyth and S. V. Mollov, ÒModeling and Control of DC-DC converters,Ó PowerEngineering Journal, vol. 12, no. 5, 1998, pp. 229Ð236.Y. M. Lai, Power Electronics Handbook, edited by M. H. Rashid, Academic Press,Calif., San Diego, 2001, Chapter 20.LM2743 Low Voltage N-Channel MOSFETSynchronous Buck Regulator Controller,National Semiconductor, 2005.D. Mattingly, ÒDesigning Stable Compensation Networks for Single Phase VoltageMode Buck Regulators,Ó Intersil Technical Brief TB417.1, Milpitas, Calif., 2003.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters,Applications, and Design,3d ed., Wiley, New York, 2003.G. Moschopoulos and P. Jain, ÒSingle-Phase Single-Stage Power-Factor-CorrectedConverter Topologies,Ó IEEE Transactions on Industrial Electronics, vol. 52, no. 1,February 2005, pp. 23Ð35.M. Nave, PowerLine Filter Design for Switched-Mode Power Supplies, Van NostrandReinhold, Princeton, N.J., 1991.A. I. Pressman, K. Billings, and T. Morey, Switching Power Supply Design, McGraw-Hill,New York, 2009.ControlDC outputAC sourceOptical isolation+−+−Figure 7-33An off-line power supply for low-power applications.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 326
Problems327M. H. Rashid, Power Electronics: Circuits, Devices, and Systems,3d ed., Prentice-Hall,Upper Saddle River, N.J., 2004.M. Qiao, P. Parto, and R. Amirani, ÒStabilize the Buck Converter with TransconductanceAmpliÞer,Ó International RectiÞer Application Note AN-1043, 2002.D. Venable, ÒThe KFactor: ANew Mathematical Tool for Stability Analysis andSynthesis,Ó Proceedings Powercon 10, 1983.V. Vorperian, ÒSimpliÞed Analysis of PWM Converters Using Model of PWM Switch,ÓIEEE Transactions on Aerospace and Electronic Systems, May 1990.Ò8-Pin Synchronous PWM Controller,Ó International RectiÞer Data Sheet No. PD94173revD, 2005.ProblemsFlyback Converter7.1The ßyback converter of Fig. 7-2has parameters Vs36 V, D0.4, N1/N22,R 20 , Lm100 H, and C50 F, and the switching frequency is 100 kHz. Determine (a) the output voltage; (b) the average, maximum, andminimum inductor currents; and (c) the output voltage ripple.7.2The ßyback converter of Fig. 7-2has parameters Vs4.5 V, D0.6, N1/N20.4,R15 , Lm10 H, and C10 F, and the switching frequency is 250 kHz.Determine (a) the output voltage; (b) the average, maximum, and minimuminductor currents; and (c) the output voltage ripple.7.3The ßyback converter of Fig. 7-2has an input of 44 V, an output of 3 V, a dutyratio of 0.32, and a switching frequency of 300 kHz. The load resistor is 1 . (a) Determine the transformer turns ratio. (b) Determine the transformermagnetizing inductance Lmsuch that the minimum inductor current is 40 percentof the average.7.4Design a ßyback converter for an input of 24 Vand an output of 40 Wat 40 V.Specify the transformer turns ratio and magnetizing inductance, switchingfrequency, and capacitor to limit the ripple to less than 0.5 percent.7.5(a) What is the value of load resistance that separates continuous anddiscontinuous magnetizing inductance current in the ßyback converter ofExample 7-1? (b) Graph Vo/Vsas the load changes from 5 to 20 .7.6For the ßyback converter operating in the discontinuous-current mode, derive anexpression for the time at which the magnetizing current iLmreturns to zero.Forward Converter7.7The forward converter of Fig. 7-5ahas parameters Vs100 V, N1/N2N1/N31,Lm1 mH, Lx70 H, R20 , C33 F, and D0.35, and theswitching frequency is 150 kHz. Determine (a) the output voltage and outputvoltage ripple; (b) the average, maximum, and minimum values of the current inLx; (c) the peak current in Lmin the transformer model; and (d) the peak currentin the switch and the physical transformer primary.7.8The forward converter of Fig. 7-5ahas parameters Vs170 V, N1/N2 10, N1/N31, Lm340 H, Lx20 H, R10 , C10 F, D0.3, and theswitching frequency is 500 kHz. (a) Determine the output voltage and outputvoltage ripple. (b) Sketch the currents in Lx, Lm, each transformer winding, and Vs.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 327
328CHAPTER 7DC Power Supplies(c) Determine the power returned to the source by the tertiary (third) transformerwinding from the recovered stored energy in Lm.7.9Aforward converter has a source of 80 Vand a load of 250 Wat 50 V. The outputÞlter has Lx100 H and C150 F. The switching frequency is 100 kHz. (a) Select a duty ratio and transformer turns ratios N1/N2and N1/N3to provide therequired output voltage. Verify continuous current in Lx. (b) Determine the outputvoltage ripple.7.10The forward converter of Fig. 7-5ahas parameters Vs100 V, N1/N25, N1/N31, Lm333 H, R2.5 , C10 F, and D0.25, and theswitching frequency is 375 kHz. (a) Determine the output voltage and outputvoltage ripple. (b) Sketch the currents iLx, I1, i2, i3, iLm, and is. Determine thepower returned to the source by the tertiary (third) transformer winding from therecovery storage energy in Lm.7.11Aforward converter has parameters Vs125 V, Vo50 V, and R25 , andthe switching frequency is 250 kHz. Determine (a) the transformer turns ratioN1/N2such that the duty ratio is 0.3, (b) the inductance Lxsuch that the minimumcurrent in Lxis 40 percent of the average current, and (c) the capacitance requiredto limit the output ripple voltage to 0.5 percent.7.12Design a forward converter to meet these speciÞcations: Vs170 V, Vo48 V,output power-150 W, and the output voltage ripple must be less than 1 percent.Specify the transformer turns ratios, the duty ratio of the switch, the switchingfrequency, the value of Lxto provide continuous current, and the output capacitance.7.13Design a forward converter to produce an output voltage of 30 Vwhen the inputdc voltage is unregulated and varies from 150 to 175 V. The output power variesfrom 20 to 50 W. The duty ratio of the switch is varied to compensate for theßuctuations in the source to regulate the output at 30 V. Specify the switchingfrequency and range of required duty ratio of the switch, the turns ratios of thetransformer, the value of Lx, and the capacitance required to limit the outputripple to less than 0.2 percent. Your design must work for all operating conditions.7.14The current waveforms in Fig. 7-6for the forward converter show thetransformer currents based on the transformer model of Fig. 7-1d. Sketch thecurrents that exist in the three windings of the physical three-windingtransformer. Assume that N1/N2N1/N31.Push-Pull Converter7.15The push-pull converter of Fig. 7-8ahas the following parameters: Vs50 V,Np/Ns2, Lx60 H, C39 F, R8 , f150 kHz, and D0.35.Determine (a) the output voltage, (b) the maximum and minimun inductorcurrents, and (c) the output voltage ripple.7.16For the push-pull converter in Prob. 7-12, sketch the current in Lx, D1, D2, Sw1,Sw2, and the source.7.17The push-pull converter of Fig. 7-8ahas a transformer with a magnetizinginductance Lm2 mH which is placed across winding P1in the model. Sketchthe current in Lmfor the circuit parameters given in Prob. 7-11.7.18For the push-pull converter of Fig. 7-8a, (a) sketch the voltage waveform vLx, and (b) derive the expression for output voltage [Eq. (7-44)] on the basis that theaverage inductor voltage is zero.har80679_ch07_265-330.qxd 12/17/09 2:54 PM Page 328
Problems329Current-Fed Converter7.19The current-fed converter of Fig. 7-11ahas an input voltage of 24 Vand a turnsratio Np/Ns2. The load resistance is 10 , and the duty ratio of each switch is0.65. Determine the output voltage and the input current. Assume that the inputinductor is very large. Determine the maximum voltage across each switch.7.20The current-fed converter of Fig. 7-11ahas an input voltage of 30 Vand suppliesa load of 40 Wat 50 V. Specify a transformer turns ratio and a switch duty ratio.Determine the average current in the inductor.7.21The output voltage for the current-fed converter of Fig. 7-11awas derived on the basis of the average inductor voltage being zero. Derive the output voltage[Eq. (7-56)] on the basis that the power supplied by the source must equal thepower absorbed by the load for an ideal converter.PSpice7.22Run a PSpice simulation for the ßyback converter in Example 7-2. Use thevoltage-controlled switch Sbreak with Ron 0.2 , and use the default diodemodel Dbreak. Display the output for voltage for steady-state conditions. Compareoutput voltage and output voltage ripple to the results from Example 7-2. Displaythe transformer primary and secondary current, and determine the average valueof each. Comment on the results.7.23Run a PSpice simulation for the forward converter of Example 7-4. Use thevoltage-controlled switch Sbreak with Ron 0.2 and use the default diodemodel Dbreak. Let the capacitance be 20 F. Display the steady-state currents inLxand each of the transformer windings. Comment on the results.Control7.24Design a type 2 compensated error ampliÞer (Fig. 7-23a) that will give a phaseangle at crossover co210and a gain of 20 dB for a crossover frequency of12 kHz.7.25Abuck converter has a Þlter transfer function that has a magnitude of 15 dBand phase angle of 105at 5 kHz. The gain of the PWM circuit is 9.5 dB.Design a type 2 compensated error ampliÞer (Fig. 7-23a) that will give a phasemargin of at least 45for a crossover frequency of 5 kHz.7.26Abuck converter has L50 H, C20 F, rc0.5 , and a load resistance R4 . The PWM converter has Vp3 V. Atype 2 error ampliÞer has R11 k, R25.3 k, C111.4 nF, and C21.26 nF. Use PSpice to determinethe phase margin of the control loop (as in Example 7-8) and comment on thestability. Run a PSpice control loop simulation as in Example 7-10.7.27Abuck converter has L200 H with a series resistance rL0.2 , C100 F with rc0.5 , and a load R4 . The PWM converter has Vp3 V.(a) Use PSpice to determine the magnitude and phase angle of the Þlter and loadat 10 kHz. (b) Design a type 2 compensated error ampliÞer (Fig. 7-23a) that willgive a phase margin of at least 45at a crossover frequency of 10 kHz. Verifyyour results with a PSpice simulation of a step change in load resistance from 4 to 2 as in Example 7-10. Let Vs20 Vand Vref8 V.har80679_ch07_265-330.qxd 12/17/09 2:55 PM Page 329
330CHAPTER 7DC Power Supplies7.28Abuck converter has L200 H with a series resistance rL0.1 , C200 F with rc0.4 , and a load R5 . The PWM converter has Vp3 V.(a) Use PSpice to determine the magnitude and phase angle of the Þlter and loadat 8 kHz. (b) Design a type 2 compensated error ampliÞer (Fig. 7-23a) that willgive a phase margin of at least 45at a crossover frequency of 10 kHz. Verifyyour results with a PSpice simulation of a step change in load resistance as inFig. 7-27. Let Vs20 Vand Vref8 V.7.29For the type 3 compensated error ampliÞer of Fig. 7-28a, determine the Kfactorfor an error ampliÞer phase angle of 195. For a gain of 15 dB at a crossoverfrequency of 15 kHz, determine the resistance and capacitance values for theampliÞer.7.30The frequency response of a buck converter shows that the output voltage is 8 dB, and the phase angle is 140at 15 kHz. The ramp function in the PWMcontrol circuit has a peak value of 3 V. Use the Kfactor method to determinevalues of the resistors and capacitors for the type 3 error ampliÞer of Fig. 7-28afor a crossover frequency of 15 kHz.7.31The buck converter circuit of Fig. 7-29has L40 H, rL0.1 , Co500 F, rC30 m, and RL3 . The ramp function in the PWM controlcircuit has a peak value of 3 V. Use the Kfactor method to design a type 3compensated error ampliÞer for a stable control system with a crossoverfrequency of 10 kHz. Specify the resistor and capacitor values in the errorampliÞer.har80679_ch07_265-330.qxd 12/17/09 2:55 PM Page 330
CHAPTER8331InvertersConverting dc to ac8.1INTRODUCTIONInverters are circuits that convert dc to ac. More precisely, inverters transferpower from a dc source to an ac load. The controlled full-wave bridge convertersin Chap. 4can function as inverters in some instances, but an ac source must pre-exist in those cases. In other applications, the objective is to create an ac voltagewhen only a dc voltage source is available. The focus of this chapter is on invert-ers that produce an ac output from a dc input. Inverters are used in applicationssuch as adjustable-speed ac motor drives, uninterruptible power supplies (UPS),and running ac appliances from an automobile battery.8.2THE FULL-BRIDGE CONVERTERThe full-bridge converter of Fig 8-1ais the basic circuit used to convert dc to ac.The full-bridge converter was introduced as part of a dc power supply circuit inChap. 7. In this application, an ac output is synthesized from a dc input by clos-ing and opening the switches in an appropriate sequence. The output voltage vocan be Vdc, Vdc, or zero, depending on which switches are closed. Figure 8-1bto eshows the equivalent circuits for switch combinations.Switches ClosedOutput Voltage voS1and S2VdcS3and S4VdcS1and S30S2and S40har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 331
332CHAPTER 8InvertersNote that S1and S4should not be closed at the same time, nor should S2and S3.Otherwise, a short circuit would exist across the dc source. Real switches donot turn on or off instantaneously, as was discussed in Chap. 6. Therefore,switching transition times must be accommodated in the control of the switches.Overlap of switch ÒonÓ times will result in a short circuit, sometimes called ashoot-throughfault, across the dc voltage source. The time allowed for switchingis called blankingtime.Figure 8-1(a) Full-bridge converter; (b) S1and S2closed; (c) S3and S4closed; (d) S1and S3closed; (e) S2and S4closed.+(a)(b)0(c)(d)(e)+––VdcVdcS1S1S1S3S2S4S3S3S2+–Vdc+–VdcvoisioiS1iS4S4iS3iS2+–+–0S4S2+––Vdc+–har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 332
8.3The Square-Wave Inverter3338.3THE SQUARE-WAVE INVERTERThe simplest switching scheme for the full-bridge converter produces a square waveoutput voltage. The switches connect the load to Vdcwhen S1and S2are closed orto Vdcwhen S3and S4are closed. The periodic switching of the load voltagebetween Vdcand Vdcproduces a square wave voltage across the load. Althoughthis alternating output is nonsinusoidal, it may be an adequate ac waveform forsome applications.The current waveform in the load depends on the load components. For theresistive load, the current waveform matches the shape of the output voltage. Aninductive load will have a current that has more of a sinusoidal quality than thevoltage because of the Þltering property of the inductance. An inductive load pre-sents some considerations in designing the switches in the full-bridge circuitbecause the switch currents must be bidirectional.For a series RLload and a square wave output voltage, assume switches S1and S2in Fig. 8-1aclose at t0. The voltage across the load is Vdc, and cur-rent begins to increase in the load and in S1and S2. The current is expressed asthe sum of the forced and natural responses(8-1)where Ais a constant evaluated from the initial condition and L/R.At tT/2, S1and S2open, and S3and S4close. The voltage across the RLloadbecomes Vdc, and the current has the form(8-2)where the constant Bis evaluated from the initial condition.When the circuit is Þrst energized and the initial inductor current is zero, atransient occurs before the load current reaches a steady-state condition. Atsteady state, iois periodic and symmetric about zero, as illustrated in Fig. 8-2. Letthe initial condition for the current described in Eq. (8-1) be Imin, and let the ini-tial condition for the current described in Eq. (8-2) be Imax.Evaluating Eq. (8-1) at t0,or(8-3)AImin VdcRio(0)VdcRAe0Imin io(t)VdcRBe(tT>2)> for T>2 t T VdcRAet> for 0 t T>2 io(t)if (t)in(t)har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 333
334CHAPTER 8InvertersLikewise, Eq. (8-2) is evaluated at tT2.or(8-4)In steady state, the current waveforms described by Eqs. (8-1) and (8-2) thenbecome(8-5)io(t)eVdcRaImin VdcRbet> for 0 t T2VdcRaImax VdcRbe(tT>2)> for T2 t TBImax VdcRio(T>2)VdcRBe0Imax Figure 8-2Square wave output voltage and steady-state currentwaveform for an RLload.0T2TttVdcvoioisImaxImin–Vdc–T2–TtiS1, iS2ImaxIminT2–TtiS3, iS4ImaxIminT2–TtImaxIminT2–Thar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 334
8.3The Square-Wave Inverter335An expression is obtained for Imaxby evaluating the Þrst part of Eq. (8-5) at tT2(8-6)and by symmetry,(8-7)Substituting Imaxfor Iminin Eq. (8-6) and solving for Imax,(8-8)Thus, Eqs. (8-5) and (8-8) describe the current in an RLload in the steady statewhen a square wave voltage is applied. Figure 8-2shows the resulting currentsin the load, source, and switches.Power absorbed by the load can be determined from I2rmsR, where rms loadcurrent is determined from the deÞning equation from Chap. 2. The integrationmay be simpliÞed by taking advantage of the symmetry of the waveform. Sincethe square each of the current half-periods is identical, only the Þrst half-periodneeds to be evaluated:(8-9)If the switches are ideal, the power supplied by the source must be the same asabsorbed by the load. Power from a dc source is determined from(8-10)as was derived in Chap. 2.Square-Wave Inverter with RLLoadThe full-bridge inverter of Fig. 8-1has a switching sequence that produces a square wavevoltage across a series RLload. The switching frequency is 60 Hz, Vdc100 V, R10 ,and L25 mH. Determine (a) an expression for load current, (b) the power absorbed bythe load, and (c) the average current in the dc source.■Solution(a)From the parameters given,T1f160 0.0167 sL/R0.02510 0.0025 sT23.33Pdc VdcIsIrmsF1TLT0i2(t) d(t)F2TLT/20 cVdcRaIminVdcRb et/d2dtImaxIminVdcR a1eT>21eT>2bImin Imax i(T>2)Imax VdcRaImin VdcRbe(T>2)EXAMPLE 8-1har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 335
336CHAPTER 8InvertersEquation (8-8) is used to determine the maximum and minimum current.Equation (8-5) is then evaluated to give load current.(b)Power is computed from Irms2R, where Irmsis computed from Eq. (8-9).Power absorbed by the load is(c)Average source current can also be computed by equating source and load power,assuming a lossless converter. Using Eq. (8-10),Average power could also be computed from the average of the currentexpression in part (a).The switch currents in Fig. 8-2show that the switches in the full-bridge cir-cuit must be capable of carrying both positive and negative currents for RLloads.However, real electronic devices may conduct current in one direction only. Thisproblem is solved by placing feedback diodes in parallel (anitparallel) with eachswitch. During the time interval when the current in the switch must be negative,the feedback diode carries the current. The diodes are reverse-biased when cur-rent is positive in the switch. Figure 8-3ashows the full-bridge inverter withswitches implemented as insulated gate bipolar transistors (IGBTs) with feed-back diodes. Transistor and diode currents for a square wave voltage and an RLload are indicated in Fig 8-3b. Power semiconductor modules often include feed-back diodes with the switches.IsPdcVdc4411004.41 API2rms R(6.64)2(10)441 WIrmsF1120L1/1200 3 (1019.31)et/0.002542dt6.64 A 1019.31e(t0.00835)0.0025 1120 t 160io(t)10010a9.3110010be(t0.0167>2)>0.0025 1019.31et>0.0025 0 t 1120io(t)10010a9.3110010bet>0.0025ImaxImin10010 a1e3.331e3.33b9.31 Ahar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 336
8.4Fourier Series Analysis337When IGBTs Q1and Q2are turned off in Fig. 8-3a, the load current must becontinuous and will transfer to diodes D3and D4, making the output voltage Vdc,effectively turning on the switch paths 3 and 4 before Q3and Q4are turned on.IGBTs Q3and Q4must be turned on before the load current decays to zero.8.4FOURIER SERIES ANALYSISThe Fourier series method is often the most practical way to analyze load currentand to compute power absorbed in a load, especially when the load is more com-plex than a simple resistive or RLload. Auseful approach for inverter analysis isto express the output voltage and load current in terms of a Fourier series. Withno dc component in the output,(8-11)and(8-12)io(t)aqn1In sin (n0tn)vo(t)aqn1Vn sin (n0tn)Figure 8-3(a) Full-bridge inverter using IGBTs; (b) Steady-state current for an RLload.voio+–VdcQ1D1D2Q1Q2Q3Q4Q3D4(b)(a)D1+–D2D3iovotD3D4Q4Q2har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 337
338CHAPTER 8InvertersPower absorbed by a load with a series resistance is determined from I2rmsR,where the rms current can be determined from the rms currents at each of thecomponents in the Fourier series by(8-13)where(8-14)and Znis the load impedance at harmonic n.Equivalently, the power absorbed in the load resistor can be determined foreach frequency in the Fourier series. Total power can be determined from(8-15)where In,rmsis In/.In the case of the square wave, the Fourier series contains the odd harmonicsand can be represented as(8-16)Fourier Series Solution for the Square-Wave InverterFor the inverter in Example 8-1 (Vdc100 V, R10 , L25 mH, f60 Hz), deter-mine the amplitudes of the Fourier series terms for the square wave load voltage, the ampli-tudes of the Fourier series terms for load current, and the power absorbed by the load.■SolutionThe load voltage is represented as the Fourier series in Eq. (8-16). The amplitude of eachvoltage term isThe amplitude of each current term is determined from Eq. (8-14),Power at each frequency is determined from Eq. (8-15).PnI2n, rms RaIn12b2RInVnZnVn2R2(n0L)24(400)/n2102[n(260)(0.025)]2Vn4Vdcn4(400)nvo(t) an odd4Vdcn sin n0t12Paqn1Pnaqn1 I2n, rms RInVnZnIrmsAaqn1I2n, rmsCaqn1aIn12b2EXAMPLE 8-2har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 338
8.5Total Harmonic Distortion339Table 8-1summarizes the Fourier series quantities for the circuit of Example 8-1.As the harmonic number nincreases, the amplitude of the Fourier voltage componentdecreases and the magnitude of the corresponding impedance increases, both resultingin small currents for higher-order harmonics. Therefore, only the first few terms of theseries are of practical interest. Note how the current and power terms become vanish-ingly small for all but the first few frequencies.Power absorbed by the load is computed from Eq. (8-15).which agrees with the result in Example 8-1.8.5TOTALHARMONIC DISTORTIONSince the objective of the inverter is to use a dc voltage source to supply a loadrequiring ac, it is useful to describe the quality of the ac output voltage or current.The quality of a nonsinusoidal wave can be expressed in terms of total harmonicdistortion (THD), deÞned in Chap. 2. Assuming no dc component in the output,(8-17)The THD of current is determined by substituting current for voltage in theabove equation. The THD of load current is often of greater interest than thatof output voltage. This deÞnition for THD is based on the Fourier series, sothere is some beneÞt in using the Fourier series method for analysis when theTHD must be determined. Other measures of distortion such as distortion factor,as presented in Chap. 2, can also be applied to describe the output waveform forinverters.THD for a Square-Wave InverterDetermine the total harmonic distortion of the load voltage and the load current for thesquare-wave inverter in Examples 8-1 and 8-2.THDAaqn2(Vn, rms)2V1, rms2V2rmsV21, rmsV1, rmsP aPn 429.3 10.0 1.40 0.37 0.14 ÁL 441 WTable 8-1Fourier Series Quantities for Example 8-2nfn(Hz)Vn(V)Zn()In(A)Pn(W)160127.313.79.27429.3318042.430.01.4210.0530025.548.20.531.40742018.266.70.270.37954014.185.40.170.14EXAMPLE 8-3har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 339
340CHAPTER 8Inverters■SolutionUse the Fourier series for the square wave in Eq. (8-16) and the deÞnition of THD inEq. (8-17). The rms value of the square wave voltage is the same as the peak value, andthe fundamental frequency component is the Þrst term in Eq. (8-16),Using Eq. (8-17) to compute the total harmonic distortion for voltage,The THD of the current is computed using the truncated Fourier series which was deter-mined in Example 8-2.8.6PSPICE SIMULATION OFSQUARE-WAVEINVERTERSComputer simulation of inverter circuits can include various levels of circuitdetail. If only the current waveform in the load is desired, it is sufÞcient to providea source that will produce the appropriate voltage that would be expected on theinverter output. For example, a full-bridge inverter producing a square wave out-put might be replaced with a square wave voltage source using the VPULSEsource. This simpliÞed simulation will predict the behavior of the current in theload but will give no direct information about the switches. Also, this approachassumes that the switching operation correctly produces the desired output.PSpice Simulation for Example 8-1For a series (RL) load in a full-bridge inverter circuit with a square wave output, the dcsupply is 100 V, R10 , L25 mH, and the switching frequency is 60 Hz (Example 8-1).(a) Assuming ideal switches, use PSpice to determine the maximum and minimumTHDI Aaqn2(In, rms)2I1, rms L2(1.42>12)2(0.53>12)2(0.27>12)2(0.17>12)29.27>120.16716.7%THDV2V2rmsV21, rmsV1, rms2V2dc(4Vdc>12)24Vdc>120.48348.3%VrmsVdcV1, rmsV1124Vdc12 EXAMPLE 8-4har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 340
8.6PSpice Simulation of Square-Wave Inverters341current in the load in the steady state. (b) Determine the power absorbed by the load.(c) Determine the total harmonic distortion of the load current.■Solution 1Since individual switch currents are not of concern in this problem, a square wave volt-age source (VPULSE), as shown in Fig. 8-4a, across the load can simulate the converteroutput.Set up a simulation proÞle for a transient analysis having a run time of 50 ms (threeperiods), and start saving data after 16.67 ms (one period) so the output represents steady-state current.Figure 8-4(a) Square-wave inverter simulation using an ideal source;(b) Square-wave inverter using switches and diodes.+V1VdcControl12Control34Ideal Switches and DiodesS1S3D1D3Control12S2D2D4Control12Control34GAIN = –1VsqrE100outOut+Out–V–V+R1012L25m(a)(b)SQUARE–WAVE INVERTERInverter with Switches and DiodesPARAMETERS:Vdc = 100freq = 60V1 = {Vdc}V2 = {–Vdc}TD = 0TR = 1nTF = 1nPW = {1/(2*freq)}PER = {1/freq}10RL1225m–+–PARAMETERS:freq = 60V1 = –1V2 = 1TD = 0TR = 1nTF = 1nPW = {1/(2*freq)}PER = {1/freq}+++––++–Control34S4++–+++{{{{––har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 341
342CHAPTER 8InvertersFourier analysis is performed under Simulation Settings, Output File Options, PerformFourier Analysis, Center Frequency: 60 Hz, Number of Harmonics: 15, Output Variables:V(OUT) I(R).(a)When in Probe, enter the expression I(R) to obtain a display of the current in theload resistor. The Þrst period contains the start-up transient, but steady-state currentlike that in Fig. 8-2is displayed thereafter. The maximum and minimum steady-state current values are approximately 9.31 and 9.31 A, which can be obtainedprecisely by using the cursor option.(b)Average power can be obtained from Probe by displaying load current, making sure thatthe data represent the steady-state condition and entering the expression AVG(W(R))orAVG(V(OUT)*I(R)). This shows that the resistor absorbs approximately 441 W.The rms current is determined by entering RMS(I(R)), resulting in 6.64 A, as readfrom the end of the trace. These results agree with the analysis in Example 8-1.(c)The THD is obtained from the Fourier series for I(R) in the output Þle as 16.7 percent,agreeing with the Fourier analysis in Examples 8-2 and 8-3. Note that the THD forthe square wave in the output Þle is 45 percent, which is lower than the 48.3 percentcomputed in Example 8-3. The THD in PSpice is based on the truncated Fourierseries through n15. The magnitudes of higher-order harmonics are notinsigniÞcant for the square wave, and omitting them underestimates the THD. Thehigher-order current harmonics are small, so there is little error in omitting them fromthe analysis. The number of harmonics in the output Þle can be increased if desired.■Solution 2The inverter is simulated using the full-bridge circuit of Fig. 8-4b. (This requires the fullversion of PSpice.) The result of this simulation gives information about the currents andvoltages for the switching devices. Voltage-controlled switches (Sbreak) and the defaultdiode (Dbreak) are used. Diodes are included in the switch model to make the switchesunidirectional. The model for Sbreak is changed so Ron0.01 , and the model forDbreak is changed so n0.01, approximating an ideal diode. The output voltage isbetween nodes outand out. Models for the switches and diodes can be changed todetermine the behavior of the circuit using realistic switching devices.8.7AMPLITUDE AND HARMONIC CONTROLThe amplitude of the fundamental frequency for a square wave output from ofthe full-bridge inverter is determined by the dc input voltage [Eq. (8-16)]. Acon-trolled output can be produced by modifying the switching scheme. An outputvoltage of the form shown in Fig. 8-5ahas intervals when the output is zero aswell as Vdcand Vdc. This output voltage can be controlled by adjusting theinterval on each side of the pulse where the output is zero. The rms value of thevoltage waveform in Fig 8-5ais(8-18)VrmsB1LV2dc d(t)VdcA12har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 342
8.7Amplitude and Harmonic Control343The Fourier series of the waveform is expressed as(8-19)Taking advantage of half-wave symmetry, the amplitudes are(8-20)Vn2 3Vdc sin(n0t) d(0t)4Vdcn cos(n)vo (t)an oddVn sin(n0t)απ2πωt+Vdc–Vdcvo:0(a)(b)OpenαααS1S2S2S40S1S30S2S40S1S2VdcS3S4–VdcS3S4ClosedFigure 8-5(a) Inverter output for amplitude and harmonic control; (b) Switchingsequence for the full-bridge inverter of Fig. 8-1a.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 343
344CHAPTER 8Inverterswhere is the angle of zero voltage on each end of the pulse. The amplitude ofeach frequency of the output is a function of . In particular, the amplitude of thefundamental frequency (n1) is controllable by adjusting :(8-21)Harmonic content can also be controlled by adjusting . If 30, forexample, V30. This is signiÞcant because the third harmonic can be eliminatedfrom the output voltage and current. Other harmonics can be eliminated bychoosing a value of which makes the cosine term in Eq. (8-20) to go to zero.Harmonic nis eliminated if(8-22)The switching scheme required to produce an output like Fig. 8-5amust pro-vide intervals when the output voltage is zero, as well as Vdc. The switchingsequence of Fig. 8-5bis a way to implement the required output waveform.Amplitude control and harmonic reduction may not be compatible. Forexample, establishing at 30to eliminate the third harmonic Þxes the amplitudeof the output fundamental frequency at V1(4Vdc/) cos 301.1Vdcandremoves further controllability. To control both amplitude and harmonics usingthis switching scheme, it is necessary to be able to control the dc input voltage tothe inverter. Adc-dc converter (Chap. 6and 7) placed between the dc source and theinverter can provide a controlled dc input to the inverter.Agraphical representation of the integration in the Fourier series coefÞcientof Eq. (8-20) gives some insight into harmonic elimination. Recall from Chap. 2that the Fourier coefÞcients are determined from the integral of the product of thewaveform and a sinusoid. Figure 8-6ashows the output waveform for 30and the sinusoid of 3o. The product of these two waveforms has an area ofzero, showing that the third harmonic is zero. Figure 8-6bshows the waveformfor 18and the sinusoid of 5o, showing that the Þfth harmonic is elim-inated for this value of .Other switching schemes can eliminate multiple harmonics. For example,the output waveform shown in Fig. 8-6celiminates both the third and Þfth har-monics, as indicated by the areas of both being zero.Harmonic Control of the Full-Bridge Inverter OutputDesign an inverter that will supply the series RLload of the previous examples (R10 andL25 mH) with a fundamental-frequency current amplitude of 9.27 A, but with aTHD of less than 10 percent.Avariable dc source is available.■SolutionAsquare-wave inverter produces a THD for current of 16.7 percent (Example 8-3), whichdoes not meet the speciÞcation. The dominant harmonic current is for n3, so a switching90¡nV1 a4Vdcb cos EXAMPLE 8-5har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 344
8.7Amplitude and Harmonic Control345scheme to eliminate the third harmonic will reduce the THD. The required voltage ampli-tude at the fundamental frequency isV1I1Z1I12R2(0 L)29.2721023260 (0.025)42127 V0n = 3n = 5(a)(b)(c)vo(t)α = 30°α = 18°0030°54°66°114°126°150°n = 3n = 5Figure 8-6Harmonic elimination; (a) Third harmonic; (b) Fifthharmonic; (c) Third and Þfth harmonics.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 345
346CHAPTER 8InvertersUsing the switching scheme of Fig. 8-5b, Eq. (8-21) describes the amplitude of thefundamental-frequency voltage,Solving for the required dc input with 30,Other harmonic voltages are described by Eq. (8-20), and currents for these harmon-ics are determined from voltage amplitude and load impedance using the same tech-nique as for the square-wave inverter of Example 8-2. The results are summarized inTable 8-2.Vdc V14 cos 1274 cos 30¡ 116 VV1a4Vdcb cos Table 8-2Fourier Series Quantities for Example 8-5nfn(Hz)Vn(V)Zn()In(A)16012713.79.273180030.00530025.548.20.53742018.266.70.279540085.401166011.61040.11The THD of the load current is thenwhich more than satisÞes the design speciÞcations.APSpice circuit for the full-bridge inverter with harmonic and amplitude control isshown in Fig. 8-7a. The user must enter the parameters alpha, output fundamental fre-quency, dc input voltage to the bridge, and load. The Probe output for voltage and currentis shown in Fig. 8-7b. The current is scaled by a factor of 10 to show its relationship tothe voltage waveform. The THD of the load current is obtained from the Fourier analysisin the output Þle as 6.6 percent.THD1Aaqn2I2n, rmsI1, rmsL2(0.53>12)2(0.27>12)2(0.11>12)29.27>120.0666.6%8.8THE HALF-BRIDGE INVERTERThe half-bridge converter of Fig. 8-8can be used as an inverter. This circuit wasintroduced in Chap. 7as applied to dc power supply circuits. In this circuit, thenumber of switches is reduced to 2 by dividing the dc source voltage into twoparts with the capacitors. Each capacitor will be the same value and will havehar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 346
8.8The Half-Bridge Inverter347voltage Vdc/2 across it. When S1is closed, the load voltage is Vdc/2. When S2isclosed, the load voltage is Vdc/2. Thus, a square wave output or a bipolar pulse-width-modulated output, as described in Sec. 8.10, can be produced.The voltage across an open switch is twice the load voltage, or Vdc. As withthe full-bridge inverter, blanking time for the switches is required to prevent ashort circuit across the source, and feedback diodes are required to provide con-tinuity of current for inductive loads.(a)+–+IN+ OUT+IN– OUT–IN+ OUT+IN– OUT–VsqrV1 = –2V2 = 2TD = {Talpha}TR = 1nTF = 1nPW = {1/(2*freq–2n)}PER = {1/(freq)}V1 = –2V2 = 2TD = {1/(2*freq)-Talpha}TR = 1nTF = 1nPW = {1/(2*freq)–2n}PER = {1/(freq)}PARAMETERS:alpha = 30freq = 60Vdc = 100Talpha = {alpha/360/freq}Vsqr2ETABLETABLE = (–2,–1)(–1,0)(1,0)(2,1)INVERTER WITH AMPLITUDE AND HARMONIC CONTROL{V(%In+, %In–)*Vdc}EVALUEVOutR10L125M2–100–1501005000 Hz200 Hz400 Hz600 Hz800 Hz30 msV(Out)40 msvi50 msTimeFrequencyFOURIER(b)60 ms70 ms0SEL>>I(R)*10V(Out)I(R)*10Figure 8-7(a) APSpice circuit for Example 8-5 to produce the voltage waveform inFig. 8-5a; (b) Probe output for showing harmonic elimination.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 347
348CHAPTER 8Inverters8.9MULTILEVELINVERTERSThe H bridge inverter previously illustrated in Figs. 8-1 and 8-3 producesoutput voltages of Vdc, 0, and ÐVdc. The basic H bridge switching concept can beexpanded to other circuits that can produce additional output voltage levels.++ÐÐ+ÐVdcS1Vdc2(a)vo+ÐVdc2S2Vdc100PARAMETERS:freq = 60V1 = –1V2 = 1TD = 0TR = 1nTF = 1nPW = {1/(2*freq)}PER = {1/(freq)}C1Ideal Switches and DiodesHALF–BRIDGE INVERTER10000uC210000uV1(b)Control1Control2GAIN = –1ELV−V+25mR1012+–Control1S1S2D1Out+Out–++––++––Control2D2++––{{Figure 8-8(a) Ahalf-bridge inverter using IGBTs. Theoutput is Vdc; (b) APSpice implementation using voltage-controlled switches and diodes.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 348
8.9Multilevel Inverters349These multilevel-output voltages are more sinelike in quality and thus reduceharmonic content. The multilevel inverter is suitable for applications includingadjustable-speed motor drives and interfacing renewable energy sources such asphotovoltaics to the electric power grid.Multilevel Converters with Independent DC SourcesOne multilevel inverter method uses independent dc sources, each with an H bridge.Acircuit with two dc voltage sources is shown in Fig. 8-9. The output of each ofthe H bridges is Vdc, Vdc, or 0, as was illustrated in Fig. 8-1. The total instan-taneous voltage voon the output of the multilevel converter is any combinationof individual bridge voltages. Thus, for a two-source inverter, vocan be any ofthe Þve levels 2Vdc, Vdc, 0, Vdc, or 2Vdc.Each H bridge operates with a switching scheme like that of Fig. 8.5 inSec. 8.7, which was used for amplitude or harmonic control. Each bridge oper-ates at a different delay angle , resulting in bridge and total output voltages likethose shown in Fig. 8-10.The Fourier series for the total output voltage vofor the two-source circuitcontains only the odd-numbered harmonics and is(8-23)vo(t)4Vdcaqn 1,3,5,7, . . .3cos(n1)cos(n2)4sin(n0t)nFigure 8-9An inverter with two dc sources, each with anH bridge implemented with IGBTs.Vdcv2vo+++–––Vdcv1++––har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 349
350CHAPTER 8InvertersThe Fourier coefÞcients for this series are(8-24)The modulation index Miis the ratio of the amplitude of the fundamental fre-quency component of voto the amplitude of the fundamental frequency compo-nent of a square wave of amplitude 2Vdc, which is .(8-25)Some harmonics can be eliminated from the output voltage waveform withthe proper selection of 1and 2in Eq. (8-24). For the two-source converter, har-monic mcan be eliminated by using delay angles such that(8-26)To eliminate the mth harmonic and also meet a speciÞed modulation indexfor the two-source inverter requires the simultaneous solution to Eq. (8-26) andthe additional equation derived from Eq. (8-25),(8-27)To solve Eqs. (8-26) and (8-27) simultaneously requires an iterative numericalmethod such as the Newton-Raphson method.cos(1)cos(2)2Micos(m1)cos(m2)0MiV12(4Vdc /)cos 1cos 222(4Vdc/)Vn4Vdcn 3cos(n1)cos(n2)402Vdc–2VdcVdc–Vdcvoα1α2ωt0v2v1α2ππ – α2ωt0α1ππ – α1ωtFigure 8-10Voltage output of each of the H bridges andthe total voltage for the two-source multilevel inverter ofFig. 8-9.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 350
8.9Multilevel Inverters351ATwo-Source Multilevel InverterFor the two-source multilevel inverter of Fig. 8-9with Vdc100 V: (a) Determine theFourier coefÞcients through n9 and the modulation index for 120and 240.(b) Determine 1and 2such that the third harmonic (n3) is eliminated and Mi0.8.■SolutionUsing Eq. 8-24 to evaluate the Fourier coefÞcients,resulting in V1217, V30, V528.4, V710.8, and V90. Note that the thirdand ninth harmonics are eliminated. The even harmonics are not present.The modulation index Miis evaluated from Eq. (8-25).The amplitude of the fundamental frequency voltage is therefore 85.3 percent of thatof a square wave of 200 V.(b)To achieve simultaneous elimination of the third harmonic and a modulation index ofMi0.8 requires the solution to the equationsandUsing an iterative method, 17.6and 252.4.The preceding concept can be extended to a multilevel converter having severaldc sources. For kseparate sources connected in cascade, there are 2k1 possiblevoltage levels. As more dc sources and H bridges are added, the total output volt-age has more steps, producing a staircase waveform that more closelyapproaches a sinusoid. For a Þve-source system as shown in Fig. 8-11, there are11 possible output voltage levels, as illustrated in Fig. 8-12.The Fourier series for a staircase waveform such as that in Fig 8-12for ksep-arate dc sources each equal to Vdcis(8-28)The magnitudes of the Fourier coefÞcients are thus(8-29)Vn4Vdcn 3cos(n1)cos(n2)Ácos(nk)4for n 1, 3, 5, 7, . . .vo(t)4Vdcaqn1,3,5,7, . . .3cos(n1)cos(n2)Ácos(nk)4sin(n0t)ncos(1)cos(2)2Mi1.6cos(31)cos(32)0Micos1cos22cos 20¡cos 40¡20.853Vn4Vdcn 3cos(n1)cos(n2)44(100)n 3cos(n20¡)cos(n40¡)4EXAMPLE 8-6har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 351
352CHAPTER 8InvertersThe modulation index Mifor kdc sources each equal to Vdcis(8-30)MiV14kVdc/cos(1)cos(2)Ácos(k)kFigure 8-11AÞve-source cascademultilevel converter.0Vdc2Vdc3Vdc4Vdc5Vdcv5α5α4α3α2α1v4v3v2v1Vdcv5++–v4+–v3+–v2+–v1+–vo+––Vdc+–Vdc+–Vdc+–Vdc+–Figure 8-12Voltages at each H bridge in Fig. 8-11and thetotal output voltage.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 352
8.9Multilevel Inverters353SpeciÞc harmonics can be eliminated from the output voltage. To eliminate themth harmonic, the delay angles must satisfy the equation(8-31)For kdc sources, k1 harmonics can be eliminated while establishing a par-ticular Mi.AFive-Source Multilevel InverterDetermine the delay angles required for a Þve-source cascade multilevel converter thatwill eliminate harmonics 5, 7, 11, and 13 and will have a modulation index Mi0.8.■SolutionThe delay angles must satisfy these simultaneous equations:An iteration method such as the Newton-Raphson method must be used to solve theseequations. The result is 16.57, 218.94, 327.18, 445.14, and 562.24. See the references in the Bibliography for information on the technique.Equalizing Average Source Powerwith Pattern SwappingIn the two-source inverter of Fig. 8-9using the switching scheme of Fig. 8-10,the source and H bridge producing the voltage v1supplies more average power(and energy) than the source and H bridge producing v2due to longer pulsewidths in both the positive and negative half cycles. If the dc sources are batter-ies, one battery will discharge faster than the other. Atechnique known as patternswapping or duty swapping equalizes the average power supplied by each dcsource.The principle of pattern swapping is to have each dc source conduct for anequal amount of time on average. An alternate switching scheme for the two-source circuit is shown in Fig. 8-13. In this scheme, the Þrst source conducts fora longer time in the Þrst half-cycle while the second source conducts for moretime in the second half-cycle. Thus, over one complete period, the sources con-duct equally, and average power from each source is the same.For the Þve-source converter in Fig. 8-11, a switching scheme to equalizeaverage power is shown in Fig. 8-14. Note that Þve half cycles are required toequalize power.Avariation of the H bridge multilevel inverter is to have the dc sources be ofdifferent values. The output voltage would be a staircase waveform, but not in equalcos(51)cos(52)cos(53)cos(54)cos(55)0cos(71)cos(72)cos(73)cos(74)cos(75)0cos(111)cos(112)cos(113)cos(114)cos(115)0cos(131)cos(132)cos(133)cos(134)cos(135)0cos(1)cos(2)cos(3)cos(4)cos(5)5Mi5(0.8)4cos(m1)cos(m2)Ácos(mk)0EXAMPLE 8-7har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 353
354CHAPTER 8Invertersvoltage increments. The Fourier series of the output voltage would have different-valued harmonic amplitudes which may be an advantage in some applications.Because independent voltage sources are needed, the multiple-source imple-mentation of multilevel converters is best suited in applications where batteries,fuel cells, or photovoltaics are the sources.Diode-Clamped Multilevel InvertersAmultilevel converter circuit that has the advantage of using a single dc sourcerather than multiple sources is the diode-clamped multilevel converter shown inFig. 8-15a. In this circuit, the dc voltage source is connected to a pair of seriescapacitors, each charged to Vdc/2. The following analysis shows how the outputvoltage can have the levels of Vdc, Vdc/2, 0, Vdc/2, or ÐVdc.v3v2v1Figure 8-13Pattern swapping to equalizeaverage power in each source for the two-source inverter of Fig. 8-9.vov5v4v3v2v1Figure 8-14Pattern swapping to equalize average source power for the Þve-sourcemultilevel inverter of Fig. 8-11.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 354
8.9Multilevel Inverters355For the analysis, consider only the left half of the bridge, as shown in Fig. 8-15b,c, and d. With S1and S2closed and S3and S4open, V1Vdc(Fig. 8-15b). Thediodes are off for this condition. With S1and S2open and S3and S4closed, V10(Fig. 8-15c). The diodes are off for this condition also. To produce a voltage ofVdc/2, S2and S3are closed, and S1and S4are open (Fig. 8-15d). The voltage v1isthat of the lower capacitor, at voltage Vdc/2, connected through the antiparalleldiode path that can carry load current in either direction. Note that for each ofS1S2+–vo(a)S5S6S3VdcS7S4S8VdcS1S2(b)(c)(d)v1 = Vdc+–VdcVdcVdc/2Vdc/2S1S3S4v1 = 0+–S2S3S4S1S4S2S3v1 = Vdc/2++–+–+––+–+–Figure 8-15(a) Adiode-clamped multilevel inverter implemented with IGBTs. (b) Analysis forone-half of the circuit for v1Vdc, (c) for v10, and (d) for v1Vdc.12har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 355
356CHAPTER 8Invertersvo+–+–+–+–Vdc/3Vdc/3Vdc/3VdcFigure 8-16Adiode-clamped multilevel inverter that producesfour voltage levels on each side of the bridge and seven outputvoltage levels.these circuits, two switches are open, and the voltage of the source dividesbetween the two, thus reducing the voltage stress across each switch compared tothe H bridge circuit of Fig. 8-1.Using a similar analysis, the right half of the bridge can also produce thevoltages Vdc, 0, and Vdc/2. The output voltage is the difference of the voltagesbetween each half bridge, resulting in the Þve levels(8-32)with multiple ways to achieve some of them. The switch control can establishdelay angles 1and 2,to produce an output voltage like that in Fig. 8-10for thecascaded H bridge, except that the maximum value is Vdcinstead of 2Vdc.More output voltage levels are achieved with additional capacitors andswitches. Figure 8-16shows the dc source divided across three series capacitors.voHbVdc, 12Vdc, 0,12Vdc,Vdcrhar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 356
8.10Pulse-Width-Modulated Output357The voltage across each capacitor is V, producing the four voltage levels on13each side of the bridge of Vdc, Vdc, Vdc, and 0. The output voltage can then havethe seven levels(8-33)8.10PULSE-WIDTH-MODULATED OUTPUTPulse-width modulation (PWM) provides a way to decrease the total harmonicdistortion of load current. APWM inverter output, with some Þltering, can gen-erally meet THD requirements more easily than the square wave switchingscheme. The unÞltered PWM output will have a relatively high THD, but the har-monics will be at much higher frequencies than for a square wave, making Þlter-ing easier.In PWM, the amplitude of the output voltage can be controlled with themodulating waveforms. Reduced Þlter requirements to decrease harmonics andthe control of the output voltage amplitude are two distinct advantages of PWM.Disadvantages include more complex control circuits for the switches andincreased losses due to more frequent switching.Control of the switches for sinusoidal PWM output requires (1) a referencesignal, sometimes called a modulating or control signal, which is a sinusoid inthis case and (2) a carrier signal, which is a triangular wave that controls theswitching frequency. Bipolar and unipolar switching schemes are discussed next.BipolarSwitchingFigure 8-17illustrates the principle of sinusoidal bipolar pulse-width modula-tion. Figure 8-17ashows a sinusoidal reference signal and a triangular carriersignal. When the instantaneous value of the sine reference is larger than the tri-angular carrier, the output is at Vdc, and when the reference is less than the car-rier, the output is at Vdc:(8-34)This version of PWM is bipolarbecause the output alternates between plus andminus the dc supply voltage.The switching scheme that will implement bipolar switching using the full-bridge inverter of Fig. 8-1is determined by comparing the instantaneous refer-ence and carrier signals:S1and S2are on when vsinevtri(voVdc)S3and S4are on when vsinevtri.(voVdc)vo Vdc for vsinev trivoVdc for vsinev trivoHbVdc, 23Vdc, 13Vdc, 0,13Vdc, 23Vdc, Vdcr1323har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 357
358CHAPTER 8InvertersUnipolarSwitchingIn a unipolar switching scheme for pulse-width modulation, the output is switchedeither from high to zero or from low to zero, rather than between high and low as inbipolar switching. One unipolar switching scheme has switch controls in Fig. 8-1as follows:S1is on when vsinevtriS2is on when vsinevtriS3is on when vsinevtriS4is on when vsinevtriNote that switch pairs (S1, S4) and (S2, S3) are complementaryÑwhen one switchin a pair is closed, the other is open. The voltages vaand vbin Fig. 8-18aalternatebetween Vdcand zero. The output voltage vovabvavbis as shown inFig. 8-18d.Another unipolar switching scheme has only one pair of switches operatingat the carrier frequency while the other pair operates at the reference frequency,thus having two high-frequency switches and two low-frequency switches. Inthis switching scheme,S1is on when vsinevtri(high frequency)S4is on when vsinevtri(high frequency)Figure 8-17Bipolar pulse-width modulation. (a) Sinusoidalreference and triangular carrier; (b) Output is Vdcwhen vsinevtriand is Vdcwhen vsinevtri.(a)(b)vtri(Carrier)Vdc–Vdcvsine(Reference)har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 358
8.11PWM DeÞnitions and Considerations359S2is on when vsine0(low frequency)S3is on when vsine0(low frequency)where the sine and triangular waves are as shown in Fig. 8-19a. Alternatively,S2and S3could be the high-frequency switches, and S1and S4could be the low-frequency switches.8.11PWM DEFINITIONS AND CONSIDERATIONSAt this point, some deÞnitions and considerations relevant when using PWMshould be stated.+–VdcS1++––vo = vabva+(a)(b)(c)–vbvtriVdcVdc–VdcVdc000vavbvabvsine–vsine(d)S4S2S3Figure 8-18(a) Full-bridge converter for unipolar PWM; (b) Referenceand carrier signals; (c) Bridge voltages vaand vb; (d) Output voltage.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 359
360CHAPTER 8Inverters1.Frequency modulation ratiomf. The Fourier series of the PWM outputvoltage has a fundamental frequency which is the same as the referencesignal. Harmonic frequencies exist at and around multiples of the switchingfrequency. The magnitudes of some harmonics are quite large, sometimeslarger than the fundamental. However, because these harmonics are locatedat high frequencies, a simple low-pass Þlter can be quite effective inremoving them. Details of the harmonics in PWM are given in the nextsection. The frequency modulation ratiomfis deÞned as the ratio of thefrequencies of the carrier and reference signals,(8-35)Increasing the carrier frequency (increasing mf) increases the frequencies atwhich the harmonics occur. Adisadvantage of high switching frequenciesis higher losses in the switches used to implement the inverter.2.Amplitude modulation ratioma.The amplitude modulation ratiomaisdeÞned as the ratio of the amplitudes of the reference and carrier signals:(8-36)maVm, referenceVm, carrierVm, sineVm, trimffcarrierfreferenceftrifsine(a)(b)+Vdc+Vdc00+Vdc–Vdc0vavbvo = vab(c)(d)Figure 8-19Unipolar PWM with high- and low-frequencyswitches. (a) Reference and control signals; (b) va(Fig. 8-18a);(c) vb; (d) output vavb.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 360
8.12PWM Harmonics361If ma1, the amplitude of the fundamental frequency of the outputvoltage V1is linearly proportional to ma. That is,(8-37)The amplitude of the fundamental frequency of the PWM output is thuscontrolled by ma. This is signiÞcant in the case of an unregulated dc supplyvoltage because the value of macan be adjusted to compensate forvariations in the dc supply voltage, producing a constant-amplitude output.Alternatively, macan be varied to change the amplitude of the output. If maisgreater than 1, the amplitude of the output increases with ma, but not linearly.3.Switches. The switches in the full-bridge circuit must be capable ofcarrying current in either direction for pulse-width modulation just as theydid for square wave operation. Feedback diodes across the switchingdevices are necessary, as was done in the inverter in Fig. 8-3a. Anotherconsequence of real switches is that they do not turn on or off instantly.Therefore, it is necessary to allow for switching times in the control of theswitches just as it was for the square-wave inverter.4.Reference voltage. The sinusoidal reference voltage must be generatedwithin the control circuit of the inverter or taken from an outside reference.It may seem as though the function of the inverter bridge is unnecessarybecause a sinusoidal voltage must be present before the bridge can operateto produce a sinusoidal output. However, there is very little power requiredfrom the reference signal. The power supplied to the load is provided bythe dc power source, and this is the intended purpose of the inverter. Thereference signal is not restricted to a sinusoid, and other waveshapes canfunction as the reference signal.8.12PWM HARMONICSBipolarSwitchingThe Fourier series of the bipolar PWM output illustrated in Fig. 8-17is deter-mined by examining each pulse. The triangular waveform is synchronized to thereference as shown in Fig 8-17a, and mfis chosen to be an odd integer. The PWMoutput then exhibits odd symmetry, and the Fourier series can then be expressed(8-38)For the kth pulse of the PWM output in Fig. 8-20, the Fourier coefÞcient is 2 c3kkkVdc sin(n0 t) d(0 t) 3k1kk(Vdc)sin(n0 t) (d(0 t)dVnk2 3T0v(t) sin(n0 t) d(0 t)vo(t) aq n1Vn sin(n 0 t)V1maVdchar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 361
362CHAPTER 8InvertersPerforming the integration,(8-39)Each Fourier coefÞcient Vnfor the PWM waveform is the sum of Vnkfor the ppulses over one period,(8-40)The normalized frequency spectrum for bipolar switching for ma1 isshown in Fig. 8-21. The harmonic amplitudes are a function of mabecause theVn ap k1VnkVnk2Vdcn [cos nkcos nk12 cos n(kk)]0vtrivsine+VdcÐVdcαkαk + δkαk+1δkFigure 8-20Single PWM pulse for determining Fourierseries for bipolar PWM.01mf2mf3mf4mf5mf6mfVnn0.200.400.600.801.00Figure 8-21Frequency spectrum for bipolar PWM with ma1.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 362
8.12PWM Harmonics363width of each pulse depends on the relative amplitudes of the sine and triangularwaves. The Þrst harmonic frequencies in the output spectrum are at and aroundmf. Table 8-3indicates the Þrst harmonics in the output for bipolar PWM. TheFourier coefÞcients are not a function of mfif mfis large (9).Table 8-3Normalized Fourier CoefÞcients Vn/Vdcfor Bipolar PWMma10.90.80.70.60.50.40.30.20.1n11.000.900.800.700.600.500.400.300.200.10nmf0.600.710.820.921.011.081.151.201.241.27nmf20.320.270.220.170.130.090.060.030.020.00EXAMPLE 8-8APWM InverterThe full-bridge inverter is used to produce a 60-Hz voltage across a series RLload usingbipolar PWM. The dc input to the bridge is 100 V, the amplitude modulation ratio mais0.8, and the frequency modulation ratio mfis 21 [ftri(21)(60) 1260 Hz]. The load hasa resistance of R10 and series inductance L20 mH. Determine (a) the amplitudeof the 60-Hz component of the output voltage and load current, (b) the power absorbedby the load resistor, and (c) the THD of the load current.■Solution(a)Using Eq. (8-38) and Table 8-3, the amplitude of the 60-Hz fundamental frequency isThe current amplitudes are determined using phasor analysis:(8-41)For the fundamental frequency,(b)With mf21, the Þrst harmonics are at n21, 19, and 23. Using Table 8-3,Current at each of the harmonics is determined from Eq. (8-41).Power at each frequency is determined fromPn(In, rms)2RaIn12b2RV19V23(0.22)(100)22 VV21(0.82)(100)82 VI1802102[(1)(260)(0.02)]26.39 AInVnZnVn2R2(n0L)2V1maVdc(0.8)(100)80 Vhar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 363
364CHAPTER 8InvertersTable 8-4Fourier Series Quantities for the PWM Inverter of Example 8-8nfn(Hz)Vn(V)Zn()In(A)In,rms(A)Pn(W)16080.012.56.394.52204.019114022.0143.60.150.110.121126081.8158.70.520.361.323138022.0173.70.130.090.1The resulting voltage amplitudes, currents, and powers at these frequencies are sum-marized in Table 8-4.Power absorbed by the load resistor isHigher-order harmonics contribute little power and can be neglected.(c)The THD of the load current is determined using Eq. (8-17) with the rms current ofthe harmonics approximated by the Þrst few terms indicated in Table 8-4.By using the truncated Fourier series in Table 8-4, the THD will be underestimated.However, since the impedance of the load increases and the amplitudes of the har-monics generally decrease as nincreases, the above approximation should be accept-able. (Including currents through n100 gives a THD of 9.1 percent.)THD1Aaqn2I2n, rmsI1, rmsL2(0.11)2(0.36)2(0.09)24.520.0878.7%PaPnL204.00.11.30.1205.5 WEXAMPLE 8-9PWM Inverter DesignDesign a bipolar PWM inverter that will produce a 75-Vrms 60-Hz output from a 150-Vdc source. The load is a series RLcombination with R12 and L60 mH. Select theswitching frequency such that the current THD is less than 10 percent.■SolutionThe required amplitude modulation ratio is determined from Eq. (8-38),The current amplitude at 60 Hz isI1V1Z175222122[(260)(0.06)]24.14 AmaV1Vdc75221500.707har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 364
8.12PWM Harmonics365The rms value of the harmonic current has a limit imposed by the required THD,The term that will produce the dominant harmonic current is at the switching frequency.As an approximation, assume that the harmonic content of the load current is the same asthe dominant harmonic at the carrier frequency:The amplitude of the current harmonic at the carrier frequency is then approximated asTable 8-3indicates that the normalized voltage harmonic for nmfand for ma0.7 is0.92. The voltage amplitude for nmfis thenThe minimum load impedance at the carrier frequency is thenBecause the impedance at the carrier frequency must be much larger than the 12-loadresistance, assume the impedance at the carrier frequency is entirely inductive reactance,For the load impedance to be greater than 333 ,Selecting mfto be at least 15 would marginally meet the design speciÞcations. However,the estimate of the harmonic content used in the calculations will be low, so a higher car-rier frequency is a more prudent selection. Let mf17, which is the next odd integer. Thecarrier frequency is thenFurther increasing mfwould reduce the current THD, but at the expense of larger switch-ing losses. APSpice simulation, as discussed later in this chapter, can be used to verifythat the design meets the speciÞcations.UnipolarSwitchingWith the unipolar switching scheme in Fig. 8-18, some harmonics that were inthe spectrum for the bipolar scheme are absent. The harmonics in the outputbegin at around 2mf, and mfis chosen to be an even integer. Figure 8-22showsthe frequency spectrum for unipolar switching with ma1.ftrimf fref(17)(60)1020 Hzmf 333(377)(0.06)14.7mf 0 L 333ZmfLLmf 0LZmfVmfImf1380.414333 ÆVmf0.92 Vdc(0.92)(150)138 VImf (0.1)(4.14)0.414 AAaqn2(In, rms)2LImf, rmsImf12Aaqn2(In, rms)2 0.1 I1, rms0.1a4.1412b0.293 Ahar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 365
366CHAPTER 8InvertersTable 8-5indicates the Þrst harmonics in the output for unipolar PWM.The unipolar PWM scheme using high- and low-frequency switches shownin Fig. 8-19will have similar results as indicated above, but the harmonics willbegin at around mfrather than 2mf.012mf4mf6mfVnn0.200.400.600.801.00Figure 8-22Frequency spectrum for unipolar PWM with ma1.Table 8-5Normalized Fourier CoefÞcients Vn/Vdcfor Unipolar PWM in Fig. 8-18ma10.90.80.70.60.50.40.30.20.1n11.000.900.800.700.600.500.400.300.200.10n2mf10.180.250.310.350.370.360.330.270.190.10n2mf30.210.180.140.100.070.040.020.010.000.008.13CLASS D AUDIO AMPLIFIERSThe reference signal for the PWM control circuit can be an audio signal, and thefull-bridge circuit could be used as a PWM audio ampliÞer. APWM audio ampli-Þer is referred to as aclass D ampliÞer. The triangular wave carrier signal for thisapplication is typically 250 kHz to provide adequate sampling, and the PWMwaveform is low-pass Þltered to recover the audio signal and deliver power to aspeaker. The spectrum of the PWM output signal is dynamic in this case.Class D ampliÞers are much more efÞcient than other types of audio powerampliÞers. The class AB ampliÞer, the traditional circuit for audio applications,has a maximum theoretical efÞciency of 78.5 percent for a sine wave of maximumundistorted output. In practice, with real audio signals, class AB efÞciency ismuch lower, on the order of 20 percent. The theoretical efÞciency of the class DampliÞer is 100 percent because the transistors are used as switches. Becausetransistor switching and Þltering are imperfect, practical class D ampliÞers areabout 75 percent efÞcient.Class D audio ampliÞers are becoming more prevalent in consumer electron-ics applications where greater efÞciency results in reduced size and increasedhar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 366
8.14Simulation of Pulse-Width-Modulated Inverters367battery life. In high-power applications such as at rock concerts, class D ampliÞersare used to reduce the size of the ampliÞer and for reduced heat requirements inthe equipment.8.14SIMULATION OFPULSE-WIDTH-MODULATEDINVERTERSBipolarPWMPSpice can be used to simulate the PWM inverter switching schemes presentedpreviously in this chapter. As with other power electronics circuits, the level ofcircuit detail depends on the objective of the simulation. If only the voltages andcurrents in the load are desired, a PWM source may be created without modelingthe individual switches in the bridge circuit. Figure 8-23shows two ways to pro-duce a bipolar PWM voltage. The Þrst uses an ABM2 block, and the second usesV1V2V1 = –1V2 = 1TD = 0TR = {0.5/(freq*mf) – .5n}TF = {0.5/(freq*mf – .5n)}PW = 1nPER = {1/(freq*mf)}V1 = –1V2 = 1TD = 0TR = {0.5/(freq*mf) – .5n}TF = {0.5/(freq*mf – .5n)}PW = 1nPER = {1/(freq*mf)}VOFF = 0VAMPL = {ma}FREQ = {freq}PHASE = {–90/mf}TriSineIN1IN++–IN–OUT+GAIN = {VDC}TABLE = (–2,–1)(–10u,–1)(10u,1)(2,1)OUT–E1E2PWM_21L120mR1102ETriV4V3VOFF = 0VAMPL = {ma}FREQ = {freq}PHASE = {−90/mf}SineBIPOLAR PWM FUNCTIONIN2EXP1 = {VDC}*(V(%IN1)–V(%IN2))/ABS((V(%IN1)–v(%IN2))+1n)OUTPWM_11L21020mR(a)(b)PARAMETERS:mf = 21ma = 0.8freq = 60VDC = 100+–+–+–+–{{Figure 8-23PSpice functional circuits for producing a bipolar PWM voltage using (a) an ABMblock and (b) an ETABLE voltage source.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 367
368CHAPTER 8Invertersa voltage-controlled voltage source ETABLE. Both methods compare a sinewave to a triangular wave. Either method allows the behavior of a speciÞc loadto a PWM input to be investigated.If the load contains an inductance and/or capacitance, there will be an initialtransient in the load current. Since the steady-state load current is usually of interest,one or more periods of the load current must be allowed to run before meaningfuloutput is obtained. One way to achieve this in PSpice is to delay output in the tran-sient command, and another way is to restrict the data to steady-state results inProbe. The reference signal is synchronized with the carrier signal as in Fig. 8-17a.When the triangular carrier voltage has negative slope going through zero, the sinu-soidal reference voltage must have positive slope going through zero. The triangu-lar waveform starts at the positive peak with negative slope. The phase angle of thereference sinusoid is adjusted to make the zero crossing correspond to that of the tri-angular wave by using a phase angle of 90/mf. The following example illustratesa PSpice simulation of a bipolar PWM application.EXAMPLE 8-10PSpice Simulation of PWMUse PSpice to analyze the PWM inverter circuit of Example 8-8.■SolutionUsing either PWM circuit in Fig. 8-23, the Probe output will be the waveforms shown inFig. 8-24a. The current is scaled by a factor of 10 to show more clearly its relationship150100–10032 ms36 ms40 msEXAMPLE 8–8: BIPOLAR PWMTime(a)V(PWM)44 ms48 ms51 ms0I(R)*10Figure 8-24(a) Probe output for Example 8-10 showing PWM voltage and load current(current is scaled for illustration); (b) Frequency spectra for voltage and current.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 368
8.14Simulation of Pulse-Width-Modulated Inverters369with output voltage. Note the sinelike quality of the current. The Fourier coefÞcients ofvoltage and current are determined by using the Fourier option under the xaxis menu orby pressing the FFTicon. Figure 8-24bshows the frequency spectra of voltage and cur-rent with the range on the xaxis selected to show the lower frequencies. The cursor optionis used to determine the Fourier coefÞcients.Table 8-6summarizes the results. Note the close correspondence with the results ofExample 8-8.Table 8-6PSpice Results of Example 8-10nfn(Hz)Vn(V)In(A)16079.86.3719114021.80.1521126082.00.5223138021.80.13100 V10.0 A7.5 A5.0 A0 A0 Hz1.0 KHz2.0 KHzFrequency(b)3.0 KHz4.0 KHzSEL>>50 VVOLTAGE SPECTRUMCURRENT SPECTRUM0 VV(PWM)I(R)Figure 8-24(continued)If the voltages and currents in the source and switches are desired, thePSpice input Þle must include the switches. Asomewhat idealized circuit usingvoltage-controlled switches with feedback diodes is shown in Fig. 8-25. To sim-ulate pulse-width modulation, the control for the switches in the inverter is thevoltage difference between a triangular carrier voltage and a sine reference volt-age. While this does not represent a model for real switches, this circuit is usefulto simulate either bipolar or unipolar PWM. Amore realistic bridge model wouldinclude devices such as BJTs, MOSFETs, or IGBTs for the switches. The modelthat is appropriate will depend on how completely switch performance must beinvestigated.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 369
370CHAPTER 8InvertersUnipolarPWMAgain, unipolar PWM can be simulated using various levels of switch models.The input Þle shown in Fig. 8-26utilizes dependent sources to produce a unipolarPWM output.VsV1 = Ð1V2 = 1TD = 0TR = {0.5/(freq*mf) Ð .5n}TF = {0.5/(freq*mf Ð .5n)}PW = 1nPER = {1/(freq*mf)}VOFF = 0VAMPL = {ma}FREQ = {freq}PHASE = {Ð90/mf}Ð+Ð++Cont12BIPOLAR PWMPARAMETERS:mf = 21ma = 0.8freq = 60S1S4D4(a)TABLE = (Ð2,Ð1)(Ð10u,Ð1)(10u,1)(2,1)(b)SineIN+ OUT+INÐ OUTÐE1E+ÐCont12Cont34E2VtD2S2D1D3Out+OutÐR101L20m2VdcÐ+12Ð+Ð+Cont34Cont12Ð+Ð++ÐS3Cont34++Ð{{Figure 8-25PSpice circuits for a PWM inverter (a) using voltage-controlledswitches and diodes but requires the full PSpice version and (b) generating aPWM function.Vsin14VOFF = 0VAMPL = {ma}FREQ = {f}PHASE = {–90/mf}V1 = 1V2 = –1TD = 0TR = {1/(2*fc)}TF = {1/(2*fc)}PW = 1nPER = {1/(fc)}–+–+IN+ OUT+IN– OUT–1RAV+V−VtriPARAMETERS:f = 60fc = {f*mf}ma = 0.9mf = 10Vdc = 100EVALUE =Vdc/2*V(%IN+, %IN–)/(abs(V(%IN+, %IN–))+1n)+1L2.65mVsin23FREQ = {1}VAMPL = {ma}VOFF = 0PHASE = {–90/mf + 180}12BEVALUEOUT+ IN+OUT– IN–EVALUE–+UNIPOLAR PWMFigure 8-26APSpice circuit for generating a unipolar PWM voltage. The output voltage is between nodesAand B.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 370
8.14Simulation of Pulse-Width-Modulated Inverters371Pulse-Width Modulation PSpice SimulationPulse-width modulation is used to provide a 60-Hz voltage across a series RLloadwith R 1 and L2.65 mH. The dc supply voltage is 100 V. The amplitude ofthe 60-Hz voltage is to be 90 V, requiring ma0.9. Use PSpice to obtain the currentwaveform in the load and the THD of the current waveform in the load. Use (a) bipo-lar PWM with mf21, (b) bipolar PWM with mf41, and (c) unipolar PWM withmf10.■Solution(a)The PSpice circuit for bipolar PWM (Fig. 8-25b) is run with ma0.9 and mf21.The voltage across the load and the current in the load resistor are shown in Fig. 8-27a. The currents for the 60-Hz fundamental and the lowest-order harmonicsare obtained from the Fourier option under xaxis in Probe. The harmonic amplitudescorrespond to the peaks, and the cursor option determines precise values. The rmscurrent can be obtained from Probe by entering the expression RMS(I(R)). Thetotal harmonic distortion based on the truncated Fourier series is computed fromEq. (8-17). Results are in the table in this example.(b)The PSpice circuit is modiÞed for mf41. The voltage and current waveforms areshown in Fig. 8-27b. The resulting harmonic currents are obtained from the Fourieroption in Probe.EXAMPLE 8-11Figure 8-27Voltage and current for Example 8-11 for (a) bipolar PWM with mf21,(b) bipolar PWM with mf41, (c) Unipolar PWM with mf10.100BIPOLAR PWM, Ma = 0.9, MF = 210–10035.0 ms40.0 msTime(a)45.0 ms50.0 msV(PWM)I(R)*10har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 371
372CHAPTER 8Inverters100BIPOLAR PWM, Ma = 0.9, Mf = 410–10035.0 ms40.0 msTime(b)45.0 ms50.0 msV(PWM)I(R)*10100UNIPOLAR PWM, Ma = 0.9, Mf = 100–10030 ms35 ms40 ms45 ms50 msV(A, B)I(R)Time(c)Figure 8-27(continued)har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 372
8.15Three-Phase Inverters373(c)The PSpice input Þle for unipolar switching in Fig. 8-26is run with the parametermf10. The output voltage and current are shown in Fig. 8-27c. The results of thethree simulations for this example are shown in the following table.Bipolarmf21Bipolarmf41Unipolarmf10fnInfnInfnIn6063.66064.06062.911401.4123400.6910201.012603.3924601.711401.413801.1525800.6212601.2413800.76Irms45.145.044.5THD6.1%3.2%3.6%Note that the THD is relatively low in each of these PWM switching schemes, andincreasing the switching frequency (increasing mf) decreases the harmonic currentsin this type of a load.8.15THREE-PHASE INVERTERSThe Six-Step InverterFigure 8-28ashows a circuit that produces a three-phase ac output from a dcinput. Amajor application of this circuit is speed control of induction motors,where the output frequency is varied. The switches are closed and opened in thesequence shown in Fig. 8-28b.Each switch has a duty ratio of 50 percent (not allowing for blanking time),and a switching action takes place every T/6 time interval, or 60angle interval.Note that switches S1and S4close and open opposite of each other, as do switchpairs (S2, S5) and (S3, S6). As with the single-phase inverter, these switch pairsmust coordinate so they are not closed at the same time, which would result in ashort circuit across the source. With this scheme, the instantaneous voltages vA0,vB0, and vC0are Vdcor zero, and line-to-line output voltages vAB, vBC, and vCAare Vdc, 0, or Vdc. The switching sequence in Fig. 8-28bproduces the outputvoltages shown in Fig. 8-28c.The three-phase load connected to this output voltage may be connected indelta or ungrounded neutral wye. For a wye-connected load, which is the morecommon load connection, the voltage across each phase of the load is a line-to-neutral voltage, shown in Fig. 8-28d. Because of the six steps in the output wave-forms for the line-to-neutral voltage resulting from the six switching transitionsper period, this circuit with this switching scheme is called a six-step inverter.The Fourier series for the output voltage has a fundamental frequency equalto the switching frequency. Harmonic frequencies are of order 6k1 for k1,2, . . . (n5, 7, 11, 13 . . .). The third harmonic and multiples of the third do nothar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 373
374CHAPTER 8InvertersVdc+ABC(a)(b)(c)OpenNS1S4S1S2S3S4S5S600vABvBC+Vdc–Vdc–Vdc+Vdc–VdcvCA+VdcS6S2S3S5iA–Closed0Figure 8-28(a)Three-phase inverter;(b) Switchingsequence for six-stepoutput; (c) Line-to-lineoutput voltages; (d) Line-to-neutralvoltages for anungrounded Y-connected load; (e) Current in phase Afor an RLload.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 374
8.15Three-Phase Inverters375exist, and even harmonics do not exist. For an input voltage of Vdc, the outputfor anungrounded wye-connected load has the following Fourier coefÞcients:(8-42)The THD of both the line-to-line and line-to-neutral voltages can be shown to be31 percent from Eq. (8-17). The THD of the currents in load-dependent 15 aresmaller for an RLload. An example of the line-to-neutral voltage and line currentfor an RLwye-connected load is shown in Fig. 8-28e.The output frequency can be controlled by changing the switching frequency.The magnitude of the output voltage depends on the value of the dc supply voltage.To control the output voltage of the six-step inverter, the dc input voltage mustbe adjusted.Vn, LN 22Vdc3n c2cosan3bcosan23bd2 n1, 5, 7, 11, 13, . . .Vn, LL 24Vdcn cosan6b2vAN230Vdc–13Vdc–13(d)(e)–Vdc–23–Vdc–vBNvCNvANiAFigure 8-28(continued) har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 375
376CHAPTER 8InvertersEXAMPLE 8-12Six-Step Three-Phase InverterFor the six-step three-phase inverter of Fig. 8-28a, the dc input is 100 Vand the funda-mental output frequency is 60 Hz. The load is wye-connected with each phase of the loada series RLconnection with R10 and L20 mH. Determine the total harmonic dis-tortion of the load current.■SolutionThe amplitude of load current at each frequency iswhere Vn,LNis determined from Eq. (8-42). Table 8-7summarizes the results of theFourier series computation.InVn, LNZnVn, LN2R2(n 0 L)2Vn, LN2102[n (260)(0.02)]2Table 8.7Fourier Components for the Six-Step Inverter ofExample 8-12nVn,L-N(V)Zn()In(A)In, rms(A)163.612.55.083.59512.7339.00.330.2379.0953.70.170.12115.7983.50.070.05134.9098.50.050.04The THD of the load current is computed from Eq. (8-17) asPWM Three-Phase InvertersPulse-width modulation can be used for three-phase inverters as well as forsingle-phase inverters. The advantages of PWM switching are the same as forthe single-phase case: reduced Þlter requirements for harmonic reduction and thecontrollability of the amplitude of the fundamental frequency.PWM switching for the three-phase inverter is similar to that of the single-phase inverter. Basically, each switch is controlled by comparing a sinusoidalreference wave with a triangular carrier wave. The fundamental frequency of theoutput is the same as that of the reference wave, and the amplitude of the outputis determined by the relative amplitudes of the reference and carrier waves.As in the case of the six-step three-phase inverter, switches in Fig. 8-28aarecontrolled in pairs (S1, S4), (S2, S5), and (S3, S6). When one switch in a pair is closed,the other is open. Each pair of switches requires a separate sinusoidal referenceTHD1Aaqn2I2n, rmsI1, rmsL2(0.23)2(0.12)2(0.05)2(0.04)23.590.077%har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 376
8.15Three-Phase Inverters377wave. The three reference sinusoids are 120apart to produce a balanced three-phase output. Figure 8-29ashows a triangular carrier and the three referencewaves. Switch controls are such thatS1is on when vavtriS2is on when vcvtriS3is on when vbvtriS4is on when vavtriS5is on when vcvtriS6is on when vbvtriHarmonics will be minimized if the carrier frequency is chosen to be an oddtriple multiple of the reference frequency, that is, 3, 9, 15, . . . times the reference.Figure 8-29bshows the line-to-line output voltages for a PWM three-phase inverter.Figure 8-29(a) Carrier and reference waves for PWM operation with mf9 and ma0.7 for thethree-phase inverter of Fig. 8-28a; (b) Output waveformsÑcurrent is for an RLload.vA, refVA0VB0VABVANiAvB, refvC, refvcarrier(a)(b)har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 377
378CHAPTER 8InvertersThe Fourier coefficients for the line-to-line voltages for the three-phase PWMswitching scheme are related to those of single-phase bipolar PWM (VninTable 8-3) by(8-43)where(8-44)SigniÞcant Fourier coefÞcients are listed in Table 8-8.Bn3 Vn cosan2bsinan3bAn3 Vn sinan2bsinan3bVn3 2A2n3B2n3Table 8-8Normalized Amplitudes Vn3/Vdcfor Line-to-Line Three-Phase PWM Voltagesma10.90.80.70.60.50.40.30.20.1n 10.8660.7790.6930.6060.5200.4330.3460.2600.1730.087mf 20.2750.2320.1900.1500.1140.0810.0530.0300.0130.0032mf 10.1570.2210.2720.3070.3210.3130.2820.2320.1650.086Multilevel Three-Phase InvertersEach of the multilevel inverters described in Sec. 8.9 can be expanded to three-phase applications. Figure 8-30shows a three-phase diode-clamped multilevelinverter circuit. This circuit can be operated to have a stepped-level output simi-lar to the six-step converter, or, as is most often the case, it can be operated tohave a pulse-width-modulated output.8.16PSPICE SIMULATION OFTHREE-PHASEINVERTERSSix-Step Three-Phase InvertersPSpice circuits that will simulate a six-step three-phase inverter are shown inFig. 8-31. The first circuit is for a complete switching scheme described inFig. 8-28. Voltage-controlled switches with feedback diodes are used for switch-ing. (The full version of PSpice is required for this circuit.) The second circuit isfor generating the appropriate output voltages for the converter so load currentscan be analyzed. The output nodes of the inverter are nodes A, B, and C. Theparameters shown are those in Example 8-12.PWM Three-Phase InvertersThe circuit in Fig. 8-32produces the voltages of the PWM three-phase inverterwithout showing the switching details. Dependent sources compare sine wavesto a triangular carrier wave, as in Example 8-8 for the single-phase case.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 378
8.17Induction Motor Speed Control3798.17INDUCTION MOTOR SPEED CONTROLThe speed of an induction motor can be controlled by adjusting the frequencyof the applied voltage. The synchronous speed sof an induction motor isrelated to the number of poles p and the applied electrical frequency by(8-45)Slips, is deÞned in terms of the rotor speed r(8-46)and torque is proportional to slip.If the applied electrical frequency is changed, the motor speed will changeproportionally. However, if the applied voltage is held constant when the fre-quency is lowered, the magnetic ßux in the air gap will increase to the point ofs srss 2pFigure 8-30Athree-phase diode-clamped multilevel inverter.Vdccbnahar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 379
380CHAPTER 8Inverterssaturation. It is desirable to keep the air-gap ßux constant and equal to its ratedvalue. This is accomplished by varying the applied voltage proportionally withfrequency. The ratio of applied voltage to applied frequency should be constant.(8-47)VfconstantFigure 8-31(a) Asix-step inverter using switches and diodes (requires the full PSpiceversion); (b) APSpice circuit for generating three-phase six-step converter voltages.(a)(b)V1 = 0V2 = {Vdc}TD = 0TR = 1nTF = 1nPW = {1/(2*freq–2n)}PER = {1/(freq)}V1 = 0V2 = {Vdc}TD = {1/(3*freq)}TR = 1nTF = 1nPW = {1/(2*freq–2n)}PER = {1/(freq)}V1 = 0V2 = {Vdc}TD = {2/(3*freq)}TR = 1nTF = 1nPW = {1/(2*freq–2n)}PER = {1/(freq)}VAVBSIX-STEP INVERTER EQUIVALENT+–+–+–VCRALA121212N{R}{L}RBLB{R}{L}RCLC{R}{L}CBAPARAMETERS:Vdc = 100freq = 60R = 10L = 20m+S1D1ABCRALA{R}{L}RBLB{R}{L}RCLC{R}{L}222111N0–+–+S4D400V14V1 = –1V2 = 1TD = 0TR = 1nTF = 1nPW = {1/(2*f)}PER = {1/f}V1 = –1V2 = 1TD = {1/(3*f)}TR = 1nTF = 1nPW = {1/(2*f)}PER = {1/f}V1 = –1V2 = 1TD = {1/(6*f)}TR = 1nTF = 1nPW = {1/(2*f)}PER = {1/f}V36–+–+–+S3D30–+–+S5THREE–PHASE SIX-STEP INVERTERD5PARAMETERS:f = 60R = 10L = 20m0–+–+–00+–V25Set ITL4 = 1000+–+S6D60–+–+S2D20–+–100V1har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 380
8.17Induction Motor Speed Control381The term volts/hertzcontrolis often used for this situation. The induction motortorque-speed curves of Fig. 8-33are for different frequencies and constantvolts/hertz.The six-step inverter can be used for this application if the dc input isadjustable. In the conÞguration of Fig. 8-34, an adjustable dc voltage is producedfrom a controlled rectiÞer, and an inverter produces an ac voltage at the desiredFigure 8-32APSpice functional circuit for generating three-phase PWM voltages.VAV1 = 1V2 = Ð1TD = 0TR = {1/(2*fc)}TF = {1/(2*fc)}PW = 1nPER = {1/fc)}VOFF = 0VAMPL = {ma}FREQ = {f}PHASE = {Ð90/mf}VOFF = 0VAMPL = {ma}FREQ = {f}PHASE = {Ð90/mfÐ120}VOFF = 0VAMPL = {ma}FREQ = {f}PHASE = {Ð90/mfÐ240}IN+ OUT+INÐ OUTÐPARAMETERS:f = 60fc = {f*mf}ma = 0.7mf = 9Vdc = 100Vdc/2*V(%IN+, %INÐ)/(abs(V(%IN+, %INÐ))+1n)+1THREE-PHASE PWM INVERTER0EVALUEIN+ OUT+INÐ OUTÐEVALUECBARCRBRA10101011122N2LCLBLA20m20m20mtriVBtriVtri+Ð+Ð+Ð0IN+ OUT+INÐ OUTÐEVALUEtriVC+Ð0Figure 8-33Induction motor torque-speed curvesfor constant volts/hertz variable-speed control.TorqueSpeedf4f3f2f1har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 381
382CHAPTER 8Invertersfrequency. If the dc source is not controllable, a dc-dc converter may be insertedbetween the dc source and the inverter.The PWM inverter is useful in a constant volts/hertz application because theamplitude of the output voltage can be adjusted by changing the amplitude mod-ulation ratio ma. The dc input to the inverter can come from an uncontrolledsource in this case. The conÞguration in Fig. 8-34is classiÞed as an ac-ac con-verter with a dc link between the two ac voltages.8.18Summary¥The full- or half-bridge converters can be used to synthesize an ac output from a dcinput.¥Asimple switching scheme produces a square wave voltage output, which has aFourier series that contains the odd harmonic frequencies of amplitudes¥Amplitude and harmonic control can be implemented by allowing a zero-voltageinterval of angle at each end of a pulse, resulting in Fourier coefÞcients¥Multilevel inverters use more than one dc voltage source or split a single voltagesource with a capacitor voltage divider to produce multiple voltage levels on theoutput of an inverter.¥Pulse-width modulation (PWM) provides amplitude control of the fundamentaloutput frequency. Although the harmonics have large amplitudes, they occur athigh frequencies and are Þltered easily.¥Class D audio ampliÞers use PWM techniques for high efÞciency.¥The six-step inverter is the basic switching scheme for producing a three-phase acoutput from a dc source.¥APWM switching scheme can be used with a three-phase inverter to reduce theTHD of the load current with modest Þltering.¥Speed control of induction motors is a primary application of three-phase inverters.Vna4Vdcnb cos(n)Vn4VdcnFigure 8-34AC-AC converter with a dc link.MotorRectifieracSourcedc LinkVdc+–Inverterhar80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 382
Problems3838.19BibliographyJ. Almazan, N. Vazquez, C. Hernandez, J. Alvarez, and J. Arau, ÒComparison betweenthe Buck, Boost and Buck-Boost Inverters,Ó International Power ElectronicsCongress, Acapulco, Mexico, October 2000, pp. 341Ð346.B. K. Bose, Power Electronics and Motor Drives: Advances and Trends, Elsevier/Academic Press, 2006.J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, and D. Zhong, ÒAUniÞed Approach toSolving the Harmonic Elimination Equations in Multilevel Converters,Ó IEEETransactions on Power Electronics, March 2004, pp. 478Ð490.K. A. Corzine, ÒTopology and Control of Cascaded Multi-Level Converters,Ó Ph.D.dissertation, University of Missouri, Rolla, 1997.T. Kato, ÒPrecise PWM Waveform Analysis of Inverter for Selected HarmonicElimination,Ó 1986 IEEE/IAS Annual Meeting, pp. 611Ð616.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters,Applications, and Design,3d ed., Wiley, New York, 2003.L. G. Franquelo, ÒMultilevel Converters: Current Developments and Future Trends,ÓIEEE International Conference on Industrial Technology, Chengdu, China, 2008.J. R. Hauser, Numerical Methods for Nonlinear Engineering Models,SpringerNetherlands, Dordrecht, 2009.J. Holtz, ÒPulsewidth ModulationÑASurvey,Ó IEEE Transactions on IndustrialElectronics,vol. 39, no. 5, Dec. 1992, pp. 410Ð420.S. Miaosen, F. Z. Peng, and L. M. Tolbert, ÒMulti-level DC/DC Power ConversionSystem with Multiple DC Sources,Ó IEEE 38thAnnual Power ElectronicsSpecialists Conference, Orlando, Fla., 2007.L. M. Tolbert, and F. Z. Peng, ÒMultilevel Converters for Large Electric Drives,ÓApplied Power Electronics Conference and Exposition, anaheim, Calif., 1998.M. H. Rashid, Power Electronics: Circuits, Devices, and Systems,3d ed., Prentice-Hall,Upper Saddle River, N.J., 2004.L. Salazar and G. Joos, ÒPSpice Simulation of Three-Phase Inverters by Means ofSwitching Functions,Ó IEEE Transactions on Power Electronics, vol. 9, no. 1, Jan. 1994, pp. 35Ð42.B. Wu, High-Power Converters and AC Drives, Wiley, New York, 2006.X. Yuan, and I. Barbi, ÒFundamentals of a New Diode Clamping Multilevel Inverter,ÓIEEE Transactions on Power Electronics, vol. 15, no. 4, July 2000, pp. 711Ð718.ProblemsSquare-Wave Inverter8-1.The square-wave inverter of Fig. 8-1ahas Vdc125 V, an output frequency of60 Hz, and a resistive load of 12.5 . Sketch the currents in the load, eachswitch, and the source, and determine the average and rms values of each.8-2.Asquare-wave inverter has a dc source of 96 Vand an output frequency of 60 Hz.The load is a series RLload with R5 and L100 mH. When the load isfirst energized, a transient precedes the steady-state waveform described har80679_ch08_331-386.qxd 12/17/09 2:56 PM Page 383
384CHAPTER 8InvertersbyEq. (8-5). (a) Determine the peak value of the steady-state current. (b) UsingEq. (8-1) and assuming zero initial inductor current, determine the maximumcurrent that occurs during the transient. (c) Simulate the circuit with the PSpiceinput Þle of Fig. 8.4a and compare the results with parts (a) and (b). How manyperiods must elapse before the current reaches steady state? How many L/Rtimeconstants elapse before steady state?8-3.The square-wave inverter of Fig. 8-3has a dc input of 150 Vand supplies a seriesRLload with R20 and L40 mH. (a) Determine an expression for steady-state load current. (b) Sketch the load current and indicate the time intervalswhen each switch component (Q1, D1; . . . Q4, D4) is conducting. (c) Determinethe peak current in each switch component. (d) What is the maximum voltageacross each switch? Assume ideal components.8-4.Asquare-wave inverter has a dc source of 125 V, an output frequency of 60 Hz,and an RLseries load with R20 and L25 mH. Determine (a) anexpression for load current, (b) rms load current, and (c) average source current.8-5.Asquare-wave inverter has an RLload with R15 and L10 mH. Theinverter output frequency is 400 Hz. (a) Determine the value of the dc sourcerequired to establish a load current that has a fundamental frequency componentof 8 Arms. (b) Determine the THD of the load current.8-6.Asquare-wave inverter supplies an RLseries load with R25 and L25 mH.The output frequency is 120 Hz. (a) Specify the dc source voltage such that theload current at the fundamental frequency is 2.0 Arms. (b) Verify your resultswith PSpice. Determine the THD from PSpice.8-7.Asquare-wave inverter has a dc input of 100 V, an output frequency of 60 Hz,and a series RLCcombination with R10 , L25 mH, and C100 F. Usethe PSpice simpliÞed square-wave inverter circuit of Fig. 8-4ato determine thepeak and rms value of the steady-state current. Determine the total harmonicdistortion of the load current. On a printout of one period of the current, indicatethe intervals where each switch component in the inverter circuit of Fig. 8-3isconducting for this load if that circuit were used to implement the converter.Amplitude and Harmonic Control8-8.For the full-bridge inverter, the dc source is 125 V, the load is a series RLconnection with R10 and L20 mH, and the switching frequency is 60 Hz.(a) Use the switching scheme of Fig. 8-5and determine the value of to producean output with an amplitude of 90 Vat the fundamental frequency. (b) Determinethe THD of the load current.8-9.An inverter that produces the type of output shown in Fig. 8-5ais used to supplyan RLseries load with R10 and L35 mH. The dc input voltage is 200 Vand the output frequency is 60 Hz. (a) Determine the rms value of thefundamental frequency of the load current when 0. (b) If the outputfundamental frequency is lowered to 30 Hz, determine the value of required tokeep the rms current at the fundamental frequency at the same value of part (a).8-10.Use the PSpice circuit of Fig. 8-7ato verify that (a) the waveform of Fig. 8-5awith 30contains no third harmonic frequency and (b) the waveform ofFig. 8-5awith 18contains no Þfth harmonic.8-11.(a) Determine the value of that will eliminate the seventh harmonic from theinverter output of Fig. 8-5a. (b) Verify your answer with a PSpice simulation.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 384
Problems3858-12.Determine the rms value of the notched waveform to eliminate the third and Þfthharmonics in Fig. 8-6.8-13.Use PSpice to verify that the notched waveform of Fig. 8-6ccontains no third orÞfth harmonic. What are the magnitudes of the fundamental frequency and theÞrst four nonzero harmonics? (The piecewise linear type of source may be useful.)Multilevel Inverters8-14.For a multilevel inverter having three separate dc sources of 48 Veach, 115,225, and 355. (a) Sketch the output voltage waveform. (b) Determinethe Fourier coefÞcients through n9. (c) Determine the modulation index Mi.8-15.For a three-source multilevel inverter, select values of 1, 2, and 3such that thethird harmonic frequency (n3) in the output voltage waveform is eliminated.Determine the modulation index Mifor your selection.8-16.The Þve-source multilevel inverter of Fig. 8-11has 1 16.73, 226.64,346.00, 460.69, and 562.69. Determine which harmonics will beeliminated from the output voltage. Determine the amplitude of the fundamental-frequency output voltage.8-17.The concept of the two-source multilevel inverters of Figs. 8-9 and 8-11 isextended to have three independent sources and H bridges and three delay angles1, 2, and 3. Sketch the voltages at the output of each bridge of a three-sourcemultilevel converter such that the average power from each source is the same.Pulse-Width-Modulated Inverters8-18.The dc source supplying an inverter with a bipolar PWM output is 96 V. The loadis an RLseries combination with R32 and L24 mH. The output has afundamental frequency of 60 Hz. (a) Specify the amplitude modulation ratio toprovide a 54-Vrms fundamental frequency output. (b) If the frequencymodulation ratio is 17, determine the total harmonic distortion of the load current.8-19.The dc source supplying an inverter with a bipolar PWM output is 250 V. Theload is an RLseries combination with R20 and L50 mH. The output hasa fundamental frequency of 60 Hz. (a) Specify the amplitude modulation ratio toprovide a 160-Vrms fundamental frequency output. (b) If the frequencymodulation ratio is 31, determine the total harmonic distortion of the load current.8-20.Use PSpice to verify that the design in Example 8-9 meets the THDspeciÞcations.8-21.Design an inverter that has a PWM output across an RLseries load with R10 and L20 mH. The fundamental frequency of the output voltage must be 120 Vrms at 60 Hz, and the total harmonic distortion of the load current must be lessthan 8 percent. Specify the dc input voltage, the amplitude modulation ratio ma,and the switching frequency (carrier frequency). Verify the validity of yourdesign with a PSpice simulation.8-22.Design an inverter that has a PWM output across an RLseries load with R30 and L25 mH. The fundamental frequency of the output voltage must be 100 Vrms at 60 Hz, and the total harmonic distortion of the load current must be lessthan 10 percent. Specify the dc input voltage, the amplitude modulation ratio ma,and the switching frequency (carrier frequency). Verify the validity of yourdesign with a PSpice simulation.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 385
386CHAPTER 8Inverters8-23.Pulse-width modulation is used to provide a 60-Hz voltage across a series RLload with R12 and L20 mH. The dc supply voltage is 150 V. Theamplitude of the 60-Hz voltage is to be 120 V. Use PSpice to obtain the currentwaveform in the load and the THD of the current waveform in the load. Use(a) bipolar PWM with mf21, (b) bipolar PWM with mf41, and (c) unipolarPWM with mf10.Three-Phase Inverters8-24.Asix-step three-phase inverter has a 250-Vdc source and an output frequencyof 60 Hz. Abalanced Y-connected load consists of a series 25-resistance and20-mH inductance in each phase. Determine (a) the rms value of the 60-Hzcomponent of load current and (b) the THD of the load current.8-25.Asix-step three-phase inverter has a 400-Vdc source and an output frequencythat varies from 25 to 100 Hz. The load is a Yconnection with a series 10-resistance and 30-mH inductance in each phase. (a) Determine the range of therms value of the fundamental-frequency component of load current as thefrequency is varied. (b) What is the effect of varying frequency on the THD ofthe load current and the THD of the line-to-neutral voltage?8-26.Asix-step three-phase inverter has an adjustable dc input. The load is a balancedYconnection with a series RLcombination in each phase, with R5 and L50 mH. The output frequency is to be varied between 30 and 60 Hz. (a) Determine the range of the dc input voltage required to maintain thefundamental-frequency component of current at 10 Arms. (b) Use PSpice todetermine the THD of load current in each case. Determine the peak current andrms load current for each case.har80679_ch08_331-386.qxd 12/16/09 2:55 PM Page 386
CHAPTER9387Resonant Converters9.1INTRODUCTIONImperfect switching is a major contributor to power loss in converters, as dis-cussed in Chap. 6. Switching devices absorb power when they turn on or off ifthey go through a transition when both voltage and current are nonzero. As theswitching frequency increases, these transitions occur more often and the aver-age power loss in the device increases. High switching frequencies are otherwisedesirable because of the reduced size of Þlter components and transformers,which reduces the size and weight of the converter.In resonant switching circuits, switching takes place when voltage and/orcurrent is zero, thus avoiding simultaneous transitions of voltage and currentand thereby eliminating switching losses. This type of switching is called softswitching, as opposed to hardswitching in circuits such as the buck converter.Resonant converters include resonant switch converters, load resonant convert-ers, and resonant dc link converters. This chapter introduces the basic conceptof the resonant converter and gives a few examples.9.2ARESONANTSWITCH CONVERTER: ZERO-CURRENTSWITCHINGBasic OperationOne method for taking advantage of the oscillations caused by an LCcircuit forreducing the switching losses in a dc-dc converter is shown in the circuit ofFig. 9-1a. This circuit is similar to the buck converter described in Chap. 6. Thecurrent in the output inductor Lois assumed to be ripple-free and equal to the loadhar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 387
388CHAPTER 9Resonant Converters(a)(b)iLiLiCIoIoidididCrLrLoIoCoRLvC+−iCvC+−VsvL = Vs++−−Vs+−Vo+−(c)iLIoVs+−iC = −IovC+−(d)IoVs+−(e)IoVs+−current Io. When the switch is open, the diode is forward-biased to carry the out-put inductor current, and the voltage across Cris zero. When the switch closes,the diode initially remains forward-biased to carry Io, and the voltage across Lristhe same as the source voltage Vs(Fig. 9-1b). The current in Lrincreases linearly,and the diode remains forward-biased while iLis less than Io. When iLreaches Io,the diode turns off, and the equivalent circuit is that of Fig. 9-1c. If Iois a con-stant, the load appears as a current source, and the underdamped LCcircuit oscil-lates. Consequently, iLreturns to zero and remains there, assuming the switch isunidirectional. The switch is turned off after the current reaches zero, resulting inzero-current switching and no switching power loss.Figure 9-1(a) Aresonant converter with zero-current switching; (b) Switch closed and diodeon (0 tt1); (c) Switch closed and diode off (t1tt2); (d) Switch open and diode off (t2tt3); (e) Switch open and diode on (t3tT); (f) Waveforms; (g) Normalizedoutput vs. switching frequency with rRL/Z0as a parameter. ©1992 IEEE, B.K. Bose,Modern Power Electronics: Evolution, Technology, and Applications. Reprinted withpermission.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 388
9.2A Resonant Switch Converter: Zero-Current Switching389After the current in the switch reaches zero, the positive capacitor voltagekeeps the diode reverse-biased, so load current Ioßows through Cr, with ic= Io(Fig. 9-1d). If Iois constant, the capacitor voltage decreases linearly. When thecapacitor voltage reaches zero, the diode becomes forward-biased to carry Io(Fig. 9-1e). The circuit is then back at the starting point. The analysis for eachtime interval is given next.iLt1t2t3TIo00vCTt3Open(f)(g)10.01.000.800.600.400.200.000.600.801.000.400.20Vo/Vsfs/f05.02.01.0SwitchClosedt2t1r = 0.5Figure 9-1(continued)har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 389
390CHAPTER 9Resonant ConvertersAnalysis for0 £t£t1The switch is closed at t0, the diode is on, and thevoltage across Lris Vs(Fig. 9-1b). The current in Lris initially zero and isexpressed as(9-1)At tt1, iLreaches Io, and the diode turns off. Solving for t1,(9-2)or(9-3)Capacitor voltage is zero in this interval.Analysis fort1£t£t2(Fig. 9-1c) When the diode turns off at tt1, the cir-cuit is equivalent to that in Fig. 9-1c. In the circuit of Fig. 9-1c, these equationsapply:(9-4)(9-5)Differentiating Eq. (9-4) and using the voltage-current relationship for the capacitor,(9-6)Substituting for iCusing Eq. (9-5),(9-7)or(9-8)The solution to the preceding equation with the initial condition iL(t1) Iois(9-9)where Z0is the characteristic impedance(9-10)Z0ALrCriL(t)IoVsZo sin 0(tt1)d2iL(t)dt2iL(t)LrCrIoLrCrLrd 2iL(t)dt2IoiL(t)CrdvC (t)dtLr d2iL(t)dt2iC (t)CriC (t)iL(t)IovC (t)VsLrdiL(t)dtt1Io LrVsiL(t1)IoVsLr t1iL(t)1Lr 3t0Vs dlVsLr thar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 390
9.2A Resonant Switch Converter: Zero-Current Switching391and 0is the frequency of oscillation(9-11)Equation (9-9) is valid until iLreaches zero at tt2. Solving for the time inter-val t2t1when the oscillation occurs,(9-12)which can be expressed as(9-13)Solving for capacitor voltage by substituting iLfrom Eq. (9-9) into Eq. (9-4) gives(9-14)which is also valid until tt2. Maximum capacitor voltage is therefore 2Vs.Analysis fort2£t£t3After the inductor current reaches zero at t2, switch cur-rent is zero and it can be opened without power loss. The equivalent circuit isshown in Fig. 9-1d. The diode is off because vC0. Capacitor current is Io,resulting in a linearly decreasing capacitor voltage expressed as(9-15)Equation (9-15) is valid until the capacitor voltage reaches zero and the diode turnson. Letting the time at which the capacitor voltage reaches zero be t3, Eq. (9-15)gives an expression for the time interval t3t2:(9-16)where vC(t2) is obtained from Eq. (9-14).Analysis fort3£t£TIn this time interval, iLis zero, the switch is open, thediode is on to carry Io, and vC0 (Fig. 9-1e). The duration of this interval is thedifference between the switching period Tand the other time intervals, which aredetermined from other circuit parameters.t3t2CrvC (t2)IoCrVs{1 cos[0(t2t1)]}IovC (t)1Cr3tt2Io dlvC (t2)IoCr (t2t)vC (t2)vC (t)Vs{1 cos[0(tt1)]}t2t110csin1aIo Z0Vsbdt2t110sin1aIo Z0Vsb012LrCrhar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 391
392CHAPTER 9Resonant ConvertersOutput VoltageOutput voltage can be determined from energy balance. Energy supplied by thesource is equal to energy absorbed by the load during a switching period. Energysupplied by the source in one period is(9-17)Energy absorbed by the load is(9-18)where fsis the switching frequency. From Eqs. (9-1) and (9-9),(9-19)Using WsWoand solving for Vousing Eqs. (9-17) to (9-19),(9-20)Using Eq. (9-16), output voltage can be expressed in terms of the time intervalsfor each circuit condition:(9-21)where the time intervals are determined from Eqs. (9-3), (9-13), and (9-16).Equation (9-21) shows that the output voltage is a function of the switchingfrequency. Increasing fsincreases Vo. The switching period must be greater than t3,and output voltage is less than input voltage, as is the case for the buck converterof Chap. 6. Note that the time intervals are a function of output current Io, so out-put voltage for this circuit is load-dependent. When the load is changed, theswitching frequency must be adjusted to maintain a constant output voltage.Figure 9-1gshows the relationship between output voltage and switching fre-quency. The quantity rRL/Z0is used as a parameter where RLis the load resis-tance and Z0is deÞned in Eq. (9-10).Adiode placed in antiparallel with the switch in Fig. 9-1acreates a resonantswitch converter which includes negative inductor current. For that circuit,Vo/Vsis nearly a linear function of switching frequency independent of load(that is, Vo/Vsfs/f0).VoVs fsct12(t2t1)(t3t2)dVoVs fsat12(t2t1)VsCrIo{1 cos[0(t2t1)]}b3T0iL(t) dt3t10Vs tLr dt3t2t1bIoVsZ0 sin[0(tt1)]r dtWo3T0po(t) dtVo IoTVo Io fsWs3T0ps(t) d(t)Vs3T0iL(t) dthar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 392
9.2A Resonant Switch Converter: Zero-Current Switching393The resonant switch converter with zero-current switching has theoreticallyzero switching losses. However, junction capacitance in switching devices storesenergy which is dissipated in the device, resulting in small losses.Note that output voltage is the average of the capacitor voltage vc, yieldingan alternate method of deriving Eq. (9-21).Resonant Switch DC-DCConverter: Zero-Current SwitchingIn the circuit of Fig. 9-1a,Vs12 VCr0.1 FLr10 HIo1 Afs100 kHz(a) Determine the output voltage of the converter. (b) Determine the peak current in Lrand the peak voltage across Cr. (c) What is the required switching frequency to produce an output voltage of 6 Vfor the same load current? (d) Determine themaximum switching frequency. (e) If the load resistance is changed to 20 ,determine the switching frequency required to produce an output voltage of 8 V.■Solution(a)Using the given circuit parameters,Output voltage is determined from Eq. (9-21). The time t1is determined from Eq. (9-3):From Eq. (9-13),From Eq. (9-16),(0.1)(10)6 (12)1{1 cos[106 (4.13)(10)6]}1.86 st3t2CrVsIo{1cos[0(t2t1)]}t2t110csin1aIo Z0Vsbd1106csin1 (1)(10)12d4.13 st1Io LrVs(1)(10)(10)6120.833 sZ0ALrCrA10(10)60.1(10)610 Æ012LrCr1210(10)6(0.1)(10)6106 rad/sEXAMPLE 9-1har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 393
394CHAPTER 9Resonant ConvertersOutput voltage from Eq. (9-21) is then(12)(100)(105) a0.83324.131.86b(106)7.69 VVoVs fsct12(t2t1)(t3t2)d(b)Peak current in Lris determined from Eq. (9-9).IL,peakIoVsZ0112102.2 APeak voltage across Cris determined from Eq. (9-14):(c)Since output voltage is proportional to frequency [Eq. (9-21)] if Ioremainsunchanged, the required switching frequency for a 6-Voutput isfs100 kHza6 V7.69 Vb78 kHzVC,peak2Vs2(12)24 V(d)Maximum switching frequency for this circuit occurs when the interval Tt3iszero.Time t3t1(t2t1) (t3t2) (0.833 4.13 1.86) s 6.82 s,resulting in(e)The graph of Fig. 9-1gcan be used to estimate the required switching frequency toobtain an output of 8 Vwith the load at 20 . With Vo/Vs8/12 0.67, the curvefor the parameter rRL/Z020/10 2 gives fs/f00.45. The switchingfrequency is fs0.45f00.45(0/2) 0.45(10)6/271.7 kHz. The methodused in part (a) of this problem can be used to verify the results. Note that Iois nowVo/RL8/20 0.4 A.Lfs,max1Tmin1t31(6.82)(106)146 kHz9.3ARESONANTSWITCH CONVERTER: ZERO-VOLTAGE SWITCHINGBasic OperationThe circuit of Fig. 9-2ashows a method for using the oscillations of an LCcir-cuit for switching at zero voltage. The analysis assumes that the output Þlter pro-duces a ripple-free current Ioin Lo. Beginning with the switch closed, the currentin the switch and in Lris Io, the currents in D1and Dsare zero, and the voltageacross Crand the switch is zero.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 394
9.3A Resonant Switch Converter: Zero-Voltage Switching395The switch is opened (with zero voltage across it), and iLIoßows throughthe capacitor Cr, causing vCto increase linearly (Fig. 9-2b). When vCreaches thesource voltage Vs, the diode D1becomes forward-biased, in effect forming a seriescircuit with Vs, Cr, and Lras shown in Fig. 9-2c. At this time, iLand vCin thisunderdamped series circuit begin to oscillate.When vCreturns to zero, diode Dsturns on to carry iL, which is negative(Fig. 9-2d). The voltage across Lris Vs, causing iLto increase linearly. Theswitch should be closed just after Dsturns on for zero-voltage turn-on. When iLbecomes positive, Dsturns off and iLis carried by the switch. When iLreachesIo, D1turns off, and circuit conditions are back at the starting point. The analysisfor each circuit condition is given next.Figure 9-2(a) Aresonant converter with zero-voltage switching; (b) Switch open and D1off(0 < t< t1); (c) Switch open and D1on (t1< t< t2). (d) Switch closed and D1on (t2< t< t3);(e) Switch closed and D1off (t3< t< T); (f) Waveforms (g) Normalized output vs.switching frequency with rRL/Z0as a parameter. ©1992 IEEE, B.K. Bose, Modern PowerElectronics: Evolution, Technology, and Applications. Reprinted with permission.(a)iLiLIoLrSDsD1CrLoIoCoRL-VsvCvx+++--vCvx++--Vo+-(b)IoCrLrVs+-vCvx = 0++--(c)IoIoCrLrVs+-iLiL = IovL = Vs vx = 0+-(d)IoLrVs+-vL = 0 vx = Vs+-(e)LrVs+-har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 395 396CHAPTER 9Resonant ConvertersClosedOpenSwitcht1t1VsvxiLVsVs + IoZ0vCIot1t2t2t3t3(f)(g)TTt2t3T0001.000.800.600.400.200.00Vo/Vs0.000.600.801.000.400.20fs/fo0.900.800.500.20r = 0.10Figure 9-2(continued)har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 396 9.3A Resonant Switch Converter: Zero-Voltage Switching397Analysis for0 £t£t1The switch is opened at t0. The capacitor current isthen Io(Fig. 9-2b), causing the capacitor voltage, initially zero, to increase lin-early. The voltage across Cris(9-22)The voltage across Lris zero because inductor current is Io, which is assumed tobe constant. The voltage at the Þlter input vxis(9-23)which is a linearly decreasing function beginning at Vs. At tt1, vx0 and thediode turns on. Solving the preceding equation for t1,(9-24)Equation (9-23) can then be expressed as(9-25)Analysis fort1£t£t2Diode D1is forward-biased and has 0 Vacross it, and theequivalent circuit is shown in Fig. 9-2c. KirchhoffÕs voltage law is expressed as(9-26)Differentiating,(9-27)Capacitor current is related to voltage by(9-28)Since inductor and capacitor currents are the same in this time interval, Eq. (9-27)can be expressed as(9-29)d2iL(t)dt2iL(t)LrCr0dvC (t)dtiC (t)CrLrd2iL(t)dt2dvC (t)dt0LrdiL(t)dtvC (t)Vsvx(t)Vsa1tt1bt1Vs CrIovx (t)VsvC (t)VsIoCr tvC (t)1Cr3t0Io dlIoCr thar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 397 398CHAPTER 9Resonant ConvertersSolving the preceding equation for iLby using the initial condition iL(t1) Io,(9-30)where(9-31)Capacitor voltage is expressed aswhich simpliÞes to(9-32)where(9-33)Note that the peak capacitor voltage is(9-34)which is also the maximum reverse voltage across diode Dsand is larger than thesource voltage.With diode D1forward-biased,vx0(9-35)The diode Dsacross Crprevents vCfrom going negative, so Eq. (9-32) is valid forvC0. Solving Eq. (9-32) for the time tt2when vCreturns to zero,which can be expressed as(9-36)At tt2, diode Dsturns on.t210c sin1aVsIoZ0bdt1t210c sin1aVsIoZ0bdt1VC,peakVsIo Z0VsIo ALrCrZ0ALrCrvC (t)VsIo Z0 sin[0(tt1)]vC (t)1Cr3tt1iC (l) dlvC (t1)1Cr3tt1Io cos[0(lt1)] dlVs012LrCriL(t)Io cos[0(tt1)]har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 398 9.3A Resonant Switch Converter: Zero-Voltage Switching399Analysis fort2£t£t3(Fig. 9-2d) After t2, both diodes are forward-biased(Fig. 9-2d), the voltage across Lris Vs, and iLincreases linearly until it reachesIoat t3. The switch is reclosed just after t2whenvC0 (zero-voltage turn-on)and the diode is on to carry a negative iL. The current iLin the interval from t2tot3is expressed as(9-37)where iL(t2) is from Eq. (9-30). Current at t3is Io:(9-38)Solving for t3,(9-39)Voltage vxis zero in this interval:vx0(9-40)At tt3, diode D1turns on.Analysis fort3£t£TIn this interval, the switch is closed, both diodes are off,the current in the switch is Io, andvxVs(9-41)The circuit remains in this condition until the switch is reopened. The time inter-val Tt3is determined by the switching frequency of the circuit. All other timeintervals are determined by other circuit parameters.Output VoltageThe voltage vx(t) at the input of the output Þlter is shown in Fig. 9-2f. Summariz-ing Eqs. (9-25), (9-35), (9-40), and (9-41),(9-42)vx(t)dVsa1tt1b 0 < t < t10t1 < t < t3Vst3 < t < Tt3aLr IoVsb{1 cos[0(t2t1)]}t2iL(t3)IoVsLr (t3t2)Io cos[0(t2t1)]iL(t)1Lr3tt2Vs dliL(t2)VsLr (tt2)Io cos[0(t2t1)]har80679_ch09_387-430.qxd 12/17/09 2:57 PM Page 399 400CHAPTER 9Resonant ConvertersThe output voltage is the average of vx(t). Output voltage is(9-43)Using fs1/T,(9-44)Times t1, and t3in the preceding equation are determined from the circuit para-meters as described by Eqs. (9-24), (9-36), and (9-39). The output voltage iscontrolled by changing the switching frequency. The time interval when theswitch is open is Þxed, and the time interval when the switch is closed is varied.Times t1and t3are determined in part by the load current Io, so output voltage isa function of load. Increasing the switching frequency decreases the time inter-val Tt3and thus reduces the output voltage. Normalized output voltage vs.switching frequency with the parameter rRL/Z0is shown in the graph inFig. 9-2g. Output voltage is less than input voltage, as was the case for the buckconverter in Chap. 6.Resonant Switch Converter: Zero-Voltage SwitchingIn the circuit of Fig. 9-2a,Vs20 VLr1 HCr0.047 FIo5 A(a)Determine the switching frequency such that the output voltage is 10 V. (b) Determine the peak voltage across Dswhen it is reverse-biased.■ Solution(a)From the circuit parameters,Z0ALrCrA1060.047(106)4.61 Æ012(10)6(0.047)(10)64.61(106) rad/sVoVs c1fsat3t12bdVsT ct12(Tt3)dVo1T3T0vx dt1T C3t10Vsa1tt1b dt3Tt3Vs dtSEXAMPLE 9-2har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 400 9.4The Series Resonant Inverter401Using Eq. (9-24) to solve for t1,From Eq. (9-36),From Eq. (9-39),Equation (9-44) is used to determine the proper switching frequency,(b)Peak reverse voltage across Dsis the same as peak capacitor voltage. FromEq. (9-25),9.4THE SERIES RESONANTINVERTERThe series resonant inverter (dc-to-ac converter) of Fig. 9-3ais one applicationof resonant converters. In a series resonant inverter, an inductor and a capacitorare placed in series with a load resistor. The switches produce a square wave volt-age, and the inductor-capacitor combination is selected such that the resonantfrequency is the same as the switching frequency.VDs,peakVC,peakVoIo ALrCr20(5)(4.61)33 VVoVs c1fsat3t12bd1020c1fsa1.470.1882b(106)d fs363 kHza106(5)20b{1 cos[(4.61)(106)(1.100.188)(106)]}1.10 s1.47 st3aLr IoVsb{1cos[0 (t2t1)]}t214.61(106)c sin120(5)(4.61)d0.188 s1.10 st210 c sin1aVsIo2Lr /Crbdt1t1VsCrIo(20)(0.047)(106)50.188 shar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 401 402CHAPTER 9Resonant ConvertersVdc(a)(c)wsfsf0w01.0Normalized Output for Resonant Inverter0.80.20.00.41.21.62.0Q = 2Q = 3Q = 10Q = 10.80.6VoVi0.4vivoLC+++-VijwLjwC1++--(b)--Vo=Figure 9-3(a) Aseries resonant inverter; (b) Phasor equivalent of a series RLCCircuit; (c) Normalized frequency response.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 402 9.4The Series Resonant Inverter403The analysis begins by considering the frequency response of the RLCcir-cuit of Fig. 9-3b. The input and output voltage amplitudes are related by(9-45)Resonance is at the frequency(9-46)or(9-47)At resonance, the impedances of the inductance and capacitance cancel, andthe load appears as a resistance. If the bridge output is a square wave at fre-quency f0, the LCcombination acts as a Þlter, passing the fundamental frequencyand attenuating the harmonics. If the third and higher harmonics of the squarewave bridge output are effectively removed, the voltage across the load resistoris essentially a sinusoid at the square waveÕs fundamental frequency.The amplitude of the fundamental frequency of a square wave voltage ofVdcis(9-48)The frequency response of the Þlter could be expressed in terms of bandwidth,which is also characterized by the quality factor Q.(9-49)Equation (9-45) can be expressed in terms of 0and Q:(9-50)The normalized frequency response with Qas a parameter is shown in Fig. 9-3c.The total harmonic distortion (THD, as deÞned in Chap. 2) of the voltage acrossthe load resistor is reduced by increasing the Qof the Þlter. Increasing induc-tance and reducing capacitance increase Q.Switching LossesAn important feature of the resonant inverter is that switch losses are reducedover that of the inverters discussed in Chap. 8. If switching is at the resonantfrequency and the Qof the circuit is high, the switches operate when the loadVoVi121Q2((>0)(0>))2Q0 LR10RCV14Vdcf0122LC012LCVoViR2R2(L(1>C))2121((L>R)(1>RC))2har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 403
404CHAPTER 9Resonant Converterscurrent is at or near zero. This is signiÞcant because the power absorbed by theswitches is less than in the nonresonant inverter.Amplitude ControlIf the frequency of the load voltage is not critical, the amplitude of the funda-mental frequency across the load resistor can be controlled by shifting theswitching frequency off of resonance. Power absorbed by the load resistor is thuscontrolled by the switching frequency. Induction heating is an application.The switching frequency should be shifted higher than resonance rather thanlower when controlling the output. Higher switching frequencies moves the har-monics of the square wave higher, increasing the ÞlterÕs effectiveness in remov-ing them. Conversely, shifting the frequency lower than resonance moves theharmonics, particularly the third harmonic, closer to resonance and increasestheir amplitudes in the output.AResonant InverterA10-resistive load requires a 1000-Hz, 50-Vrms sinusoidal voltage. The THD of the loadvoltage must be no more than 5 percent. An adjustable dc source is available. (a) Designan inverter for this application. (b) Determine the maximum voltage across the capacitor.(c) Verify the design with a PSpice simulation.■ Solution(a)The full-bridge converter of Fig. 9-3awith 1000-Hz square wave switching andseries resonant LCÞlter is selected for this design. The amplitude of a 50-Vrmssinusoidal voltage is The required dc input voltage is determinedfrom Eq. (9-48).The resonant frequency of the Þlter must be 1000 Hz, establishing the LCproduct. TheQof the Þlter and the THD limit are used to determine the values of Land C. The thirdharmonic of the square wave is the largest and will be the least attenuated by the Þlter.Estimating the THD from the third harmonic,(9-51)where V1and V3are the amplitudes of the fundamental and third harmonic frequencies,respectively, across the load. Using the foregoing approximation, the amplitude of thethird harmonic of the load voltage must be at mostV3 < (THD)(V1)(0.05)(70.7)3.54 VTHDAanZ1V2nV1LV3V170.74VdcVdc55.5 V22(50)70.7 V.EXAMPLE 9-3har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 404 9.4The Series Resonant Inverter405For the square wave, V3V1/3 70.7/3. Using Eq. (9-50), Qis determined fromthe magnitude of the third harmonic output with the third harmonic input, 70.7/3, at30.Solving the preceding equation for Qresults in Q2.47. Using Eq. (9-49),Power delivered to the load resistor at the fundamental frequency is V2rms/R502/10 250 W. Power delivered to the load at the third harmonic is (2.52)/10 0.63 W,showing that power at the harmonic frequencies is negligible.(b)Voltage across the capacitor is estimated from phasor analysis at the fundamentalfrequency:At resonance, the inductor has the same impedance magnitude as the capacitor, so itsvoltage is also 175 V. The inductor and capacitor voltages would be larger if Qwereincreased. Note that these voltages are larger than the output or source voltage.(c)One method of doing a PSpice simulation is to use a square wave voltage as the input tothe RLCcircuit. This assumes that the switching is ideal, but it is a good starting point toverify that the design meets the speciÞcations. The circuit is shown in Fig. 9-4a.Output begins after three periods (3 ms) to allow steady-state conditions to bereached. The Probe output showing input and output voltages is seen in Fig. 9-4b,and a Fourier analysis (FFT) from Probe is shown in Fig. 9-4c. The amplitudes ofthe fundamental frequency and third harmonic are as predicted in part (a). TheFourier analysis for the output voltage is as follows:FOURIER COMPONENTS OF TRANSIENT RESPONSE V(OUTPUT)DC COMPONENT 2.770561E-02HARMONICFREQUENCYFOURIER NORMALIZED PHASE NORMALIZED NO(HZ)COMPONENTCOMPONENT(DEG)PHASE (DEG)11.000E+037.056E+011.000E+001.079E-010.000E+0022.000E+033.404E-024.825E-043.771E+013.749E+0133.000E+033.528E+005.000E-02-8.113E+01-8.145E+0144.000E+031.134E-021.608E-04-5.983E+00-6.414E+0055.000E+031.186E+001.681E-02-8.480E+01-8.533E+0166.000E+038.246E-031.169E-04-2.894E+01-2.959E+0177.000E+035.943E-018.423E-03-8.609E+01-8.684E+0188.000E+037.232E-031.025E-04-4.302E+01-4.388E+0199.000E+033.572E-015.062E-03-8.671E+01-8.768E+01TOTAL HARMONIC DISTORTION 5.365782E+00 PERCENTVC`Ij0C`V1/R0C70.7/10(2)(1000)(6.44)(106)175 VC1Q0R1(2.47)(2)(1000)(10)6.44 FLQR0(2.47)(10)2(1000)3.93 mHVo,3Vi,33.5470.7/3A11Q2((30>0)(0>30))2har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 405
406(a)V1 = –55.5V2 = 55.5TD = 0TR = 1nTF = 1nPW = {0.5/FS}PER = {1/FS}PARAMETERS:FS = 1000inputoutputVs12L13.93mC1R1106.44u(b)100 V0 Vvovi–100 V3.0 msV(INPUT)V(OUTPUT)Time3.5 ms4.0 ms4.5 ms5.0 ms(1.0000K, 70.805)77.5 V(3.0000K, 23.606)FOURIER ANALYSIS(3.0000K, 3.5261)V(INPUT)V(OUTPUT)60.0 V40.0 V20.0 V0 V0 Hz1.0 KHz2.0 KHz3.0 KHzFrequency(c)4.0 KHz5.0 KHz-+Figure 9-4(a) PSpice circuit for Example 9-3; (b) Input and output voltages; (c) Fourier analysis.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 406
9.5The Series Resonant DC-DC Converter407The output Þle shows that the THD is 5.37 percent, slightly larger than the 5 percentspeciÞcation. Frequencies larger than the third harmonic were neglected in the designand have a small effect on the THD. Aslight increase in Land corresponding decreasein Cwould increase the Qof the circuit and reduce the THD to compensate for theapproximation. Note that switching occurs when the current is close to zero.9.5THE SERIES RESONANTDC-DC CONVERTERBasic OperationThe upper switching frequency limit on dc-dc converters in Chaps. 6 and 7 islargely due to the switching losses, which increase with frequency. Amethod forusing resonance to reduce the switching losses in dc-dc converters is to start witha resonant inverter to produce an ac signal and then rectify the output to obtain adc voltage. Figure 9-5ashows a half-bridge inverter with a full-wave rectiÞer anda capacitor output Þlter across the load resistor RL. The two capacitors on the inputare large and serve to split the voltage of the source. The input capacitors are notpart of the resonant circuit. The basic operation of the circuit is to use the switchesto produce a square wave voltage for va. The series combination of Lrand Crforms a Þlter for the current iL. The current iLoscillates and is rectiÞed and Þlteredto produce a dc voltage output. Converter operation is dependent on the relation-ship between the switching frequency and the resonant frequency of the Þlter.Operation fors> oFor the Þrst analysis, assume that the switching frequency sis slightly largerthan the resonant frequency oof the series LCcombination. If the switchingfrequency is around the resonant frequency of the LCÞlter, iLis approximatelysinusoidal with frequency equal to the switching frequency.Figure 9-5bshows the square wave input voltage va, the current iL, the switchcurrent iS1, and the input to the rectiÞer bridge vb. The current in the switches isturned on at zero voltage to eliminate turn-on losses, but the switches are turnedoff at nonzero current, so turnoff losses could exist. However, capacitors couldbe placed across the switches to act as lossless snubbers (see Chap. 10) to preventturn off losses.The series resonant dc-dc converter is analyzed by considering the funda-mental frequency of the Fourier series for the voltages and currents. The inputvoltage to the Þlter vais a square wave of Vs/2. If the output voltage is assumedto be a constant Vo, then the input voltage to the bridge vbis Vowhen iLis posi-tive and is Vowhen iLis negative because of the condition of the rectiÞerdiodes for each of these cases. The amplitudes of the fundamental frequencies ofthe square waves vaand vbare(9-52)(9-53)Vb14VoVa14(Vs >2)2Vshar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 407
408Figure 9-5(a) Aseries resonant dc-dc converter using a half-bridge inverter;(b) Voltage and current waveforms for so; (c) Equivalent ac circuit forseries resonant dc-dc converter; (d) Normalized frequency response.iS1S1S2D2(a)DR2DR4DR3CoRLVoDR1D1iLLrCrvaVsVs2vbibIo++++—-+-Vs2+-(b)Vs2Vs2Vo-VoiS1iLvavb-(c)Va1jXLRe-jXC+-Vb1+-har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 408
9.5The Series Resonant DC-DC Converter409The current at the output of the bridge ibis the full-wave-rectiÞed form of iL.The average value of ibis output current Io. If iLis approximated as a sine waveof amplitude IL1, the average value of ibis(9-54)The relationship between input and output voltages is approximated fromac circuit analysis using the fundamental frequencies of the voltage and currentwaveforms. Figure 9-5cshows the equivalent ac circuit. The input voltage is thefundamental of the input square wave, and the impedances are ac impedancesusing sof the input voltage. The value of output resistance in this equivalentcircuit is based on the ratio of voltage to current at the output. Using Eqs. (9-53)and (9-54),(9-55)ReVb1IL1(4Vo>)(Io>2)a82baVoIoba82b(RL)IbIo2IL1Series Resonant dcÐdc ConverterQ = 10.60.50.40.3VoVs0.20.10.00.60.8(d)1.01.21.4Q = 2Q = 3Q = 4=fsf0ωsω0Figure 9-5(continued)har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 409
410CHAPTER 9Resonant ConvertersThe ratio of output to input voltage is determined from phasor analysis of Fig. 9-5c,(9-56)or(9-57)where the reactances XLand XCare(9-58)(9-59)The reactances XLand XCdepend on the switching frequency s. Therefore, theoutput voltage can be controlled by changing the switching frequency of the con-verter. The sensitivity of the output to the switching frequency depends on thevalues of Lrand Cr. If Qis deÞned as(9-60)Vo/Vsis plotted with Qas the parameter in Fig. 9-5d. The curves are more accurateabove resonance because iLhas more of a sinusoidal quality for these frequencies.Recall that the curves are based on the approximation that the current is sinusoidaldespite the square wave voltage excitation, and the results will be inexact.Series Resonant DC-DC ConverterFor the dc-dc converter of Fig. 9-5a,Vs100 VLr30 HCr0.08 FRL10 fs120 kHzDetermine the output voltage of the converter. Verify the result with a PSpice simulation.■ SolutionThe resonant frequency of the Þlter isf0122LrCr12230(106)(0.08)(106)102.7 kHzQ0LrRLXC1sCrXLsLrVoVs2a121[(XLXC)>Re]2bVb1Va14Vo >2Vs >2ReRej(XLXC)2EXAMPLE 9-4har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 410
9.5The Series Resonant DC-DC Converter411Switching frequency is higher than resonance, and the equivalent circuit of Fig. 9-5cisused to determine the output voltage. From Eq. (9-55), the equivalent resistance isThe inductive and capacitive reactances areUsing Eq. (9-57), the output voltage isThe output could also be approximated from the graph of Fig. 9-5d. The value of QfromEq. (9-60) isNormalized switching frequency isNormalized output is obtained from Fig. 9-5das approximately 0.4, making the outputvoltage (0.4)(100 V) 40 V.Simulation for this circuit could include various levels of detail. The simplest assumesthat switching takes place properly, and a square wave exists at the input to the Þlter asshown in Fig. 9-6a. The source is then modeled as a square wave of Vs/2 withoutincluding any details of the switches, as was done in Example 9-3. The small capacitorsacross the diodes aid in convergence in the transient analysis.Figure 9-6shows the current in Lrand the output voltage. Note that the current is notquite sinusoidal and that the output is approximately 40 Vand contains some ripple. Thesimulation veriÞes the foregoing analytic solution. Note that the results of the simulationare very sensitive to the simulation parameters, include the step size of the transientanalysis. Astep size of 0.1 s was used here. The diodes are made ideal by setting n0.001 in the PSpice diode model.Series Resonant DC-DC ConverterFor the series resonant dc-dc converter of Fig. 9-5a, the dc source voltage is 75 V. Thedesired output voltage is 25 V, and the desired switching frequency is 100 kHz. The loadresistance RLis 10 . Determine Lrand Cr.fsf0120 kHz102.7 kHz1.17Q0LrRL2(102.7)(10)3 30(106)101.94VoVs2 a121[(XLXC)>Re]2b1002a121[(22.616.6)>8.11]2b40.1 VXLsLr2(120,000)(30)(106)22.6 ÆXC1sCr12(120,000)(0.08)(106)16.6 ÆRe82 (RL)82 (10)8.11 ÆEXAMPLE 9-5har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 411
412CHAPTER 9Resonant Converters■SolutionSelect the resonant frequency 0to be slightly less than the desired switching frequencys. Let s/01.2,From the graph of Fig. 9-5dwith Vo/Vs25/75 0.33 and s/01.2, the required Qis approximately 2.5. From Eq. (9-60),LrQRL0(2.5)(10)524(103)47.7 H0s1.22fs1.221051.2524(103) rad/sFigure 9-6(a) PSpice circuit for the series resonant dc-dc converter with the source andswitches replaced with a square wave. The small capacitors across the diodes aid convergence;(b) Probe output.RL10Co100u1n1n5.0 ACURRENT IN LrOUTPUT VOLTAGE–5.0 AI (Lr)0 A.model Dbreak D n = 0.001(a)Time(b)1n1n12Lr30uV1Cr0.08uV1 = {–Vdc/2}V2 = {Vdc/2}TD = 0TR = 1nTF = 1nPW = {0.5/f}PER = {1/f}PARAMETERS:SERIES RESONANT DC–DC CONVERTERf = 120kVdc = 10040.00 V39.95 V39.90 V3.900 msSEL>>3.905 ms3.910 ms3.915 ms3.920 msV(C4:2, RL:2)-+har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 412
9.5The Series Resonant DC-DC Converter413andOperation forw0/2 < ws< w0The series resonant dc-dc converter that has a switching frequency less than reso-nance but greater than 0/2 has the current waveform for iLas shown in Fig. 9-7.The switches turn on with positive voltage and current, resulting in turn-onswitching losses. The switches turn off at zero current, resulting in no turnofflosses. Furthermore, because the switches turn off at zero current, thyristors couldbe used if the switching frequency is low. Analysis is done using the same tech-nique as for s0, but the harmonic content of the current waveform is nowhigher, and the sinusoidal approximation is not as accurate.Operation forws< w0/2With this switching frequency, the current in the series LCcircuit is shown inFig. 9-8. When S1in Fig. 9-5ais turned on, iLbecomes positive and oscillates atfrequency 0. When the current reaches zero at t1and becomes negative, diodeD1carries the negative current. When the current again reaches zero at t2, S1isoff, and the current remains at zero until S2turns on at T/2. The current wave-form for the second half-period is the negative of that of the Þrst.Switches turn on and off at zero current, resulting in zero switching losses.Since the switches turn off at zero current, thyristors could be used in low-frequencyapplications.012LrCrQCr102 Lr1(524)(103)(47.7)(106)0.0764 FvbvaiLis1Figure 9-7Voltage and current waveforms for the series resonantdc-dc converter, 0/2 s0.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 413 414CHAPTER 9Resonant ConvertersCurrent in the LCseries combination is discontinuous for this mode of oper-ation. In the two previously described modes of operation, the current is contin-uous. Since the average of the rectiÞed inductor current must be the same as theload current, the current in the LCbranch will have a large peak value.PSpice simulation for discontinuous current must include unidirectionalswitch models because the voltage at the input to the circuit is not a square wave.Variations on the Series Resonant DC-DC ConverterThe series resonant dc-dc converter can be implemented using variations on thebasic topology in Fig. 9-5a. The capacitor Crcan be incorporated into the voltage-divider capacitors in the half bridge, each being Cr/2. An isolation transformer can be included as part of the full-wave rectiÞer on the output. Figure 9-9showsan alternate implementation of the series resonant dc-dc converter.t10iLt2Figure 9-8Current waveform for theseries resonant dc-dc converter, s0.VsLrCr2++-VoCoRL+--Cr2+-Figure 9-9An alternate implementation of the series resonantdc-dc converter.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 414 9.6The Parallel Resonant DC-DC Converter4159.6THE PARALLELRESONANTDC-DC CONVERTERThe converter in Fig. 9-10ais a parallel dc-dc converter. The capacitor Crisplaced in parallel with the rectiÞer bridge rather than in series. An output Þlterinductor Loproduces essentially a constant current from the bridge output toVsS1D1D2(a)(b)2.42.01.61.20.80.40.60.81.01.21.4(c)S2LrRLVsCoCoLo2++-Vo+++----VsjXL-jXCRe2++--Ioibvxvb+-vaVa1+-Vb1Q = 5Q = 4Q = 3Q = 2Q = 1VoVs=fsf0wsw0Figure 9-10(a) Parallel resonant dc-dc converter; (b) Equivalent ac circuit forparallel resonant dc-dc converter; (c) Normalized frequency response.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 415 416CHAPTER 9Resonant Convertersthe load. The switching action causes the voltage across the capacitor andbridge input to oscillate. When the capacitor voltage is positive, rectiÞer diodesDR1and DR2are forward-biased and carry current Io. When the capacitor voltageis negative, DR3and DR4are forward-biased and carry current Io. The currentibat the input to the bridge is therefore a square wave current of Io. Thebridge output voltage is the full-wave rectiÞed waveform of voltage vb. The aver-age voltage across the output inductor Lois zero, so the output voltage is theaverage of rectiÞed vb.The parallel dc-dc converter can be analyzed by assuming that the voltageacross the capacitor Cris sinusoidal, taking only the fundamental frequencies ofthe square wave voltage input and square wave current into the bridge. Theequivalent ac circuit is shown in Fig. 9-10b. The equivalent resistance for thiscircuit is the ratio of capacitor voltage to the fundamental frequency of the squarewave current. Assuming that the capacitor voltage is sinusoidal, the average ofthe rectiÞed sine wave at the bridge output (vx) is the same as Vo,(9-61)where Vb1is the amplitude of the fundamental frequency of vb. The equivalentresistance is then(9-62)where Ib1is the amplitude of the fundamental frequency of the square wavecurrent ib.Solving for output voltage in the phasor circuit of Fig. 9-10b,(9-63)Since Vois the average of the full-wave rectiÞed value of vb,(9-64)Va1is the amplitude of the fundamental frequency of the input square wave:(9-65)Combining Eqs. (9-64) and (9-65) with Eq. (9-63), the relationship between out-put and input of the converter is(9-66)VoVs42211(XL >XC)j(XL >Re)2Va14(Vs>2)Vb1Vo2Vb1Va1211(XL >XC)j(XL >Re)2ReVb1Ib1Vo>24Io>28aVoIob28RLVoVx2Vx12Vb1har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 416
9.6The Parallel Resonant DC-DC Converter417or(9-67)Vo/Vsis plotted with Qas a parameter in Fig. 9-10c, where Qis deÞned as(9-68)and(9-69)The curves are more accurate for switching frequencies larger than 0becauseof the sine-like quality of the capacitor voltage for these frequencies. Note thatthe output can be larger than the input for the parallel resonant dc-dc converter, butthe output is limited to Vs/2 for the series resonant dc-dc converter.Parallel Resonant DC-DC ConverterThe circuit of Fig. 9-10ahas the following parameters:Vs100 VLr8 HCr0.32 FRL10 fs120 kHzDetermine the output voltage of the converter. Assume the output Þlter components Loand Coproduce a ripple-free output current and voltage.■SolutionFrom the parameters given,s02(120 k)625 k1.21QRL0 Lr10625(103)8(106)2.0012LrCr128(106)0.32(106)625 krad/s012LrCrQRL0LrVo4Vs22[1(XL >XC)]2(XL >Re)2EXAMPLE 9-6har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 417
418CHAPTER 9Resonant ConvertersThe normalized output can be estimated from the graph in Fig. 9-10cas 0.6, making theoutput approximately 60 V. The output voltage can also be obtained from Eq. (9-67).The reactances areThe equivalent resistance isEquation (9-67) for output voltage becomes9.7THE SERIES-PARALLELDC-DC CONVERTERThe series-parallel dc-dc converter of Fig. 9-11ahas both a series and a parallelcapacitor. The analysis is similar to the parallel converter discussed previously.The switches produce a square wave voltage va, and the voltage vbat the input tothe rectiÞer is ideally a sinusoid at the fundamental frequency of the input squarewave. The output inductor Lois assumed to produce a ripple-free current, causingthe input current ibto the rectiÞer bridge to be a square wave.The relationship between input and output voltages is estimated from acanalysis of the circuit for the fundamental frequency of the square waves. The acequivalent circuit is shown in Fig. 9-11b. Astraightforward phasor analysis ofFig. 9-11bgives(9-70)where Reis the same as for the parallel converter,(9-71)Re28RLVb1Va1211(XCs >XCp)(XL >XCp)j(XL >ReXCs >Re)2Vo(4)(100)22[1(6.03/4.14)]2(6.03>12.3)260.7 VRe28RL28(10)12.3 ÆXLsLr2(120)(103)8(106)6.03 ÆXC1sCr12(120)(103)0.32(106)4.14 Æhar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 418
9.7The Series-Parallel DC-DC Converter419Figure 9-11(a) Series-parallel resonant dc-dc converter; (b) Equivalent ac circuit for theseries-parallel resonant dc-dc converter; (c) Normalized frequency response for output voltage.Vs(a)LRLVs2CpCsCoLo+Vo++—Ioibvb+-vaVs2+-(b)jXL-jXCp-jXCs+-Va1+-Vb1ReQ = 5Q = 4Q = 3Q = 2Q = 1(c)=fsf0wsw0VoVs1.00.80.60.40.200.80.91.01.11.21.31.41.5har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 419
420CHAPTER 9Resonant Convertersand the reactances at the switching frequency are(9-72)Also Va1and Vb1are the amplitudes of the fundamental frequencies of the wave-forms at vaand vb. Using Eqs. (9-64) and (9-65), the relationship between inputand output of the converter is(9-73)Rewriting the preceding equation in terms of s,(9-74)Equation (9-74) for CsCpis plotted with Qas a parameter in Fig. 9-11cwhereQis deÞned as(9-75)where(9-76)012LCsQ0LRLVoVs42Aa1CpCs2sLCpb2asLRe1sReCsb2VoVs42211(XCs >XCp)(XL >XCp)j(XL >ReXCs >Re)2XCs1sCsXCp1sCpXLsLThese curves are more accurate above 0thanbelow because the harmonics ofthe square wave are more adequately Þltered, resulting in the ac analysis beingmore representative of the actual situation.The series capacitor Cscan be incorporated into the voltage-divider capaci-tors, each equal to Cs/2, for the half-bridge circuit as was shown in Fig. 9-9forthe series resonant dc-dc converter.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 420
9.8Resonant Converter Comparison421Series-Parallel Resonant DC-DC ConverterThe series-parallel resonant dc-dc converter of Fig. 9-11ahas the following parameters:Vs100 VCpCs0.1 FL100 HRL10 fs60 kHzThe output Þlter components Loand Coare assumed to produce a ripple-free output.Determine the output voltage of the converter.■SolutionThe resonant frequency 0is determined from Eq. (9-76) asThe Qof the circuit is determined from Eq. (9-75) asThe normalized switching frequency isFrom the graph of Fig. 9-11c, the normalized output is slightly less than 0.4, for anestimated output of Vo100(0.4) 40 V. Equation (9-74) is evaluated, using Re2RL/8 12.34 ,9.8RESONANTCONVERTER COMPARISONAdrawback of the series converter described previously is that the output cannotbe regulated for the no-load condition. As RLgoes to inÞnity, Qin Eq. (9-60)goes to zero. The output voltage is then independent of frequency. However, theparallel converter is able to regulate the output at no load. In Eq. (9-68), for theparallel converter Q becomes larger as the load resistor increases, and the outputremains dependent on the switching frequency.VoVs0.377VoVs(0.377)(100)(0.377)37.7 Vfsf060(103)50.3(103)1.19Q0LRL3.16(103)(100)(106)103.16012LCs12(100)(106)(0.1)(106)316 krad/sf00250.3 kHzEXAMPLE 9-7har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 421
422CHAPTER 9Resonant ConvertersAdrawback of the parallel converter is that the current in the resonant com-ponents is relatively independent of load. The conduction losses are Þxed, andthe efÞciency of the converter is relatively poor for light loads.The series-parallel converter combines the advantages of the series and par-allel converters. The output is controllable for no load or light load, and the light-load efÞciency is relatively high.9.9THE RESONANTDC LINK CONVERTERThe circuit of Fig. 9-12ais the basic topology for a switching scheme for aninverter that has zero-voltage switching. The analysis proceeds like that of the res-onant switch converters. During the switching interval, the load current is assumedto be essentially constant at Io. The resistance represents losses in the circuit.When the switch is closed, the voltage across the RLrcombination is Vs.If the time constant Lr/Ris large compared to the time that the switch isclosed, the current rises nearly linearly. When the switch is opened, theequivalent circuit is shown in Fig. 9-12b. KirchhoffÕs voltage and current lawsyield the equations(9-77)(9-78)Differentiating Eq. (9-77),(9-79)The derivative of the capacitor voltage is related to capacitor current by(9-80)Substituting into Eq. (9-79) and rearranging,(9-81)If the initial conditions for inductor current and capacitor voltage are(9-82)the solution for current can be shown to be(9-83)iL(t)I1etc(I1Io) cos(t)2VsR(I1Io)2Lr sin(t)dvC (0)0,iL(0)I1d 2iLdt2RLr diL(t)dtiL(t)LrCrIoLrCrdvC (t)dtiC (t)CriL(t)IoCrLrd2iL(t)dt2RdiL(t)dtdvC (t)dt0iC (t)iL(t)IoRiL(t)LrdiL(t)dtvC (t)Vshar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 422
9.9The Resonant DC Link Converter423where(9-84)(9-85)(9-86)2202012LrCrR2LrLrRiLIoVs+-+-vCCr(a)LrRiLiCIoVsvCiLTtxI1I000+-+-vCCr(b)(c)Figure 9-12(a) Resonant dc link converter; (b) Equivalentcircuit with the switch open and diode off; (c) Capacitorvoltage and inductor current.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 423
424CHAPTER 9Resonant ConvertersCapacitor voltage can be shown to be(9-87)If the resistance is small, making R;Lr, Eqs. (9-83) and (9-87) become(9-88)(9-89)When the switch is opened, the inductor current and capacitor voltage oscil-late. The switch can be reclosed when the capacitor voltage returns to zeroand thereby avoids switching losses. The switch should remain closed untilthe inductor current reaches some selected value I1which is above the loadcurrent Io. This allows the capacitor voltage to return to zero for losslessswitching.An important application of this resonant switching principle is for in-verter circuits. The three-phase inverter of Fig. 9-13can have PWM switching(see Chap. 8) and can include intervals when both switches in one of the threelegs are closed to cause the input voltage to the bridge to oscillate. The switchescan then turn on or off when the capacitor voltage is zero.vC (t)LVset[Vs cos(0t)0 Lr(I1Io)sin(0t)]iL(t)LIoetc(I1Io)cos(0t)Vs0 Lr sin(0t)dLr(I1Io)f sin(t)bvC (t)VsIo Reta(Io RVs)cos(t)eR2LrcVsR2 (I1Io)dVdc+-CrLrabcFigure 9-13Three-phase inverter with a resonant dc link.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 424
9.9The Resonant DC Link Converter425Resonant DC LinkThe single-switch resonant dc link converter of Fig. 9-12ahas the parametersVs75 VL100 HC0.1 FR1 Io10 AI112 AIf the switch is opened at t0 with iL(0) I1and vC(0) 0, determine when the switchshould be closed so the voltage across it is zero. If the switch is closed immediately afterthe capacitor voltage becomes zero, how long should the switch remain closed so that theinductor voltage returns to I1?■SolutionFrom the circuit parameters,Since 0, 0, and Eqs. (9-88) and (9-89) are good approximations,The above equations are graphed in Fig. 9-12c. The time at which the capacitor voltagereturns to zero is determined by setting vCequal to zero and solving for tnumerically,resulting in tx15.5 s. Current is evaluated at t15.5 s using Eq. (9-88), resultingin iL(t15.5 s) 8.07 A.If the switch is closed at 15.5 s, voltage across the inductor is approximately Vs,and the current increases linearly.(9-90)iLVsLtiL(t)L10e5000t c(1210) cos(0t)7531.6 sin(0t)d 10e5000t[2 cos(0t)2.37 sin(0t)]vC (t)L75e5000t[75 cos(0t)31.6(1210) sin(0t)] 75e5000t[75 cos(0t)63.2 sin(0t)]LLr316(103)(100)(106)31.62202L0R2L12(104)5000012LC12(104)(107)316 krad/sEXAMPLE 9-8har80679_ch09_387-430.qxd 12/17/09 2:58 PM Page 425
426CHAPTER 9Resonant ConvertersThe switch must remain closed until iLis 12 A, requiring a time of9.10SummaryResonant converters are used to reduce switching losses in various converter topologies.Resonant converters reduce switching losses by taking advantage of voltage or currentoscillations. Switches are opened and closed when the voltage or current is at or near zero.The topologies discussed in this chapter are resonant switch inverters; the series resonantinverter; the series, parallel, and series-parallel dc-dc converters; and the resonant dc linkconverter. Resonant converters are presently a topic of great interest in power electronicsbecause of increased efÞciency and the possibility of higher switching frequencies withassociated smaller Þlter components. As was demonstrated in the examples, the voltagestresses on the components may be quite high for resonant converters. The sources in theBibliography give further details on resonant converters.9.11BibliographyS. Ang and A. Oliva, Power-Switching Converters, 2d ed., Taylor & Francis, BocaRaton, Fla., 2005.S. Basson, and G. Moschopoulos, ÒZero-Current-Switching Techniques for Buck-TypeAC-DC Converters,Ó International Telecommunications Energy Conference,Rome,Italy, pp. 506Ð513, 2007.W. Chen, Z. Lu, and S. Ye, ÒAComparative Study of the Control Type ZVTPWM DualSwitch Forward Converters: Analysis, Summary and Topology Extensions,ÓIEEEApplied Power Electronics Conference and Exposition (APEC), Washington, D.C.,pp. 1404Ð9, 2009.T. W. Ching. and K. U. Chan, ÒReview of Soft-Switching Techniques for High-FrequencySwitched-Mode Power Converters,Ó IEEE Vehicle Power and PropulsionConference, Austina, Tex.,2008.D. M. Divan, ÒThe Resonant DC Link ConverterÑANew Concept in Static PowerConversion,Ó IEEE Transactions. on Industry Applications, vol. 25, no. 2, March/April 1989, pp. 317Ð325.S. Freeland and R. D. Middlebrook, ÒAUniÞed Analysis of Converters with ResonantSwitches,Ó IEEE Power Electronics Specialists Conference,New Orleans, La.,1986, pp. 20Ð30.J. Goo, J. A. Sabate, G. Hua, F. and C. Lee, ÒZero-Voltage and Zero-Current-SwitchingFull-Bridge PWM Converter for High-Power Applications,Ó IEEE Transactions onIndustry Applications, vol. 1, no. 4, July 1996, pp. 622Ð627.G. Hua and F. C. Lee, ÒSoft-Switching Techniques in PWM Converters,Ó IndustrialElectronics Conference Proceedings, vol. 2, pp. 637Ð643, 1993.R. L. Steigerwald, R. W. DeDoncker, and M. H. Kheraluwala, ÒAComparison of High-Power Dc-Dc Soft-Switched Converter Topologies,Ó IEEE Transactions onIndustry Applications, vol. 32, no. 5, September/October 1996, pp. 1139Ð1145.t(iL)(L)Vs(128.39)(100)(106)754.81 shar80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 426
Problems427T. S. Wu, M. D. Bellar, A. Tchamdjou, J. Mahdavi, and M. Ehsani, ÒReview of Soft-Switched DC-AC Converters,Ó IAS IEEE Industry Applications Society AnnualMeeting, vol. 2, pp. 1133Ð1144, 1996.ProblemsZero-current Resonant Switch Converter9-1In the converter of Fig. 9-1a, Vs10 V, Io5 A, Lr1 H, Cr0.3 F, andfs150 kHz. Determine the output voltage of the converter.9-2In the converter of Fig. 9-1a, Vs18 V, Io3 A, Lr0.5 H, and Cr0.7 F.Determine the maximum switching frequency and the corresponding outputvoltage. Determine the switching frequency such that the output voltage is 5 V.9-3In the converter of Fig. 9-1a, Vs36 V, Io5 A, Lr10 nH, Cr10 nF, and fs750 kHz. (a) Determine the output voltage of the converter. (b) Determinethe maximum inductor current and capacitor voltage. (c) Determine theswitching frequency for an output of 12 V.9-4In the converter of Fig. 9-1a, Vs50 V, Io3 A, 07(107) rad/s, and Vo36 V. Determine Lrand Crsuch that the maximum current in Lris 9 A. Determinethe required switching frequency.9-5In the converter of Fig. 9-1a, Vs100 V, Lr10 H, and Cr0.01 F. Theload current ranges from 0.5 to 3 A. Determine the range of switching frequencyrequired to regulate the output voltage at 50 V.9-6In the converter of Fig. 9-1a, Vs30 V, RL5 , and fs200 kHz. Determinevalues for Lrand Crsuch that Z0is 2.5 and Vo15 V.9-7Determine a PSpice input Þle to simulate the circuit of Fig. 9-1ausing theparameters in Probl. 9-1. Model the load current as a current source. Use thevoltage-controlled switch Sbreak for the switching device. Idealize the circuit byusing Ron0.001 in the switch model and using n0.001 in the Dbreak diodemodel. (a) Determine the (average) output voltage. (b) Determine the peak voltageacross Cr. (c) Determine the peak, average, and rms values of the current in Lr.Zero-voltage Resonant Switch Converter9-8In Example 9-2, determine the required switching frequency to produce anoutput voltage of 15 V. All other parameters are unchanged.9-9In Fig. 9-2a, Vs20, Lr0.1 H, Cr1 nF, Io10 A, and fs2 MHz.Determine the output voltage and the maximum capacitor voltage and maximuminductor current.9-10In Fig. 9-2a, Vs5 V, Io3 A, Lr1 H, and Cr0.01 F. (a) Determinethe output voltage whenfs500 kHz. (b) Determine the switching frequencysuch that the output voltage is 2.5 V.9-11In Fig. 9-2a, Vs12 V, Lr0.5 H, Cr0.01 F, and Io10 A. (a) Determinethe output voltage when fs500 kHz. (b) The load current Iois expected to varybetween 8 and 15 A. Determine the range of switching frequency necessary toregulate the output voltage at 5 V.9-12In Fig. 9-2a, Vs15 Vand Io4 A. Determine Lrand Crsuch that themaximum capacitor voltage is 40 Vand the resonant frequency is 1.6(106) rad/s.Determine the switching frequency to produce an output voltage of 5 V.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 427
428CHAPTER 9Resonant Converters9-13In Fig. 9-2a, Vs30 V, RL5 , and fs100 kHz. Determine values for Lrand Crsuch that Z0is 25 and Vo15 V.9-14Determine a PSpice circuit to simulate the circuit of Fig. 9-2ausing theparameters in Probl. 9-9. Model the load current as a current source. Use thevoltage-controlled switch Sbreak for the switching device, and make itunidirectional by adding a series diode. Make the diode ideal by using n0.001in the Dbreak model. (a) Determine the (average) output voltage. (b) Determinethe peak voltage across Cr. (c) Determine the energy transferred from the sourceto the load in each switching period.Resonant Inverter9-15The full-bridge resonant inverter of Fig. 9-3ahas a 12-resistive load thatrequires a 400-Hz, 80-Vrms sinusoidal voltage. The THD of the load voltagemust be no more than 5 percent. Determine the required dc input and suitablevalues for Land C. Determine the peak voltage across Cand the peak current inL.9-16The full-bridge resonant inverter of Fig. 9-3ahas a 8-resistive load thatrequires a 1200-Hz, 100-Vrms sinusoidal voltage. The THD of the load voltagemust be no more than 10 percent. Determine the required dc input and suitablevalues for Land C. Simulate the inverter in PSpice and determine the THD.Adjust values of Land Cif necessary so that the 10 percent THD is strictlysatisÞed. What is the value of current when switching takes place?9-17The full-bridge resonant inverter of Fig. 9-3ais required to supply 500 Wto a15-load resistance. The load requires a 500-Hz ac current which has no morethan 10 percent total harmonic distortion. (a) Determine the required dc inputvoltage. (b) Determine the values of Land C. (c) Estimate the peak voltageacross Cand peak current in Lusing the fundamental frequency. (d) Simulate thecircuit in PSpice. Determine the THD, peak capacitor voltage, and peak inductorcurrent.Series Resonant DC-DC Converter9-18The series resonant dc-dc converter of Fig. 9-5ahas the following operationparameters: Vs10 V, Lr6 H, Cr6 nF, fs900 kHz, and RL10 .Determine the output voltage Vo.9-19The series resonant dc-dc converter of Fig. 9-5ahas the following operationparameters: Vs24 V, Lr1.2 H, Cr12 nF, fs1.5 MHz, and RL5 .Determine the output voltage Vo.9-20The series resonant dc-dc converter of Fig. 9-5ahas an 18-Vdc source and is tohave a 6-Voutput. The load resistance is 5 , and the desired switchingfrequency is 800 kHz. Select suitable values of Lrand Cr.9-21The series resonant dc-dc converter of Fig. 9-5ahas a 50-Vdc source and is tohave an 18-Voutput. The load resistance is 9 , and the desired switchingfrequency is 1 MHz. Select suitable values of Lrand Cr.9-22The series resonant dc-dc converter of Fig. 9-5ahas a 40-Vdc source and is tohave a 15-Voutput. The load resistance is 5 , and the desired switchingfrequency is 800 kHz. Select suitable values of Lrand Cr. Verify your results witha PSpice simulation.har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 428
Problems4299-23The series resonant dc-dc converter of Fig. 9-5ahas a 150-Vdc source and isto have a 55-Voutput. The load resistance is 20 . Select a switchingfrequency and suitable values of Lrand Cr. Verify your results with a PSpicesimulation.Parallel Resonant dc-dc Converter9-24The parallel resonant dc-dc converter of Fig. 9-10ahas the following operationparameters: Vs15 V, RL10 , Lr1.3 H, Cr0.12F, and fs500 kHz.Determine the output voltage of the converter.9-25The parallel resonant dc-dc converter of Fig. 9-10ahas the following operationparameters: Vs30 V, RL15 , Lr1.2 H, Cr26 nF, and fs1 MHz.Determine the output voltage of the converter.9-26The parallel resonant dc-dc converter of Fig. 9-10ahas Vs12 V, RL15 ,and fs500 kHz. The desired output voltage is 20 V. Determine suitable valuesfor Lrand Cr.9-27The parallel resonant dc-dc converter of Fig. 9-10ahas Vs45 V, RL20 ,and fs900 kHz. The desired output voltage is 36 V. Determine suitable valuesfor Lrand Cr.9-28The parallel resonant dc-dc converter of Fig. 9-10ahas a 50-Vdc source and is tohave a 60-Voutput. The load resistance is 25 . Select a switching frequencyand suitable values of Lrand Cr.Series-parallel dc-dc Converter9-29The series-parallel dc-dc converter of Fig. 9-11ahas the following parameters: Vs100 V, fs500 kHz, RL10 , L12 H, and CsCp12 nF.Determine the output voltage.9-30The series-parallel dc-dc converter of Fig. 9-11ahas Vs12 V, fs800 kHz,and RL2 . Determine suitable values of L, Cs, and Cpsuch that the outputvoltage is 5 V. Use CsCp.9-31The series-parallel dc-dc converter of Fig. 9-11ahas Vs20 Vand fs750 kHz.The output voltage is to be 5 Vand supply 1 Ato a resistive load. Determinesuitable values of L, Cs, and Cp. Use CsCp.9-32The series-parallel dc-dc converter of Fig. 9-11ahas Vs25 V. The outputvoltage is to be 10 Vand supply 1 Ato a resistive load. (a) Select a switchingfrequency and determine suitable values of L, Cs, and Cp. (b) Verify your resultswith a PSpice simulation.Resonant dc Link9-33Create a PSpice simulation for the resonant dc link in Example 9-8. Use anideal diode model. (a) Verify the results of Example 9-8. (b) Determine theenergy supplied by the dc source during one switching period. (c) Determinethe average power supplied by the dc source. (d) Determine the average powerabsorbed by the resistance. (e) How do the results change if the resistance is zero?har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 429
430CHAPTER 9Resonant Converters9-34For the resonant link dc converter of Fig. 9-12a, Vs75 V, Io5 A, R1 ,L250 H, and C0.1 F. If the switch is opened at t0 with iL(0) I17 A, and vC(0) 0, determine time when the switch should be closed so thevoltage across it is zero. If the switch is closed immediately after the capacitorvoltage becomes zero, how long should the switch remain closed so that theinductor voltage returns to 7 A?9-35For the resonant link dc converter of Fig. 9-12a, Vs100 V, Io10 A, R0.5 , L150 H, and C0.05 F. If the switch is opened at t0 withiL(0) I112 A, and vC(0) 0, determine time when the switch should beclosed so the voltage across it is zero. If the switch is closed immediately afterthe capacitor voltage becomes zero, how long should the switch remain closedso that the inductor voltage returns to 12 A?har80679_ch09_387-430.qxd 12/16/09 3:25 PM Page 430
CHAPTER10431Drive Circuits, SnubberCircuits, and Heat Sinks10.1INTRODUCTIONMinimizing power losses in electronic switches is an important objective whendesigning power electronics circuits. On-state power losses occur because thevoltage across a conducting switch is not zero. Switching losses occur because adevice does not make a transition from one state to the other instantaneously, andswitching losses in many converters are larger than on-state losses.Resonant converters (Chap. 9) reduce switch losses by taking advantage ofnatural oscillations to switch when voltage or current is zero. Switches in cir-cuits such as the dc-dc converters of Chaps. 6 and 7 go through a transitionwhen voltage and current are nonzero. Switch losses in those types of convert-ers can be minimized by drive circuits designed to provide fast switching tran-sitions. Snubber circuits are designed to alter the switching waveforms toreduce power loss and to protect the switch. Power loss in an electronic switchproduces heat, and limiting device temperature is critical in the design of allconverter circuits.10.2MOSFETAND IGBTDRIVE CIRCUITSLow-Side DriversThe MOSFETis a voltage-controlled device and is relatively simple to turn onand off, which gives it an advantage over a bipolar junction transistor (BJT). Theon state is achieved when the gate-to-source voltage sufficiently exceeds thehar80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 431
432CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinksthreshold voltage, forcing the MOSFETinto the triode (also called ohmic or non-saturation) region of operation. Typically, the MOSFETgate-to-source voltagefor the on state in switching circuits is between 10 and 20 V, although someMOSFETs are designed for logic-level control voltages. The off state is achievedby a lower-than-threshold voltage. On- and off-state gate currents are essentiallyzero. However, the parasitic input capacitance must be charged to turn theMOSFETon and must be discharged to turn it off. Switching speeds are basi-cally determined by how rapidly charge can be transferred to and from the gate.Insulated gate bipolar transistors (IGBTs) are similar to MOSFETs in their driverequirements, and the following discussion applies to them as well.AMOSFETdrive circuit must be capable of rapidly sourcing and sinkingcurrents for high-speed switching. The elementary drive circuit of Fig. 10-1awilldrive the transistor, but the switching time may be unacceptably high for someapplications. Moreover, if the input signal is from low-voltage digital logicdevices, the logic output may not be sufficient to turn on the MOSFET.Abetter drive circuit is shown in Fig. 10-1b. The double emitter-followerconsists of a matched NPN and PNPbipolar transistor pair. When the driveinput voltage is high, Q1is turned on and Q2is off, turning the MOSFETon.When the drive input signal is low, Q1turns off, and Q2turns on and removesthe charge from the gate and turns the MOSFEToff. The input signal maycome from open-collector TTLused for control, with the double emitter-follower used as a buffer to source and sink the required gate currents, asshown in Fig. 10-1c.Other arrangements for MOSFETdrive circuits are shown in Fig. 10-2. Theseare functionally equivalent to the BJTdouble emitter-follower of Fig. 10-1b. Theupper and lower transistors are driven as complementary on off transistors, withone transistor sourcing current and the other sinking current to and from the gateof the MOSFETto turn the power MOSFETon and off. Figure 10-2ashows NPNBJTtransistors, Fig. 10-2bshows N-channel MOSFETs, and Fig. 10-2cshowscomplementary P- and N-channel MOSFETs.viVsLoadVsVGQ1Q2Load(a)(b)(c)Control CircuitR1viviR1R1R2VsVGQ1Q2LoadFigure 10.1(a) Elementary MOSFETdrive circuit; (b) Double emitter-follower drive circuit; (c) IC drive with double emitter-follower buffer.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 432
10.2MOSFET and IGBT Drive Circuits433Example 10-1 illustrates the significance of the drive circuit on MOSFETswitching speeds and power loss.MOSFETDrive Circuit SimulationAPSpice model for the IRF150 power MOSFETis available in the PSpice demo version inthe EVALfile. (a) Use a PSpice simulation to determine the resulting turn-on and turnofftimes and the power dissipated in the MOSFETfor the circuit of Fig. 10-1a. Use Vs80 Vand a load resistance of 10 . The switch control voltage viis a 0- to 15-Vpulse, and R1100 . (b) Repeat for the circuit of Fig. 10-1cwith R1R21 k. The switching frequencyfor each case is 200 kHz, and the duty ratio of the switch control voltage is 50 percent.■Solution(a)The elementary drive circuit is created for Fig. 10-1ausing VPULSE for theswitch control voltage. The resulting switching waveforms from Probe areshown in Fig. 10-3a. Switching transition times are roughly 1.7 and 0.5 s forturnoff and turn-on, respectively. Average power absorbed by the MOSFETisdetermined from Probe by entering AVG(W(M1)), which yields a result ofapproximately 38 W.(b)The emitter-follower drive circuit of Fig. 10-1cis created using 2N3904 NPN and2N3906 PNPtransistors from the evaluation library. The resulting switching wave-forms are shown in Fig. 10-3b. The switching times are roughly 0.4 and 0.2 s forturnoff and turn-on, and the power absorbed by the transistor is 7.8 W. Note that theemitter-follower drive circuit removes the gate charge more rapidly than the ele-mentary drive circuit in part (a).High-Side DriversSome converter topologies, such as the buck converter using an N-channelMOSFET, have high-side switches. The source terminal of the high-side MOSFETLoad(a)(b)(c)VGVsLoadVsVGLoadVsVGFigure 10.2Additional MOSFETdrive circuits. (a) NPN transistors; (b) N-channelMOSFETs; (c) P- and N-channel MOSFETs.EXAMPLE 10.1har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 433
434CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinksis not connected to the circuit ground, as it would be in a low-side switch in a con-verter such as a boost converter. High-side switches require the MOSFETdrive cir-cuit to be floating with respect to the circuit ground. Drive circuits for theseapplications are called high-side drivers. To turn on the MOSFET, the gate-to-sourcevoltage must be sufficiently high. When the MOSFETis on in a buck converter, forexample, the voltage at the source terminal of the MOSFETis the same as the supplyvoltage Vs. Therefore, the gate voltage must be greater than the supply voltage.18100–52.0 us4.0 usTURN OFFTURN ONMOSFET CURRENTMOSFET VOLTAGE6.0 us7.0 usV(C)/5I(M2:d)Time(b)Figure 10.3Switching waveforms for Example 10-1. (a) Elementary MOSFETdrive circuit of Fig. 10-1a; (b) Double emitter-follower drive circuit of Fig. 10-1b.201002.0 usV(A)/5I(M1:d)Time(a)3.0 us4.0 us5.0 us6.0 usTURN ONTURN OFFMOSFET CURRENTMOSFET VOLTAGE/5har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 434
10.2MOSFET and IGBT Drive Circuits435Away to achieve a voltage higher than the source is to use a charge pump(switched-capacitor converter) as described in Chap. 6. One such high-sidedriver configuration is shown in Fig. 10-4a. The two driver MOSFETs and thediode are labeled as switches S1, S2, and S3. When the control signal is high,S1and S2turn on, and the capacitor charges to Vsthrough the diode (Fig. 10-4b).When the control signal goes low, S1and S2are off, and the capacitor voltage isacross the resistor and the gate of the power MOSFET, turning the MOSFETon.The voltage at the load becomes the same as the source voltage Vs, causing thevoltage at the upper capacitor terminal to be 2Vs. This drive circuit is called abootstrapcircuit.MOSFETgate drivers are available as integrated-circuit (IC) packages.An example is the International Rectifier IR2117 shown in Fig. 10-5a. The ICwith an external capacitor and diode provides the bootstrap circuit for theMOSFET. Another example is the International Rectifier IR2110 that isdesigned to drive both high-side and low-side switches (Fig. 10-5b). Half-bridge and full-bridge converters are applications where both high-side andlow-side drivers are required.Electrical isolation between the MOSFETand the control circuit is oftendesirable because of elevated voltage levels of the MOSFET, as in the upper tran-sistors in a full-bridge circuit or a buck converter. Magnetically coupled and opti-cally coupled circuits are commonly used for electrical isolation. Figure 10-6ashows a control and power circuit electrically isolated by a transformer. Thecapacitor on the control side prevents a dc offset in the transformer. Atypicalswitching waveform is shown in Fig. 10-6b. Since the volt-second product mustbe the same on the transformer primary and secondary, the circuit works bestwhen the duty ratio is around 50 percent. Abasic optically isolated drive circuitis shown in Fig. 10-6c.LoadS2S3S1SwitchcontrolHigh-sideswitchVsLoadOff0 V0 VVs+–S2S3S1VsLoadOnVs2VsVg–+C+–S2S3S1VsVs(b)(c)(a)Figure 10.4(a) Abootstrap circuit for driving a high-side MOSFETor IGBT; (b) The circuit for theswitches closed, causing the capacitor to charge to Vs; (c) The circuit with the switches open, showing that thegate-to-source voltage is Vs.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 435
436CHAPTER 10Drive Circuits, Snubber Circuits, and Heat SinksFigure 10.5(a) International Rectifier IR2117 high-side driver; (b) InternationalRectifier IR2110 high- and low-side driver. (Courtesy of International RectifierCorporation.)(a)(b)VDDVDDVSSVSSVCCVBVSVCCCOMLOHINUp to 500 V or 600 VTOLOADHINHOSDSDLINLINVCCVccINVBVSINHOUp to 600 VTOLOADIR2117COMLoadControlSignal+–VDDvGtvG+–vi(a)(b)(c)Figure 10.6(a) Electrical isolation of control and power circuits; (b) Transformer secondary voltage; (c) Optically isolated control and power circuits.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 436
10.3Bipolar Transistor Drive Circuits43710.3BIPOLAR TRANSISTOR DRIVE CIRCUITSThe bipolar junction transistor (BJT) has largely been replaced by MOSFETs andIGBTs. However, BJTs can be used in many applications. The BJTis a current-controlled device, requiring a base current to maintain the transistor in the con-ducting state. Base current during the on state for a collector current ICmust be atleast IC/. The turn-on time depends on how rapidly the required stored chargecan be delivered to the base region. Turn-on switching speeds can be decreased byinitially applying a large spike of base current and then reducing the current to thatrequired to keep the transistor on. Similarly, a negative current spike at turnoff isdesirable to remove the stored charge, decreasing transition time from on to off.Figure 10-7ashows a circuit arrangement that is suitable for BJTdrives.When the input signal goes high, R2is initially bypassed by the uncharged capac-itor. The initial base current is(10-1)As the capacitor charges, the base current is reduced and reaches a final value of(10-2)The desired charging time of the capacitor determines its value. Three to fivetime constants are required to charge or discharge the capacitor. The chargingtime constant is(10-3)The input signal goes low at turnoff, and the charged capacitor provides a nega-tive current spike as the base charge is removed. Figure 10-7bshows the basecurrent waveform.RE CaR1R2R1R2bCIB2VivBER1R2IB1VivBER1Load(a)(b)Turn-onTurnoffOnVsiBIB1IB2tviR1R2iBCFigure 10.7(a) Drive circuit for a bipolar transistor; (b) Transistor base current.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 437
438CHAPTER 10Drive Circuits, Snubber Circuits, and Heat SinksBipolar Transistor Drive CircuitDesign a BJTbase drive circuit with the configuration of Fig. 10-7athat has a spike of 1 Aat turn-on and maintains a base current of 0.2 Ain the on state. The voltage viis apulse of 0 to 15 Vwith a 50 percent duty ratio, and the switching frequency is 100 kHz.Assume that vBEis 0.9 Vwhen the transistor is on.■SolutionThe value of R1is determined from the initial current spike requirement. Solving for R1in Eq. (10-1),The steady-state base current in the on state determines R2. From Eq. (10-2),The value of Cis determined from the required time constant. For a 50 percent duty ratioat 100 kHz, the transistor is on for 5 s. Letting the on time for the transistor be five timeconstants, 1 s. From Eq. (10-3),PSpice Simulation for a BJTDrive CircuitUse PSpice to simulate the circuit of Fig. 10-8awith Vs80 V, a 10-load resistor, andthe base drive components from Example 10-2: (a) with the base capacitor omitted and(b) with the base drive capacitor included. Determine the power absorbed by the transis-tor for each case. Use the 2n5686 PSpice model from ON Semiconductor.■SolutionThe circuit of Fig. 10-8ais created using VPULSE for the control voltage source. Thetransistor model is obtained from the ON Semiconductor website, and the model iscopied and pasted into the QbreakN transistor model by choosing Edit, PSpice Model.The resulting switching waveforms are shown in Fig. 10-8. Note the significant dif-ference in switching times with and without the base drive capacitance. Power absorbedby the transistor is determined by entering AVG(W(Q1)) which yields results of 30 Wwithout the base capacitor and 5 Wwith the capacitor.Switching times can be reduced by keeping the transistor in the quasi-saturationregion, which is just past the linear region but not in hard saturation. This isRE CaR1R2R1R2bC11.3 C1 sC88.7 nFR2VivBEIB2R1150.90.214.156.4 ÆR1VivBEIB1150.9114.1 ÆEXAMPLE 10.2EXAMPLE 10.3har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 438
10.3Bipolar Transistor Drive Circuits43915100–540 us80 usVOLTAGECURRENTTURN ONTURN ONTURN OFFTURN OFFBASE CIRCUIT WITHOUT A CAPACITOR120 usTime(a)V(Q)/8160 us200 us15100–550 us100 usBASE CIRCUIT WITH A CAPACITORCURRENTVOLTAGE150 usTime(b)IC(Ql)V(Q)/8200 usIC(Ql)Figure 10.8Switching waveforms for a bipolar junction transistor (a) without the basecapacitor and (b) with the base capacitor. The voltage is scaled by .18har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 439
440CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinkscontrolled by preventing vCEfrom going too low. However, on-state conductionlosses for the BJTare larger than if the transistor were further into saturationwhere the collector-to-emitter voltage is lower.Aclamping circuit such as the Baker’s clamp of Fig. 10-9can keep the tran-sistor in quasi-saturation by limiting the collector-to-emitter voltage. There are ndiodes in series with the base, and a shunting diode Dsis connected from thedrive to the collector. The on-state collector-to-emitter voltage is determinedfrom Kirchhoff’s voltage law as(10-4)The desired value of vCEis determined by the number of diodes in series with thebase. Diode Doallows reverse base current during turnoff.10.4THYRISTOR DRIVE CIRCUITSThyristor devices such as SCRs require only a momentary gate current to turn thedevice on, rather than the continuous drive signal required for transistors. Thevoltage levels in a thyristor circuit may be quite large, requiring isolationbetween the drive circuit and the device. Electrical isolation is accomplished bymagnetic or optical coupling. An elementary SCR drive circuit employing mag-netic coupling is shown in Fig. 10-10a. The control circuit turns on the transistorand establishes a voltage across the transformer primary and secondary, provid-ing the gate current to turn on the SCR.The simple gate drive circuit of Fig. 10-10bcan be used in some applicationswhere electrical isolation is not required. The circuit is a single-phase voltage con-troller (Chap. 5) of the type that might be used in a common light dimmer. AnSCR could be used in place of the triac T1to form a controlled half-wave rectifier(Chap. 3). The delay angle is controlled by the RCcircuit connected to the gatethrough the diac T2. The diac is a member of the thyristor family that operates asa self-triggered triac. When the voltage across the diac reaches a specified value,it begins to conduct and triggers the triac. As the sinusoidal source voltage goespositive, the capacitor begins to charge. When the voltage across the capacitorreaches the diac trigger voltage, gate current is established in the triac for turn-on.vCEvBEnvDvDsFigure 10.9Baker’s clamp to control the degree of BJTsaturation.DsD1D0Dnhar80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 440
10.5Transistor Snubber Circuits44110.5TRANSISTOR SNUBBER CIRCUITSSnubber circuits reduce power losses in a transistor during switching (althoughnot necessarily total switching losses) and protect the device from the switchingstresses of high voltages and currents.As discussed in Chap. 6, a large part of the power loss in a transistor occursduring switching. Figure 10-11ashows a model for a converter that has a largeinductive load which can be approximated as a current source IL. The analysis ofswitching transitions for this circuit relies on Kirchhoff’s laws: the load currentmust divide between the transistor and the diode; and the source voltage mustdivide between the transistor and the load.In the transistor on state, the diode is off and the transistor carries the loadcurrent. As the transistor turns off, the diode remains reverse-biased until theControl(a)v(b)LoadRT2T1CFigure 10.10(a) Magnetically coupled thyristor drive circuit; (b) Simple RCdrive circuit.VsVsILILDLvLp(t)+TurnoffTurn-on–vQtstf+(a)(b)(c)–iQiQtvQtFigure 10.11(a) Converter model for switching inductive loads;(b) Voltage and current during switching; (c) Instantaneous powerfor the transistor.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 441
442CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinkstransistor voltage vQincreases to the source voltage Vsand the load voltage vLdecreases to zero. After the transistor voltage reaches Vs, the diode currentincreases to ILwhile the transistor current decreases to zero. As a result, there isa point during turnoff when the transistor voltage and current are high simulta-neously (Fig. 10-11b), resulting in a triangularly shaped instantaneous powerwaveform pQ(t), as in Fig. 10-11c.In the transistor off state, the diode carries the entire load current. Duringturn-on, the transistor voltage cannot fall below Vsuntil the diode turns off,which is when the transistor carries the entire load current and the diode currentis zero. Again, there is a point when the transistor voltage and current are highsimultaneously.Asnubber circuit alters the transistor voltage and current waveforms to anadvantage. Atypical snubber circuit is shown in Fig. 10-12a. The snubber pro-vides another path for load current during turnoff. As the transistor is turning offDLVsILiDLpQ(t)pQ(t)pQ(t)vCvCiQiQtxtfttf = txVftiQDsRiCiQvCCvC+000(a)(b)txtft(d)(c)–Figure 10.12(a) Converter with a transistor snubber circuit; (b–d) Turnoff waveformswith a snubber with increasing values of capacitance.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 442
10.5Transistor Snubber Circuits443and the voltage across it is increasing, the snubber diode Dsbecomes forward-biased and the capacitor begins to charge. The rate of change of transistor volt-age is reduced by the capacitor, delaying its voltage transition from low to high.The capacitor charges to the final off-state voltage across the transistor andremains charged while the transistor is off. When the transistor turns on, thecapacitor discharges through the snubber resistor and transistor.The size of the snubber capacitor determines the rate of voltage rise acrossthe switch at turnoff. The transistor carries the load current prior to turnoff, andduring turnoff the transistor current decreases approximately linearly until itreaches zero. The load diode remains off until the capacitor voltage reaches Vs.The snubber capacitor carries the remainder of the load current until the loaddiode turns on. The transistor and snubber-capacitor currents during turnoff areexpressed as(10-5)(10-6)where txis the time at which the capacitor voltage reaches its final value, whichis determined by the source voltage of the circuit. The capacitor (and transistor)voltage is shown for different values of Cin Fig. 10-12bto d. Asmall snubbercapacitor results in the voltage reaching Vsbefore the transistor current reacheszero, whereas larger capacitance results in longer times for the voltage to reachVs. Note that the energy absorbed by the transistor (the area under the instanta-neous power curve) during switching decreases as the snubber capacitanceincreases.The capacitor is chosen on the basis of the desired voltage at the instant thetransistor current reaches zero. The capacitor voltage in Fig. 10-12dis expressed as(10-7)vc(t)h1CLt0IL ttf dtIL t22Ctf0 t tf1CLttfIL dtvc(tf)ILC (ttf)IL tf2Ctf t txVst txiC(t)dILiQ(t)IL ttf 0 t tfIL tf t tx0 t txiQ(t)dILa1ttfb0 for 0 t tft tfhar80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 443
444CHAPTER 10Drive Circuits, Snubber Circuits, and Heat SinksIf the switch current reaches zero before the capacitor fully charges, the capaci-tor voltage is determined from the first part of Eq. (10-7). Letting vc(tf) Vf,Solving for C,(10-8)where Vfis the desired capacitor voltage when the transistor current reaches zero(VfVs). The capacitor is sometimes selected such that the switch voltagereaches the final value at the same time that the current reaches zero, in whichcase(10-9)where Vsis the final voltage across the switch while it is open. Note that thefinal voltage across the transistor may be different from the dc supply voltage insome topologies. The forward and flyback converters (Chap. 7), for example,have off-state switch voltages of twice the dc input.The power absorbed by the transistor is reduced by the snubber circuit. Thepower absorbed by the transistor before the snubber is added is determined fromthe waveform of Fig. 10-11c. Turnoff power losses are determined from(10-10)The integral is evaluated by determining the area under the triangle for turnoff,resulting in an expression for turnoff power loss without a snubber of(10-11)where tstfis the turnoff switching time and f1/Tis the switching frequency.Power absorbed by the transistor during turnoff after the snubber is added isdetermined from Eqs. (10-5), (10-7), and (10-10).(10-12)The above equation is valid for the case when tftx, as in Fig. 10-12cor d.The resistor is chosen such that the capacitor is discharged before the nexttime the transistor turns off. Atime interval of three to five time constants isPQ1T3T0vQiQ dtf3tf0aILt22CtfbILa1ttfb dtI2L t2ff24CPQ12ILVs(tstf) fPQ1T3T0pQ(t) dtCILtf2Vs CILtf2Vf VfIL(tf)22CtfILtf2Char80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 444
10.5Transistor Snubber Circuits445necessary for capacitor discharge. Assuming five time constants for completedischarge, the on time for the transistor isor(10-13)The capacitor discharges through the resistor and the transistor when the transis-tor turns on. The energy stored in the capacitor is(10-14)This energy is transferred mostly to the resistor during the on time of the transis-tor. The power absorbed by the resistor is energy divided by time, with timeequal to the switching period:(10-15)where fis the switching frequency. Equation (10-15) indicates that power dissi-pation in the snubber resistor is proportional to the size of the snubber capacitor.Alarge capacitor reduces the power loss in the transistor [Eq. (10-12)], but atthe expense of power loss in the snubber resistor.Note that the power in the snub-ber resistor is independent of its value. The resistor value determines the dis-charge rate of the capacitor when the transistor turns on.The power absorbed by the transistor is lowest for large capacitance, but thepower absorbed by the snubber resistor is largest for this case. The total powerfor transistor turnoff is the sum of the transistor and snubber powers. Figure 10-13shows the relationship among transistor, snubber, and total losses. The use of thePR12 CV2sT12 CV2s fW12 CV2sR ton5Cton 5RCLossesTotalSnubberTransistorCFigure 10.13Transistor, snubber,and total turnoff losses as a functionof snubber capacitance.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 445
446CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinkssnubber can reduce the total switching losses, but perhaps more importantly, thesnubber reduces the power loss in the transistor and reduces the cooling require-ments for the device. The transistor is more prone to failure and is harder to coolthan the resistor, so the snubber makes the design more reliable.Transistor Snubber Circuit DesignThe converter and snubber in Fig. 10-12ahas Vs100 Vand IL5 A. The switchingfrequency is 100 kHz with a duty ratio of 50 percent, and the transistor turns off in 0.5 s.(a) Determine the turnoff losses without a snubber if the transistor voltage reaches Vsin0.1 s. (b) Design a snubber using the criterion that the transistor voltage reaches its finalvalue at the same time that the transistor current reaches zero. (c) Determine the transis-tor turnoff losses and the resistor power with the snubber added.■Solution(a)The turnoff voltage, current, and instantaneous power waveforms without the snubberare like those of Fig. 10-11. Transistor voltage reaches 100 Vwhile the current isstill at 5 A, resulting in a peak instantaneous power of (100 V)(5 A) 500 W. Thebase of the power triangle is 6 µs, making the area 0.5(500 W)(0.6 µs)150 µJ.The switching period is 1/f1/100,000 s, so the turnoff power loss in the transis-tor is W/T(150)(106)(100,000) 15 W. Equation (10-11) yields the same result:(b)The snubber capacitance value is determined from Eq. (10-9):The snubber resistor is chosen using Eq. (10-13). The switching frequency is 100 kHzcorresponding to a switching period of 10 s. The on time for the transistor isapproximately one-half of the period, or 5 s. The resistor value is thenThe resistance value is not critical. Since five time constants is a conservativedesign criterion, the resistance need not be exactly 80 .(c)The power absorbed by the transistor is determined from Eq. (10-12):Power absorbed by the snubber resistor is determined from Eq. (10-15):PR12 CV2s f0.0125(106)(1002)(100,000)26.25 WPQI2L t2f f24C52[(0.5)(106)]2(105)24(1.25)(108)2.08 WR ton5C5 s5(0.0125 F)80 ÆCIL tf2Vs(5)(0.5)(106)(2)(100)1.25(108)0.0125 F12.5 nFPQ12ILVs(tstf) f12 (5)(100)(0.10.5)(106)(105)15 WEXAMPLE 10.4har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 446
10.5Transistor Snubber Circuits447Total power due to turnoff losses with the snubber is 2.08 6.25 8.33 W, reduced from15 Wwithout the snubber. The losses in the transistor are significantly reduced by thesnubber, and total turnoff losses are also reduced in this case.The other function of the snubber circuit is to reduce voltage and currentstresses in the transistor. The voltage and current in a transistor must not exceedthe maximum values. Additionally, the transistor temperature must be keptwithin allowable limits. High current at a high voltage must also be avoided in abipolar transistor because of a phenomenon called second breakdown. Secondbreakdown is the result of nonuniform distribution of current in the collector-base junction when both voltage and current are large, resulting in localized heat-ing in the transistor and failure.The forward-bias safe operating area (SOAor FBSOA) of a BJTis the areaenclosed by the voltage, current, thermal, and second breakdown limits, asshown in Fig. 10-14a. The FBSOAindicates the capability of the transistor whenTemperatureLimitSecond BreakdownLimit (BJT)SOARBSOA(a)(c)Without snubberImaxVmaxC1C2C3C1 < C2 < C3iswVswvi(b)viFigure 10.14Transistor. (a) Safe operation area; (b) Reverse-bias safe operatingarea; (c) Switching trajectories for different snubber capacitance.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 447 448CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinksthe base-emitter junction is forward-biased. The FBSOAindicates maximumlimits for steady-state and for turn-on. The SOAcan be expanded vertically forpulsed operation. That is, current can be greater if it is intermittent rather thancontinuous. In addition, there is a reverse-bias safe operating area (RBSOA),shown in Fig. 10-14b. Forward biasand reverse biasrefer to the biasing of thebase-emitter junction. The voltage-current trajectory of the switching waveformsof Fig. 10-12is shown in Fig. 10-14c. Asnubber can alter the trajectory and pre-vent operation outside of the SOAand RBSOA. Second breakdown does notoccur in a MOSFET.Alternative placements of the snubber circuit are possible. The forwardconverter is shown in Fig. 10-15with a snubber connected from the transistorback to the positive input supply rather than to ground. The snubber functionslike that of Fig. 10-12, except that the final voltage across the capacitor is Vsrather than 2Vs.One source of voltage stress in a transistor switch is the energy stored in theleakage inductance of a transformer. The flyback converter model of Fig. 10-16,for example, includes the leakage inductance Ll, which was neglected in theanalysis of the converters in Chap. 7but is important when analyzing the stresseson the switch. The leakage inductance carries the same current as the transistorswitch when the transistor is on. When the transistor turns off, the current in theleakage inductance cannot change instantaneously. The large di/dtfrom therapidly falling current can cause a large voltage across the transistor.The snubber circuit of Fig. 10-12can reduce the voltage stress across thetransistor in addition to reducing transistor losses. The diode-capacitor-resistorcombination provides a parallel current path with the transistor. When the tran-sistor turns off, the current maintained by the transformer leakage inductanceforward-biases the diode and charges the capacitor. The capacitor absorbs energythat was stored in the leakage inductance and reduces the voltage spike thatwould appear across the transistor. This energy is dissipated in the snubber resis-tor when the transistor turns on.Vs+–Figure 10.15Alternate placement of asnubber for the forward converterhar80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 448 10.5Transistor Snubber Circuits449Turn-on snubbers protect the device from simultaneously high voltage andcurrent during turn-on. As with the turnoff snubber, the purpose of the turn-onsnubber is to modify the voltage-current waveforms to reduce power loss. Aninductor in series with the transistor slows the rate of current rise and can reducethe overlap of high current and high voltage. Aturn-on snubber is shown inFig. 10-17. The snubber diode is off during turn-on. During turnoff, the energystored in the snubber inductor is dissipated in the resistor.If a turnoff snubber is also used, the energy stored in the turn-on snubberinductor can be transferred to the turnoff snubber without the need for the addi-tional diode and resistor. Leakage or stray inductance that inherently exists in cir-cuits may perform the function of a turn-on snubber without the need for anadditional inductor.VsLmLl+–Figure 10.16Flyback converterwith transformer leakage induc-tance included.VsILDLDsLsRFigure 10.17Transistor turnonsnubber.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 449 450CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinks10.6ENERGYRECOVERYSNUBBER CIRCUITSSnubber circuits reduce the power dissipated in the transistor, but the snubberresistor also dissipates power that is lost as heat. The energy stored in the snub-ber capacitance is eventually transferred to the snubber resistor. If the energystored in the snubber capacitor can be transferred to the load or back to thesource, the snubber resistor is not necessary, and the losses are reduced.One method for energy recovery in a snubber is shown in Fig. 10-18. BothDsand Csact like the snubber of Fig. 10-12aat turnoff: Cscharges to Vsanddelays the voltage rise across the transistor. At turn-on, a current path consistingof Q, Cs, L, D1, and C1is formed, and an oscillatory current results. The chargeinitially stored in Csis transferred to C1. At the next turnoff, C1dischargesthrough D2into the load while Cscharges again. Summarizing, the energy storedin Csat turnoff is first transferred to C1and is then transferred to the load.10.7THYRISTOR SNUBBER CIRCUITSThe purpose of a thyristor snubber circuit is mainly to protect the device fromlarge rates of change of anode-to-cathode voltage and anode current. If dv/dtforthe thyristor is too large, the device will begin to conduct without a gate signalpresent. If di/dtis too large during turn-on, localized heating will result from thehigh current density in the region of the gate connection as the current spreadsout over the whole junction.Thyristor snubber circuits can be like those used for the transistor, or theymay be of the unpolarized type shown in Fig. 10-19. The series inductor limitsdi/dt, and the parallel RCconnection limits dv/dt.VsDLDsCsD2D1LLoadC1QFigure 10.18Snubbercircuit with energyrecovery.LsCsRsFigure 10.19Thyristor snubbercircuit.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 450 10.8Heat Sinks and Thermal Management45110.8HEATSINKS AND THERMALMANAGEMENTSteady-State TemperaturesAs discussed throughout this textbook, conduction and switching losses occur inelectronic devices. Those losses represent electrical-energy being converted tothermal energy, and removal of thermal energy is essential in keeping the inter-nal temperature of the device below its maximum rated value.In general, the temperature difference between two points is a function ofthermal power and thermal resistance. Thermal resistanceis defined as(10-16)where R thermal resistance, C/W(also listed as K/Won some datasheets)T1T2temperature difference, CP thermal power, WAuseful electric circuit analog for steady-state thermal calculations that fitsEq. (10-16) uses Pas a current source, Ras electrical resistance, and voltage dif-ference as temperature difference, as illustrated in Fig. 10-20.The internal temperature of an electronic switching device is referred to asthe junctiontemperature. Although devices such as MOSFETs do not have ajunction per se when conducting, the term is still used. In an electronic devicewithout a heat sink, the junction temperature is determined by thermal power andthe junction-to-ambient thermal resistance R,JA. The ambient temperature is thatof the air in contact with the case. Manufacturers often include the value of R,JAon the datasheet for the device.MOSFETMaximum Power AbsorptionAMOSFETmanufacturer’s datasheet lists the junction-to-ambient thermal resistanceR,JAas 62C/W. The maximum junction temperature is listed at 175C, but the designerwishes for it not to exceed 150C for increased reliability. If the ambient temperature is40C, determine the maximum power that the MOSFETcan absorb.RT1T2PT1T2RθPFigure 10.20An elec-tric circuit equivalentto determine tempera-ture difference.EXAMPLE 10.5har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 451 452CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinks■SolutionFrom Eq. (10-16),In many instances, the power absorbed by a device results in an excessivejunction temperature, and a heat sink is required. Aheat sink reduces the junctiontemperature for a given power dissipation in a device by reducing the overallthermal resistance from junction to ambient. The case of the device is oftenattached to the heat sink with a thermal compound to fill the small voids betweenthe imperfect surfaces of the case and sink. Heat sinks are available in all sizes,ranging from small clip-on devices to massive extruded aluminum shapes.Typical heat sinks are shown in Fig. 10-21.For an electronic device with a heat sink, thermal power flows from the junc-tion to the case, from the case to the heat sink, and then from the heat sink toambient. The corresponding thermal resistances are R,JC, R,CS, and R,SA, asshown in Fig. 10-22.The temperature at the heat sink near the mounting point of the electronicdevice is(10-17)the temperature at the device case is(10-18)and the temperature at the device junction is(10-19)Semiconductor manufacturers’datasheets list the junction-to-case thermal resis-tance and often list the case-to-heat sink thermal resistance assuming a greasedsurface. The heat sink-to-ambient thermal resistance is obtained from the heatsink manufacturer.TJPR, JCTCP(R, JCR, CSR, SA)TATCPR, CSTSP(R, CSR, SA)TATSPR, SATAP T1T2R TJTAR, JA 1504062 1.77 WFigure 10.21Power transistors mounted on heat sinks.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 452 10.8Heat Sinks and Thermal Management453MOSFETJunction Temperature with a Heat sinkThe datasheet for the MOSFETin Example 10-5 lists the thermal resistance from thejunction to case as 1.87C/Wand the thermal resistance from the case to the heat sink as0.50C/W. (a) If the device is mounted on a heat sink that has a thermal resistance of7.2C/W, determine the maximum power that can be absorbed without exceeding a junc-tion temperature of 150C when the ambient temperature is 40C. (b) Determine the junc-tion temperature when the absorbed power is 15 W. (c) Determine R,SAof a heat sink thatwould limit the junction temperature to 150C for 15 Wabsorbed.■Solution(a)From Eq. (10-19),Comparing this result with that of Example 10-5, including a heat sink reduces thejunction-to-ambient thermal resistance from 62 to 9.57C/Wand enables morepower to be absorbed by the device without exceeding a temperature limit. If theMOSFETabsorbs 1.77 Was in Example 10-5, the junction temperature with thisheat sink will becompared to 150C without the heat sink.(b)Also from Eq. (10-19), the junction temperature for 15 WisTJP(R, JCR, CSR, SA)TA15(1.870.507.2)40184¡ C 1.77(1.870.507.2)4056.9¡ CTJ P(R, JCR, CSR, SA)TAPTJTAR, JCR, CSR, SA150401.870.507.21109.5711.5 WTJRq,JCRq,CSRq,SATSTATCPJunctionCaseHeat sinkAmbientFigure 10.22The electricalcircuit equivalent for a transistor mounted to a heatsink.EXAMPLE 10.6har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 453 454CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinks(c)Solving Eq. (10-19) for R,SAfor a heat sink that would limit the junction tempera-ture to 150C,Time-Varying TemperaturesTemperatures resulting from a time-varying thermal power source are analyzedusing an equivalent circuit like that of Fig. 10-23a. The capacitors represent ther-mal energy storage, resulting in exponential changes in temperatures for a stepchange in the power source, as shown in Fig. 10-23band c.This RCmodel can represent the entire device-case-heat-sink system withT1, T2, T3, and T4representing the junction, case, heat sink, and ambient temper-ature, respectively. The model could also represent just one of those componentsR, SATJTAPR, JCR, CS15040151.870.504.96¡C>WPdmp(t)t1tt00TJ(t)TCΔTJ(b)(c)P(a)T1C1Rθ1Rθ2Rθ3T2C2T3T4C3Figure 10.23(a) An equivalent circuit representation for a time-varying thermal power source; (b) Amomentary power pulse; (c) The temperature response due to a power pulse.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 454
10.8Heat Sinks and Thermal Management455that has been subdivided into multiple sections. For example, it could representjust the junction to case of the device divided into three sections.Transient thermal impedance from the junction to the case Z,JCis used todetermine the change in junction temperature due to momentary changes inabsorbed power. Manufacturers typically supply transient thermal impedanceinformation on datasheets. Figure 10-24shows a graphical representation of Z,JCas well as the RCequivalent circuit representation for the junction to case for theIRF4104 MOSFET. Transient thermal impedance is also denoted as Zth.First, consider the increase in junction temperature due to a single powerpulse of amplitude Pdmlasting for a duration t1, as shown in Fig. 10-23b. Thethermal model of Fig. 10-23aproduces an exponential junction temperature vari-ation like that of Fig. 10-23c. The change in the temperature of the junction in thetime interval 0 to t1is determined from(10-20)where Z,JCis the transient thermal impedance from the device junction to case.The maximum junction temperature is TJplus the case temperature.(10-21)Transient Thermal ImpedanceAsingle power pulse of 100 Wwith a 100-s duration occurs in a MOSFETthat has thetransient thermal resistance characteristics shown in Fig. 10-24. Determine the maximumchange in junction temperature.TJ, max Pdm Z,JCTCTJPdm Z, JC 1010.1Thermal Response (ZthJC)0.010.0011E–0061E–0050.0001t1, Rectangular Pulse Duration (sec)0.0010.010.1D = 0.500.200.020.010.050.10SINGLE PULSE(THERMAL RESPONSE)Notes:1. Duty Factor D = t1/t22. Peak Tj = Pdm × Zthjc + TcRi (°C/W)0.3710.0002720.3370.0013750.3370.018713i (sec)R1t1tJt2t3Ci = ri-RitCR2R3Figure 10.24Thermal impedance characteristics of the IRF4104 MOSFET. (Courtesy of InternationalRectifierCorporation).EXAMPLE 10.7har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 455
456CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinks■SolutionThe bottom curve on the graph gives the thermal impedance for a single pulse. For 100 s(0.0001 s), Z,JCis approximately 0.11C/W. Using Eq. (10-20), the increase in junctiontemperature isNext, consider the pulsed power waveform shown in Fig. 10-25a. Junctiontemperature increases during the power pulse and decreases when the power iszero. After an initial start up interval, the junction temperature reaches equilib-rium where thermal energy absorbed in one period matches the thermal energytransferred. Maximum junction temperature TJ,maxis found using Eq. (10-21) andZ,JCfrom Fig. 10-24. The horizontal axis is t1, the time duration of the pulse ineach period. The value of Z,JCis read from the curve corresponding to the dutyratio t1/t2. The temperature of the case is assumed constant and can be determinedfrom Eq. (10-18) using the average power for P.If the power pulse is at a high frequency, such as the switching frequencyof a typical power converter, the fluctuation in the temperature waveform ofFig. 10-25bbecomes small, and temperatures can be analyzed by using R,JCinEq. (10-19) with Pequal to the average power.Maximum Junction Temperature for Periodic Pulsed PowerThe power absorbed by a MOSFETis the pulsed-power waveform like that of Fig. 10-25awith Pdm100 W, t1200 s, and t22000 s. (a) Determine the peak temperaturedifference between the junction and the case, using the transient thermal impedance fromTJ Pdm Z, JC 100(0.11) 11¡ C00t1t2ttTJ,maxTJ(t)Pdmp(t)(a)(b)Figure 10.25(a) Apulsed power waveform; (b) The temperaturevariation at the junction.EXAMPLE 10.8har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 456
10.10Bibliography457Fig. 10-24. Assume that the case temperature is a constant 80C. (b) The thermal resis-tance R,JCfor this MOSFETis 1.05C/W. Compare the result in (a) with a calculationbased on the average MOSFETand R,JC.■Solution(a)The duty ratio of the power waveform isUsing the graph in Fig. 10-24, the transient thermal impedance Z,JCfor t1200 sand D0.1 is approximately 0.3C/W. The maximum temperature differencebetween the junction and the case is determined from Eq. 10-20asmaking the maximum junction temperature(b)Using the average power only, the temperature difference from the junction to casewould be calculated asTherefore, a temperature calculation based on the average power greatlyunderestimates the maximum temperature difference between the junction and thecase. Note that a period of 2000 µs corresponds to a frequency of only 500 Hz. Formuch higher frequencies (e.g., 50 kHz), the temperature difference based on R,JCand average power is sufficiently accurate.10.9SummaryThe switching speed of a transistor is determined not only by the device but also by thegate or base drive circuit. The double emitter-follower drive circuit for the MOSFET(orIGBT) significantly reduces the switching time by sourcing and sinking the required gatecurrents to supply and remove the stored charge in the MOSFETrapidly. Abase drive cir-cuit that includes large current spikes at turn-on and turnoff for the bipolar transistor sig-nificantly reduces switching times.Snubber circuits reduce power losses in the device during switching and protect thedevice from the switching stresses of high voltages and currents. Transistor switchinglosses are reduced by snubbers, but total switching losses may or may not be reducedbecause power is dissipated in the snubber circuit. Energy recovery snubber circuits canfurther reduce the switching losses by eliminating the need for a snubber resistor.Heat sinks reduce the internal temperature of an electronic device by reducing the totalthermal resistance between the device junction and ambient. Equivalently, a heat sinkenables a device to absorb more power without exceeding a maximum internal temperature.10.10BibliographyM. S. J. Asghar, Power Electronics Handbook, edited by M. H. Rashid, Academic Press,San Diego, Calif., 2001, Chapter 18.10.5¡C.TJPR, JC (PdmD)R, JC (10 W)(1.05¡C>W)TJ, max Pdm Z,JCTC 3080110¡CTJPdm Z, JC 100(0.3)30¡D t1t2 200 s2000 s 0.1har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 457
458CHAPTER 10Drive Circuits, Snubber Circuits, and Heat SinksL. Edmunds, “Heatsink Characteristics,” International Rectifier Application Note AN-1057, 2004, http://www.irf.com/technical-info/appnotes/an-1057.pdf.Fundamentals of Power Semiconductors for Automotive Applications,2d ed., InfineonTechnologies, Munich, Germany, 2008.“HVFloating MOS-Gate Driver ICs,” Application Note AN-978, International Rectifier,Inc., El Segunda, Calif., July 2001. http://www.irf.com/technical-info/ appnotes/an-978.pdf.A. Isurin and A. Cook, “Passive Soft-Switching Snubber Circuit with EnergyRecovery,” IEEE Applied Power Electronics Conference, austin, Tex., 2008.S. Lee, “How to Select a Heat Sink,” Aavid Thermalloy, http://www.aavidthermalloy.com/technical/papers/pdfs/select.pdfW. McMurray, “Selection of Snubber and Clamps to Optimize the Design of TransistorSwitching Converters,” IEEE Transactions on Industry Applications, vol. IAI6, no. 4, 1980, pp. 513–523.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters,Applications, and Design,3d ed., Wiley, New York, 2003.M. H. Rashid, Power Electronics: Circuits, Devices, and Systems,3d ed., Prentice-Hall,Upper Saddle River, N.J., 2004.R. E. Tarter, Solid-State Power Conversion Handbook, Wiley, New York, 1993.ProblemsMOSFETDRIVE CIRCUITS10-1(a) Run the PSpice simulation of the circuits of Example 10-1 and use Probeto determine the turnoff and turn-on power loss separately. The restrict dataoption will be useful. (b) From the PSpice simulations, determine the peak,average, and rms values of the MOSFETgate current for each simulation.10-2Repeat the PSpice simulation in Example 10-1 for the MOSFETdrive circuitof Fig. 10-1a, usingR175, 50, and 25 . What is the effect of reducing thedrive circuit output resistance?BIPOLAR TRANSISTOR DRIVE CIRCUITS10-3Design a bipolar transistor drive circuit like that shown in Fig. 10-7with aninitial base current of 5 Aat turn-on which reduces to 0.5 Ato maintain thecollector current in the on state. The switching frequency is 100 kHz and theduty ratio is 50 percent.10-4Design a bipolar transistor drive circuit like that shown in Fig. 10-7with aninitial base current of 3 Aat turn-on which reduces to 0.6 Ato maintain thecollector current in the on state. The switching frequency is 120 kHz and theduty ratio is 30 percent.SNUBBER CIRCUITS10-5For the snubber circuit of Fig. 10-12a, Vs50, IL4 A, C0.05 F, R5 .,and tf0.5 s. The switching frequency is 120 kHz, and the duty ratio is 0.4.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 458
Problems459(a) Determine expressions for iQ, ic, and vcduring transistor turnoff. (b) Graphthe iQand vCwaveforms at turnoff. (c) Determine the turnoff losses in theswitch and the snubber.10-6Repeat Prob. 10-5, using C0.01 F.10-7Design a turnoff snubber circuit like that of Fig. 10-12afor Vs150 V, IL10 A, and tf0.1 s. The switching frequency is 100 kHz, and the duty ratiois 0.4. Use the criteria that the switch voltage should reach Vswhen the switchcurrent reaches zero and that five time constants are required for capacitor dis-charge when the switch is open. Determine the turnoff losses for the switchand snubber.10-8Repeat Prob. 10-7, using the criterion that the switch voltage must reach 75 Vwhen the switch current reaches zero.10-9Design a turnoff snubber circuit like that of Fig. 10-12afor Vs170 V, IL7 A,and tf0.5 s. The switching frequency is 125 kHz, and the duty ratio is0.4. Use the criteria that the switch voltage should reach Vswhen the switchcurrent reaches zero and that five time constants are required for capacitor dis-charge when the switch is open. Determine the turnoff losses for the switchand snubber.10-10Repeat Prob. 10-9, using the criterion that the switch voltage must reach 125 Vwhen the switch current reaches zero.10-11Aswitch has a current fall time tfof 0.5 s and is used in a converter that ismodeled as in Fig. 10-11a. The source voltage and the final voltage across theswitch are 80 V, the load current is 5 A, the switching frequency is 200 kHz,and the duty ratio is 0.35. Design a snubber circuit to limit the turnoff loss inthe switch to 1 W. Determine the power absorbed by the snubber resistor.10-12Aswitch has a current fall time tfof 1.0 s and is used in a converter that ismodeled as in Fig. 10-11a. The source voltage and the final voltage across theswitch are 120 V, the load current is 6 A, the switching frequency is 100 kHz,and the duty ratio is 0.3. Design a snubber circuit to limit the turnoff loss inthe switch to 2 W. Determine the power absorbed by the snubber resistor.HEATSINKS10-13AMOSFETwith no heat sink absorbs a thermal power of 2.0 W. The thermalresistance from junction to ambient is 40C/W, if the ambient temperature is30C. (a) Determine the junction temperature. (b) If the maximum junctiontemperature is 150C, how much power can be absorbed without requiring aheat sink?10-14AMOSFETwith no heat sink absorbs a thermal power of 1.5 W. The thermalresistance from junction to ambient is 55C/W, if the ambient temperature is25C. (a) Determine the junction temperature. (b) If the maximum junctiontemperature is 175C, how much power can be absorbed without requiring aheat sink?10-15AMOSFETmounted on a heat sink absorbs a thermal power of 10 W. Thethermal resistances are 1.1C/Wfrom the junction to the case, 0.9C/Wfor thecase to the heat sink, and 2.5C/Wfor the heat sink to ambient. The ambienttemperature is 40C. Determine the junction temperature.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 459
460CHAPTER 10Drive Circuits, Snubber Circuits, and Heat Sinks10-16AMOSFETmounted on a heat sink absorbs a thermal power of 5 W. The ther-mal resistances are 1.5C/Wfrom the junction to the case, 1.2C/Wfor thecase to the heat sink, and 3.0C/Wfor the heat sink to ambient. The ambienttemperature is 25C. Determine the junction temperature.10-17AMOSFETmounted on a heat sink absorbs a thermal power of 18 W. Thethermal resistances are 0.7C/Wfrom the junction to the case and 1.0C/Wforthe case to the heat sink. The ambient temperature is 40C. Determine themaximum thermal resistance from the heat sink to ambient such that the junc-tion temperature does not exceed 110C.10-18Asingle thermal power pulse of 500 Wwith 10 s duration occurs in a MOS-FETwith the transient thermal impedance characteristic of Fig. 10-24.Determine the change in junction temperature due to this pulse.10-19In Example 10-8, the switching frequency is 500 Hz. If the switching fre-quency is increased to 50 kHz with Dremaining at 0.1 and Pdmremaining at100 W, determine the change in junction temperature, (a) using the transientthermal impedance Z,JCfrom Fig. 10-24and (b) using R,JC1.05C/Wandthe average transistor power.har80679_ch10_431-460.qxd 12/16/09 3:58 PM Page 460
APPENDIXA461Fourier Series for SomeCommon WaveformsFOURIER SERIESThe Fourier series for a periodic function f(t) can be expressed in trigonometricform aswhereSines and cosines of the same frequency can be combined into one sinusoid,resulting in an alternative expression for a Fourier seriesbn2T 3T/2T/2f (t)sin(n0 t) dtan2T 3T/2T/2f (t)cos(n0 t) dta01T3T/2T/2f (t)dtf(t)a0aqn1[an cos(n0 t)bn sin(n0t)]har80679_appa_461-466.qxd 12/3/09 4:24 PM Page 461
462APPENDIX AFourier Series for Some Common WaveformswhereorwhereThe rms value of f(t) can be computed from the Fourier series.HALF-WAVE RECTIFIED SINUSOID (FIG. A-1)Figure A-1Half-wave rectiÞed sine wave.FULL-WAVE RECTIFIED SINUSOID (FIG. A-2)Figure A-2Full-wave rectiÞed sine wave.Vmtv(t)VmVm2 sin (0t)aqn2,4,6Á2Vm(n21) cos (n0t)VmT2TtBa20aqn1aCn12b2FrmsAaqn0F2n, rmsand ntan1aanbnbCn2a2nb2n f(t)a0aqn1Cn sin (n0tn)and ntan1abnanbCn2a2nb2n f(t)a0aqn1Cn cos(n0tn)har80679_appa_461-466.qxd 12/3/09 4:24 PM Page 462
Three-Phase Bridge RectiÞer463vo(t)Voaqn2,4,ÁVn cos (n0t)whereandTHREE-PHASE BRIDGE RECTIFIER (FIG. A-3)Figure A-3Three-phase six-pulse bridge rectiÞer output.The Fourier series for a six-pulse converter iswhere Vm,LLis the peak line-to-line voltage of the three-phase source, whichisVLL,rms.The Fourier series of the currents in phase aof the ac line (see Fig. 4-17) iswhich consists of terms at the fundamental frequency of the ac system andharmonicsof order 6k 1, k 1, 2, 3, . . . .ia(t)213Io acos 0t15 cos 50t17 cos 70t111cos 110t113 cos 130tÁb12Vn6Vm,LL(n21) n6, 12, 18,ÁVo3Vm,LL0.955 Vm,LLvo(t)Voaqn6,12,18,ÁVn cos (n0t)VmtVn2Vm a1n11n1bVo2Vmhar80679_appa_461-466.qxd 12/3/09 4:24 PM Page 463
464APPENDIX AFourier Series for Some Common WaveformsPULSED WAVEFORM (FIG. A-4)Figure A-4A pulsed waveform.SQUARE WAVE (FIG. A-5)Figure A-5Square wave.The Fourier series contains the odd harmonics and can be represented asvo(t)an odda4Vdcnbsin(n0t)Vdc−Vdc0T2Tt21 cos(n2D)Cna12Vmnb bnaVmnb[1cos(n2D)]anaVmnbsin(n2D)a0VmDVmtTDThar80679_appa_461-466.qxd 12/3/09 4:24 PM Page 464
Three-Phase Six-Step Inverter465MODIFIED SQUARE WAVE (FIG. A-6)Figure A-6A modiÞed square wave.The Fourier series of the waveform is expressed asTaking advantage of half-wave symmetry, the amplitudes arewhere is the angle of zero voltage on each end of the pulse.THREE-PHASE SIX-STEP INVERTER (FIG. A-7)Vna4Vdcnbcos(n)vo(t)an oddVn sin(n0t)+Vdc−Vdcα0απα2πwtα0vANVdc13Vdc23Vdc23−Vdc13−Figure A-7Three-phase six-step inverter output.The Fourier series for the output voltage has a fundamental frequency equal to the switching frequency. Harmonic frequencies are of order 6k1 for k1,2, . . . (n5, 7, 11, 13, . . .). The third harmonic and multiples of the third do nothar80679_appa_461-466.qxd 12/3/09 4:24 PM Page 465
466APPENDIX AFourier Series for Some Common Waveformsexist, and even harmonics do not exist. For an input voltage of Vdc, the output for an ungrounded wye-connected load (see Fig. 8-17) has the following FouriercoefÞcients:Vn, LN`2Vdc3nc2cosan3bcosan23bd` n1,5,7,11,13,ÁVn, LL`4Vdcn cosan6b`har80679_appa_461-466.qxd 12/3/09 4:24 PM Page 466
APPENDIXB467State-Space AveragingThe results of the following development are used inSec. 7.13 on control of dcpower supplies. Ageneral method for describing a circuit that changes over aswitching period is called state-space averaging. The technique requires two setsof state equations which describe the circuit: one set for the switch closed andone set for the switch open. These state equations are then averaged over theswitching period. Astate-variable description of a system is of the form(B-1)(B-2)The state equations for a switched circuit with two resulting topologies are asfollows:switch closedswitch open(B-3)Figure B-1Circuits for developing the state equations for the buck converter circuit (a) for the switch closed and (b) for the switch open.Vs(a)vCiLrCiCiRLCRR+−+−(b)vCiLrCiCiRLC+− x#A1xB1v x#A2xB2vvoCT1x voCT2xvoCTxx#AcBvhar80679_appb_467-472.qxd 12/16/09 4:34 PM Page 467
468APPENDIX BState-Space AveragingFor the switch closed for the time dTand open for (1 d)T, the above equationshave a weighted average of(B-4)(B-5)Therefore, an averaged state-variable description of the system is described as inthe general form of Eqs. (B-1) and (B-2) with(B-6)SMALLSIGNALAND STEADYSTATESmall-signal and steady-state analyses of the system are separated by assumingthe variables are perturbed around the steady-state operating point, namely,(B-7)where X, D, and Vrepresent steady-state values and ~x, ~d, and ~vrepresent small-signal values.For the steady state, and the small-signal values are zero.Equation (B-1) becomesor(B-8)(B-9)where the matrices are the weighted averages of Eq. (B-6).The small-signal analysis starts by recognizing that the derivative of thesteady-state component is zero.(B-10)Substituting steady-state and small-signal quantities into Eq. (B-4),~x.{A1 (D~d)A2[1(D~d)]}{B1(D~d)B2[1(D~d)]}(V~v)(B-11)If the products of small-signal terms can be neglected, and if the input is assumed to be constant, vVand(B-12)x~. [A1DA2(1D)] x~[(A1A2)X(B1B2)V]d~x~d~x#X# x~.0x~.x~.VoCTA1BV0AXBVXA1BVx#0v V v~d D d~x X x~ AA1dA2(1d) BB1dB2(1d) CTCT1dCT2(1d)voCCT1dCT2(1d)D xx#[A1dA2(1d)]x[B1dB2(1d)]vhar80679_appb_467-472.qxd 12/16/09 4:34 PM Page 468
State Equations for the Buck Converter469Similarly, the output is obtained from Eq. (B-5).(B-13)STATE EQUATIONS FOR THE BUCK CONVERTERState-space averaging is quite useful for developing transfer functions forswitched circuits such as dc-dc converters. The buck converter is used as an example. State equations for the switch closed are developed from Fig. B-1a, andstate equations for the switch open are from Fig. B-1b.Switch ClosedFirst, the state equations for the buck converter (also for the forward converter)are determined for the switch closed. The outermost loop of the circuit in Fig. B-1ahas KirchhoffÕs voltage law equation(B-14)KirchhoffÕs current law gives(B-15)KirchhoffÕs voltage law around the left inner loop gives(B-16)which gives the relation(B-17)Combining Eqs. (B-14) through (B-17) gives the state equation(B-18)KirchhoffÕs voltage law around the right inner loop gives(B-19)Combining the above equation with Eq. (B-15) gives the state equation(B-20)dvCdtRC(RrC)iL1C(RrC)vCvCiCrCiRR0diLdtRrCL(RrC)iLRL(RrC)vC1LVsiCC dvCdt1rCaVsL diLdtvCbL diLdtiCrCvCVsiRiLiCiLC dvCdtL diLdtiRRVsv~oCCT1CT2(1D)Dx~CACT1CT2BXDd~har80679_appb_467-472.qxd 12/16/09 4:34 PM Page 469
470APPENDIX BState-Space AveragingRestating Eqs. (B-18) and (B-20) in state-variable form gives(B-21)where(B-22)If rCR,(B-23)Switch OpenThe Þlter is the same for the switch closed as for the switch open. Therefore, theAmatrix remains unchanged during the switching period.A2A1The input to the Þlter is zero when the switch is open and the diode is conduct-ing. State equation (B-16) is modiÞed accordingly, resulting inB20Weighting the state variables over one switching period gives(B-24)Adding the above equations and using A2A1,(B-25)In expanded form,Vs(B-26)CdL0SciLvCdDrCL 1L1C1RC Tci#Lv#Cdx#A1x[B1dB2(1d)]Vsx#(1d)A2x(1d)B2Vs(1d)x#dA1xdB1VsdA1LDrCL 1L1C1RC T B1C1L0SA1DRrCL(RrC)RL(RrC)RC(RrC)1C(RrC)T x#ci#Lv#Cdx#A1xB1Vshar80679_appb_467-472.qxd 12/16/09 4:34 PM Page 470
State Equations for the Buck Converter471Equation (B-26) gives the averaged state-space description of the output Þlterand load of the forward converter or buck converter.The output voltage vois determined from(B-27)Rearranging to solve for vo,(B-28)The above output equation is valid for both switch positions, resulting in C1TC2TCT. In state-variable formwhere(B-29)and(B-30)The steady-state output is found from Eq. (B-9),(B-31)where AA1A2, BB1D, and CTC1TC2T. The Þnal result of this com-putation results in a steady-state output of(B-32)The small-signal transfer characteristic is developed from Eq. (B-12), which inthe case of the buck converter results in(B-33)Taking the Laplace transform,(B-34)Grouping (B-35)where Iis the identity matrix. Solving for (s),(B-36)x~(s)[sIA]1BVsd~(s)x~[sIA]x~(s)BVsd~(s)x~(s)sx~(s)Ax~(s)BVsd~(s)x~.Ax~BVsd~VoVsDVoCTA1BVsxciLvCdCTcRrCRrC RRrCdL[rC 1]voCTxvoaRrCRrCbiLaRRrCbvCLrCiLvCvoRiRR(iLiR)RaiLvovCrCbhar80679_appb_467-472.qxd 12/16/09 4:34 PM Page 471
472APPENDIX BState-Space AveragingExpressingin terms of,(B-37)Finally, the transfer function of output to variations in the duty ratio is expressed as(B-38)Upon substituting for the matrices in the above equation, a lengthy evaluationprocess results in the transfer function(B-39)The above transfer function was used in the section on control of dc power sup-plies in Chap. 7.BibliographyS. Ang and A. Oliva, Power-Switching Converters, 2d ed., Taylor & Francis, BocaRaton, Fla., 2005.R. D. Middlebrook and S. «Cuk, ÒAGeneral UniÞed Approach to Modelling SwitchingÑConverterPower Stages,Ó IEEE Power Electronics Specialists Conference Record,1976.N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters, Applications, and Design,3d ed., Wiley, New Yorks, 2003.vo(s)~d~(s)VsLC c1srCCs2s(1/RCrC/L)1/LCdv~o(s)d~(s)CT[sIA]1BVsv~o(s)CTx~(s)CT[sIA]1BVsd~(s)x~(s)v~o(s)har80679_appb_467-472.qxd 12/16/09 4:34 PM Page 472
INDEX473Carrier signal,357Charge pump,247Chopper, dc,197Class D amplifiers,366Commutation,103, 160Compensation,308, 317Conduction angle,97, 189Continuous current,120, 126, 198Control,302Control loop,297, 303Controlled full-wave rectifier,131Controlled half-wave rectifier,94Converterac-ac,2ac-dc,2classification,1dc-ac,2dc-dc,2selection,298Crest factor,50Cross-over frequency,304C«uk converter,226Current-fed converter,294DDarlington,10Dc link,382Dc link resonant converter,422Dc power supplies,265complete,325off line,326Dc power transmission,1, 156Dc-dc converterboost,211AAc voltage controller,171, 172Ac-ac converter,171Active power,22Adjustable-speed motor drives,349Amplitude control,346inverters,342resonant converter,404Amplitude modulation ratio,360Average power,22Averaged circuit model,254BBattery charger,24, 120Bipolar junction transistor,9, 437Darlington,10Bipolar PWM inverter,361Body diode,10, 207Boost converter,211, 244, 301Bridge rectifier,111, 114, 131, 160three phase,463Buck converter,198, 310control,303design,207, 208, 210Buck-boost converter,221CCapacitors,25average current,26average power,26ESR,206stored energy,25Capture,13har80679_ndx_473-482.qxd 12/16/09 4:49 PM Page 473
474IndexEElectric arc furnaces,192Electronic switch,5, 65Energy,22Energy recovery,27, 32Equivalent series resistance (ESR),206, 273, 307, 309, 323Error amplifier,303, 307, 308, 311Extinction angle,70, 72, 77, 96FFast Fourier transform (FFT),55Feedback,302Filtercapacitor,88, 122L-C,126, 323, 404transfer function,306Flyback converter,267Forced response,67, 76Form factor,50Forward converter,277Fourier series,4, 43, 45amplitude control,343common waveforms,461controlled rectifier,136full-wave rectified sine wave,115half-wave rectified sine wave,82multilevel inverter,349PSpice,54PWM inverter,361square-wave inverter,337three-phase rectifier,146Freewheeling diode,81, 86, 103Frequency modulation ratio,360Fuel injector,27Full-bridge converter,291, 331GGate turnoff thyristor (GTO),7HHalf-bridge converter,291Half-wave rectifier,65controlled,94, 95, 99Dc-dc converter Ñ(Cont.)buck,198buck-boost,221Cuk,226current-fed,294double-ended forward,285flyback,267forward,277full-bridge,291half-bridge,291multiple outputs,297push-pull,287SEPIC,231switched capacitor,247Delay angle,94, 131Designboost converter,216buck converter,207, 208, 210C«uk converter,230flyback converter,274forward converter,284half-wave rectifier,74inverter,344, 364type 2 error amplifier,311type 3 error amplifier,318Diode,6fast-recovery,7freewheeling,81ideal,17, 72MOSFETbody,9reverse recovery,7Schottky,7Discontinuous current,198Displacement power factor,49Distortion factor,49Distortion volt-amps,50Double-ended forward converter,285Drive circuitsBJT,437high side,433low side,431MOSFET,431PSpice,17thyristor,440transistor,8Duty ratio,35, 198har80679_ndx_473-482.qxd 12/16/09 4:49 PM Page 474
Index475Multilevel inverters,348diode clamped,354independent dc sources,349pattern swapping,353three phase,378NNational SemiconductorLM2743 control circuit,323Natural response,67, 76OOrthogonal functions,40PParallel dc-dc resonant converter,415Passive sign convention,21Phase control,171Phase margin,304, 311Powerapparent,42average,22, 46, 70, 77, 79complex,44computations,21dc source,24factor,43, 96instantaneous,21reactive,44real,22Power factor correction,299Probe,13, 52, 72PSpice,13average power,52control loop,311, 315controlled rectifier,100convergence,18dc power supplies,301default diode,17energy,52Fourier analysis,54half-wave rectifier,72ideal diode,17instantaneous power,52power computations,51Heat sinks,450steady-state temperatures,450time-varying temperatures,454High-side drivers,433IInduction motor speed control,379Inductors,25average power,25average voltage,25stored energy,25, 30Insulated gate bipolar transistor (IGBT),9, 336, 432Interleaved converters,237International RectifierIR2110,435IR2117,435IRF150,16IRF4104,455IRF9140,16Inverter,2, 142, 331amplitude control,342full bridge,331half bridge,346harmonic control,342multilevel,348PWM,357six-step,373square wave,333KK factor,312, 318LLight dimmer,192Linear voltage regulator,196Low-side drivers,431MMOS-controlled thyristor (MCT),7MOSFET,9drive circuits,431on-state resistance,10har80679_ndx_473-482.qxd 12/16/09 4:49 PM Page 475
476IndexSSafe operating area (BJT),447Schottky diode,7, 207Series resonant dc-dc converter,407Series resonant inverter,401Series-parallel dc-dc converter,418Silicon controlled rectifier (SCR),7Single-ended primary inductance converter(SEPIC),231Six-pulse rectifier,145Six-step three-phase inverter,373Small-signal analysis,304Snubber circuitsenergy recovery,449thyristor,450transistor,441Solenoid,27Solid-state relay,179SPICE,13Stability,157, 303, 307, 311, 317State-space averaging,307, 467Static VAR control,191Stepped parameter,73Switch selection,11Switched-capacitor converterinverting,249step-down,250step-up,247Switching losses,240, 241Synchronous rectification,207TThermal impedance,455Thermal resistance,451Three phasecontrolled rectifier,149inverter,154, 373neutral conductor,38rectifiers,144voltage controller,183Thyristor,7drive circuits,440snubber circuit,450Time constant,69, 93PSpice Ñ(Cont.)rms,54Sbreak switch,14SCR,18, 100THD,56voltage-controlled switch,14Pulse-width modulation,307, 357Push-pull converter,287PWM control circuits,323RRectifierfilter capacitor,88, 122half-wave,65three-phase,144Reference voltage,361Resonant converter,387comparison,421dc link,422parallel resonant dc-dc,415series resonant dc-dc,407series resonant inverter,401series-parallel dc-dc,418zero-current switching,387zero-voltage switching,394Reverse recovery,7Ripple voltageboost converter,215buck converter,204buck-boost converter,225Cuk converter,228effect of ESR,206flyback converter,273Forward converter,282full-wave rectifier,124half-wave rectifier,90, 91push-pull converter,289SEPIC,234Rms,34PSpice,54pulse waveform,35sinusoids,36sum of waveforms,40triangular waveform,41har80679_ndx_473-482.qxd 12/16/09 4:49 PM Page 476
Index477Type 3 compensated error amplifier,317placement of poles and zeros,323UUninterruptible power supplies (UPS),331Unipolar PWM inverter,365VVoltage doubler,125VorperianÕs model,259ZZero-current switching,387Zero-voltage switching,394Total harmonic distortion (THD),49, 339Transfer functionfilter,306PWM,307switch,305Transformercenter tapped,114dot convention,266leakage inductance,267magnetizing inductance,266models,265Transient thermal impedance,455Transistor switch,27Transistors,8Triac,7, 8Twelve-pulse rectifiers,151Type 2 compensated error amplifier,308har80679_ndx_473-482.qxd 12/16/09 4:49 PM Page 477
Department of Electrical Engineering Advanced Power Electronics Design Project Design a feedback control system to control a Forward converter with following parameters Vin = 24 V Vout = 4 V N1/N2 = 3 Rload = 200 mΩ Cout = 2000 μF with ESR 10 mΩ Lx= 5μH with series resistance of 10mΩ Switching frequency = 200 kHz Use the provided simulation file to build on it your controller. Deliverable: 1. A report where the design procedure and results are thoroughly discussed 2. All analytical calculations 3. The frequency response of the converter (bode plots) using the provided file 4. The controller type (type-II ) parameters and design 5. Analyze the performance of the controller under input voltage variation of ±10% and load step of ±50% 6. Test the controller performance (as in 5) if the ESR of the output capacitor drops to 1 mΩ. 7. Submit the full report, and the PSIM simulation file.